musb_dsps.c revision d8c3ef256f88b7c6ecd673d03073b5645be9c5e4
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/of.h> 35#include <linux/err.h> 36#include <linux/platform_device.h> 37#include <linux/dma-mapping.h> 38#include <linux/pm_runtime.h> 39#include <linux/module.h> 40 41#include <linux/of.h> 42#include <linux/of_device.h> 43#include <linux/of_address.h> 44 45#include <plat/usb.h> 46 47#include "musb_core.h" 48 49#ifdef CONFIG_OF 50static const struct of_device_id musb_dsps_of_match[]; 51#endif 52 53/** 54 * avoid using musb_readx()/musb_writex() as glue layer should not be 55 * dependent on musb core layer symbols. 56 */ 57static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 58 { return __raw_readb(addr + offset); } 59 60static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 61 { return __raw_readl(addr + offset); } 62 63static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 64 { __raw_writeb(data, addr + offset); } 65 66static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 67 { __raw_writel(data, addr + offset); } 68 69/** 70 * DSPS musb wrapper register offset. 71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 72 * musb ips. 73 */ 74struct dsps_musb_wrapper { 75 u16 revision; 76 u16 control; 77 u16 status; 78 u16 eoi; 79 u16 epintr_set; 80 u16 epintr_clear; 81 u16 epintr_status; 82 u16 coreintr_set; 83 u16 coreintr_clear; 84 u16 coreintr_status; 85 u16 phy_utmi; 86 u16 mode; 87 88 /* bit positions for control */ 89 unsigned reset:5; 90 91 /* bit positions for interrupt */ 92 unsigned usb_shift:5; 93 u32 usb_mask; 94 u32 usb_bitmap; 95 unsigned drvvbus:5; 96 97 unsigned txep_shift:5; 98 u32 txep_mask; 99 u32 txep_bitmap; 100 101 unsigned rxep_shift:5; 102 u32 rxep_mask; 103 u32 rxep_bitmap; 104 105 /* bit positions for phy_utmi */ 106 unsigned otg_disable:5; 107 108 /* bit positions for mode */ 109 unsigned iddig:5; 110 /* miscellaneous stuff */ 111 u32 musb_core_offset; 112 u8 poll_seconds; 113 /* number of musb instances */ 114 u8 instances; 115}; 116 117/** 118 * DSPS glue structure. 119 */ 120struct dsps_glue { 121 struct device *dev; 122 struct platform_device *musb[2]; /* child musb pdev */ 123 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 124 struct timer_list timer[2]; /* otg_workaround timer */ 125 unsigned long last_timer[2]; /* last timer data for each instance */ 126}; 127 128/** 129 * dsps_musb_enable - enable interrupts 130 */ 131static void dsps_musb_enable(struct musb *musb) 132{ 133 struct device *dev = musb->controller; 134 struct platform_device *pdev = to_platform_device(dev->parent); 135 struct dsps_glue *glue = platform_get_drvdata(pdev); 136 const struct dsps_musb_wrapper *wrp = glue->wrp; 137 void __iomem *reg_base = musb->ctrl_base; 138 u32 epmask, coremask; 139 140 /* Workaround: setup IRQs through both register sets. */ 141 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 142 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 143 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 144 145 dsps_writel(reg_base, wrp->epintr_set, epmask); 146 dsps_writel(reg_base, wrp->coreintr_set, coremask); 147 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 148 dsps_writel(reg_base, wrp->coreintr_set, 149 (1 << wrp->drvvbus) << wrp->usb_shift); 150} 151 152/** 153 * dsps_musb_disable - disable HDRC and flush interrupts 154 */ 155static void dsps_musb_disable(struct musb *musb) 156{ 157 struct device *dev = musb->controller; 158 struct platform_device *pdev = to_platform_device(dev->parent); 159 struct dsps_glue *glue = platform_get_drvdata(pdev); 160 const struct dsps_musb_wrapper *wrp = glue->wrp; 161 void __iomem *reg_base = musb->ctrl_base; 162 163 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 164 dsps_writel(reg_base, wrp->epintr_clear, 165 wrp->txep_bitmap | wrp->rxep_bitmap); 166 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 167 dsps_writel(reg_base, wrp->eoi, 0); 168} 169 170static void otg_timer(unsigned long _musb) 171{ 172 struct musb *musb = (void *)_musb; 173 void __iomem *mregs = musb->mregs; 174 struct device *dev = musb->controller; 175 struct platform_device *pdev = to_platform_device(dev); 176 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 177 const struct dsps_musb_wrapper *wrp = glue->wrp; 178 u8 devctl; 179 unsigned long flags; 180 181 /* 182 * We poll because DSPS IP's won't expose several OTG-critical 183 * status change events (from the transceiver) otherwise. 184 */ 185 devctl = dsps_readb(mregs, MUSB_DEVCTL); 186 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 187 otg_state_string(musb->xceiv->state)); 188 189 spin_lock_irqsave(&musb->lock, flags); 190 switch (musb->xceiv->state) { 191 case OTG_STATE_A_WAIT_BCON: 192 devctl &= ~MUSB_DEVCTL_SESSION; 193 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 194 195 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 196 if (devctl & MUSB_DEVCTL_BDEVICE) { 197 musb->xceiv->state = OTG_STATE_B_IDLE; 198 MUSB_DEV_MODE(musb); 199 } else { 200 musb->xceiv->state = OTG_STATE_A_IDLE; 201 MUSB_HST_MODE(musb); 202 } 203 break; 204 case OTG_STATE_A_WAIT_VFALL: 205 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 206 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 207 MUSB_INTR_VBUSERROR << wrp->usb_shift); 208 break; 209 case OTG_STATE_B_IDLE: 210 devctl = dsps_readb(mregs, MUSB_DEVCTL); 211 if (devctl & MUSB_DEVCTL_BDEVICE) 212 mod_timer(&glue->timer[pdev->id], 213 jiffies + wrp->poll_seconds * HZ); 214 else 215 musb->xceiv->state = OTG_STATE_A_IDLE; 216 break; 217 default: 218 break; 219 } 220 spin_unlock_irqrestore(&musb->lock, flags); 221} 222 223static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 224{ 225 struct device *dev = musb->controller; 226 struct platform_device *pdev = to_platform_device(dev); 227 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 228 229 if (timeout == 0) 230 timeout = jiffies + msecs_to_jiffies(3); 231 232 /* Never idle if active, or when VBUS timeout is not set as host */ 233 if (musb->is_active || (musb->a_wait_bcon == 0 && 234 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 235 dev_dbg(musb->controller, "%s active, deleting timer\n", 236 otg_state_string(musb->xceiv->state)); 237 del_timer(&glue->timer[pdev->id]); 238 glue->last_timer[pdev->id] = jiffies; 239 return; 240 } 241 242 if (time_after(glue->last_timer[pdev->id], timeout) && 243 timer_pending(&glue->timer[pdev->id])) { 244 dev_dbg(musb->controller, 245 "Longer idle timer already pending, ignoring...\n"); 246 return; 247 } 248 glue->last_timer[pdev->id] = timeout; 249 250 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 251 otg_state_string(musb->xceiv->state), 252 jiffies_to_msecs(timeout - jiffies)); 253 mod_timer(&glue->timer[pdev->id], timeout); 254} 255 256static irqreturn_t dsps_interrupt(int irq, void *hci) 257{ 258 struct musb *musb = hci; 259 void __iomem *reg_base = musb->ctrl_base; 260 struct device *dev = musb->controller; 261 struct platform_device *pdev = to_platform_device(dev); 262 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 263 const struct dsps_musb_wrapper *wrp = glue->wrp; 264 unsigned long flags; 265 irqreturn_t ret = IRQ_NONE; 266 u32 epintr, usbintr; 267 268 spin_lock_irqsave(&musb->lock, flags); 269 270 /* Get endpoint interrupts */ 271 epintr = dsps_readl(reg_base, wrp->epintr_status); 272 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 273 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 274 275 if (epintr) 276 dsps_writel(reg_base, wrp->epintr_status, epintr); 277 278 /* Get usb core interrupts */ 279 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 280 if (!usbintr && !epintr) 281 goto eoi; 282 283 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 284 if (usbintr) 285 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 286 287 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 288 usbintr, epintr); 289 /* 290 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 291 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 292 * switch appropriately between halves of the OTG state machine. 293 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 294 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 295 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 296 */ 297 if (usbintr & MUSB_INTR_BABBLE) 298 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 299 300 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 301 int drvvbus = dsps_readl(reg_base, wrp->status); 302 void __iomem *mregs = musb->mregs; 303 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 304 int err; 305 306 err = musb->int_usb & MUSB_INTR_VBUSERROR; 307 if (err) { 308 /* 309 * The Mentor core doesn't debounce VBUS as needed 310 * to cope with device connect current spikes. This 311 * means it's not uncommon for bus-powered devices 312 * to get VBUS errors during enumeration. 313 * 314 * This is a workaround, but newer RTL from Mentor 315 * seems to allow a better one: "re"-starting sessions 316 * without waiting for VBUS to stop registering in 317 * devctl. 318 */ 319 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 320 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 321 mod_timer(&glue->timer[pdev->id], 322 jiffies + wrp->poll_seconds * HZ); 323 WARNING("VBUS error workaround (delay coming)\n"); 324 } else if (drvvbus) { 325 musb->is_active = 1; 326 MUSB_HST_MODE(musb); 327 musb->xceiv->otg->default_a = 1; 328 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 329 del_timer(&glue->timer[pdev->id]); 330 } else { 331 musb->is_active = 0; 332 MUSB_DEV_MODE(musb); 333 musb->xceiv->otg->default_a = 0; 334 musb->xceiv->state = OTG_STATE_B_IDLE; 335 } 336 337 /* NOTE: this must complete power-on within 100 ms. */ 338 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 339 drvvbus ? "on" : "off", 340 otg_state_string(musb->xceiv->state), 341 err ? " ERROR" : "", 342 devctl); 343 ret = IRQ_HANDLED; 344 } 345 346 if (musb->int_tx || musb->int_rx || musb->int_usb) 347 ret |= musb_interrupt(musb); 348 349 eoi: 350 /* EOI needs to be written for the IRQ to be re-asserted. */ 351 if (ret == IRQ_HANDLED || epintr || usbintr) 352 dsps_writel(reg_base, wrp->eoi, 1); 353 354 /* Poll for ID change */ 355 if (musb->xceiv->state == OTG_STATE_B_IDLE) 356 mod_timer(&glue->timer[pdev->id], 357 jiffies + wrp->poll_seconds * HZ); 358 359 spin_unlock_irqrestore(&musb->lock, flags); 360 361 return ret; 362} 363 364static int dsps_musb_init(struct musb *musb) 365{ 366 struct device *dev = musb->controller; 367 struct musb_hdrc_platform_data *plat = dev->platform_data; 368 struct platform_device *pdev = to_platform_device(dev); 369 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 370 const struct dsps_musb_wrapper *wrp = glue->wrp; 371 struct omap_musb_board_data *data = plat->board_data; 372 void __iomem *reg_base = musb->ctrl_base; 373 u32 rev, val; 374 int status; 375 376 /* mentor core register starts at offset of 0x400 from musb base */ 377 musb->mregs += wrp->musb_core_offset; 378 379 /* Get the NOP PHY */ 380 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 381 if (IS_ERR_OR_NULL(musb->xceiv)) 382 return -ENODEV; 383 384 /* Returns zero if e.g. not clocked */ 385 rev = dsps_readl(reg_base, wrp->revision); 386 if (!rev) { 387 status = -ENODEV; 388 goto err0; 389 } 390 391 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb); 392 393 /* Reset the musb */ 394 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 395 396 /* Start the on-chip PHY and its PLL. */ 397 if (data->set_phy_power) 398 data->set_phy_power(1); 399 400 musb->isr = dsps_interrupt; 401 402 /* reset the otgdisable bit, needed for host mode to work */ 403 val = dsps_readl(reg_base, wrp->phy_utmi); 404 val &= ~(1 << wrp->otg_disable); 405 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 406 407 /* clear level interrupt */ 408 dsps_writel(reg_base, wrp->eoi, 0); 409 410 return 0; 411err0: 412 usb_put_phy(musb->xceiv); 413 usb_nop_xceiv_unregister(); 414 return status; 415} 416 417static int dsps_musb_exit(struct musb *musb) 418{ 419 struct device *dev = musb->controller; 420 struct musb_hdrc_platform_data *plat = dev->platform_data; 421 struct omap_musb_board_data *data = plat->board_data; 422 struct platform_device *pdev = to_platform_device(dev); 423 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 424 425 del_timer_sync(&glue->timer[pdev->id]); 426 427 /* Shutdown the on-chip PHY and its PLL. */ 428 if (data->set_phy_power) 429 data->set_phy_power(0); 430 431 /* NOP driver needs change if supporting dual instance */ 432 usb_put_phy(musb->xceiv); 433 usb_nop_xceiv_unregister(); 434 435 return 0; 436} 437 438static struct musb_platform_ops dsps_ops = { 439 .init = dsps_musb_init, 440 .exit = dsps_musb_exit, 441 442 .enable = dsps_musb_enable, 443 .disable = dsps_musb_disable, 444 445 .try_idle = dsps_musb_try_idle, 446}; 447 448static u64 musb_dmamask = DMA_BIT_MASK(32); 449 450static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 451{ 452 struct device *dev = glue->dev; 453 struct platform_device *pdev = to_platform_device(dev); 454 struct musb_hdrc_platform_data *pdata = dev->platform_data; 455 struct device_node *np = pdev->dev.of_node; 456 struct musb_hdrc_config *config; 457 struct platform_device *musb; 458 struct resource *res; 459 struct resource resources[2]; 460 char res_name[10]; 461 int ret, musbid; 462 463 /* get memory resource */ 464 sprintf(res_name, "musb%d", id); 465 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 466 if (!res) { 467 dev_err(dev, "%s get mem resource failed\n", res_name); 468 ret = -ENODEV; 469 goto err0; 470 } 471 res->parent = NULL; 472 resources[0] = *res; 473 474 /* get irq resource */ 475 sprintf(res_name, "musb%d-irq", id); 476 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 477 if (!res) { 478 dev_err(dev, "%s get irq resource failed\n", res_name); 479 ret = -ENODEV; 480 goto err0; 481 } 482 strcpy((u8 *)res->name, "mc"); 483 res->parent = NULL; 484 resources[1] = *res; 485 486 /* get the musb id */ 487 musbid = musb_get_id(dev, GFP_KERNEL); 488 if (musbid < 0) { 489 dev_err(dev, "failed to allocate musb id\n"); 490 ret = -ENOMEM; 491 goto err0; 492 } 493 /* allocate the child platform device */ 494 musb = platform_device_alloc("musb-hdrc", musbid); 495 if (!musb) { 496 dev_err(dev, "failed to allocate musb device\n"); 497 ret = -ENOMEM; 498 goto err1; 499 } 500 501 musb->id = musbid; 502 musb->dev.parent = dev; 503 musb->dev.dma_mask = &musb_dmamask; 504 musb->dev.coherent_dma_mask = musb_dmamask; 505 506 glue->musb[id] = musb; 507 508 ret = platform_device_add_resources(musb, resources, 2); 509 if (ret) { 510 dev_err(dev, "failed to add resources\n"); 511 goto err2; 512 } 513 514 if (np) { 515 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 516 if (!pdata) { 517 dev_err(&pdev->dev, 518 "failed to allocate musb platfrom data\n"); 519 ret = -ENOMEM; 520 goto err2; 521 } 522 523 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); 524 if (!config) { 525 dev_err(&pdev->dev, 526 "failed to allocate musb hdrc config\n"); 527 goto err2; 528 } 529 530 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps); 531 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits); 532 sprintf(res_name, "port%d-mode", id); 533 of_property_read_u32(np, res_name, (u32 *)&pdata->mode); 534 of_property_read_u32(np, "power", (u32 *)&pdata->power); 535 config->multipoint = of_property_read_bool(np, "multipoint"); 536 537 pdata->config = config; 538 } 539 540 pdata->platform_ops = &dsps_ops; 541 542 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 543 if (ret) { 544 dev_err(dev, "failed to add platform_data\n"); 545 goto err2; 546 } 547 548 ret = platform_device_add(musb); 549 if (ret) { 550 dev_err(dev, "failed to register musb device\n"); 551 goto err2; 552 } 553 554 return 0; 555 556err2: 557 platform_device_put(musb); 558err1: 559 musb_put_id(dev, musbid); 560err0: 561 return ret; 562} 563 564static void dsps_delete_musb_pdev(struct dsps_glue *glue, u8 id) 565{ 566 musb_put_id(glue->dev, glue->musb[id]->id); 567 platform_device_del(glue->musb[id]); 568 platform_device_put(glue->musb[id]); 569} 570 571static int __devinit dsps_probe(struct platform_device *pdev) 572{ 573 struct device_node *np = pdev->dev.of_node; 574 const struct of_device_id *match; 575 const struct dsps_musb_wrapper *wrp; 576 struct dsps_glue *glue; 577 struct resource *iomem; 578 int ret, i; 579 580 match = of_match_node(musb_dsps_of_match, np); 581 if (!match) { 582 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 583 ret = -EINVAL; 584 goto err0; 585 } 586 wrp = match->data; 587 588 /* allocate glue */ 589 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 590 if (!glue) { 591 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 592 ret = -ENOMEM; 593 goto err0; 594 } 595 596 /* get memory resource */ 597 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 598 if (!iomem) { 599 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 600 ret = -ENODEV; 601 goto err1; 602 } 603 604 glue->dev = &pdev->dev; 605 606 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 607 if (!glue->wrp) { 608 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 609 ret = -ENOMEM; 610 goto err1; 611 } 612 platform_set_drvdata(pdev, glue); 613 614 /* create the child platform device for first instances of musb */ 615 ret = dsps_create_musb_pdev(glue, 0); 616 if (ret != 0) { 617 dev_err(&pdev->dev, "failed to create child pdev\n"); 618 goto err2; 619 } 620 621 /* enable the usbss clocks */ 622 pm_runtime_enable(&pdev->dev); 623 624 ret = pm_runtime_get_sync(&pdev->dev); 625 if (ret < 0) { 626 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 627 /* create the child platform device for all instances of musb */ 628 for (i = 0; i < wrp->instances ; i++) { 629 ret = dsps_create_musb_pdev(glue, i); 630 if (ret != 0) { 631 dev_err(&pdev->dev, "failed to create child pdev\n"); 632 /* release resources of previously created instances */ 633 for (i--; i >= 0 ; i--) 634 dsps_delete_musb_pdev(glue, i); 635 goto err3; 636 } 637 } 638 639 return 0; 640 641err3: 642 pm_runtime_disable(&pdev->dev); 643err2: 644 kfree(glue->wrp); 645err1: 646 kfree(glue); 647err0: 648 return ret; 649} 650static int __devexit dsps_remove(struct platform_device *pdev) 651{ 652 struct dsps_glue *glue = platform_get_drvdata(pdev); 653 const struct dsps_musb_wrapper *wrp = glue->wrp; 654 int i; 655 656 /* delete the child platform device */ 657 for (i = 0; i < wrp->instances ; i++) 658 dsps_delete_musb_pdev(glue, i); 659 660 /* disable usbss clocks */ 661 pm_runtime_put(&pdev->dev); 662 pm_runtime_disable(&pdev->dev); 663 kfree(glue->wrp); 664 kfree(glue); 665 return 0; 666} 667 668#ifdef CONFIG_PM_SLEEP 669static int dsps_suspend(struct device *dev) 670{ 671 struct musb_hdrc_platform_data *plat = dev->platform_data; 672 struct omap_musb_board_data *data = plat->board_data; 673 674 /* Shutdown the on-chip PHY and its PLL. */ 675 if (data->set_phy_power) 676 data->set_phy_power(0); 677 678 return 0; 679} 680 681static int dsps_resume(struct device *dev) 682{ 683 struct musb_hdrc_platform_data *plat = dev->platform_data; 684 struct omap_musb_board_data *data = plat->board_data; 685 686 /* Start the on-chip PHY and its PLL. */ 687 if (data->set_phy_power) 688 data->set_phy_power(1); 689 690 return 0; 691} 692#endif 693 694static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 695 696static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 697 .revision = 0x00, 698 .control = 0x14, 699 .status = 0x18, 700 .eoi = 0x24, 701 .epintr_set = 0x38, 702 .epintr_clear = 0x40, 703 .epintr_status = 0x30, 704 .coreintr_set = 0x3c, 705 .coreintr_clear = 0x44, 706 .coreintr_status = 0x34, 707 .phy_utmi = 0xe0, 708 .mode = 0xe8, 709 .reset = 0, 710 .otg_disable = 21, 711 .iddig = 8, 712 .usb_shift = 0, 713 .usb_mask = 0x1ff, 714 .usb_bitmap = (0x1ff << 0), 715 .drvvbus = 8, 716 .txep_shift = 0, 717 .txep_mask = 0xffff, 718 .txep_bitmap = (0xffff << 0), 719 .rxep_shift = 16, 720 .rxep_mask = 0xfffe, 721 .rxep_bitmap = (0xfffe << 16), 722 .musb_core_offset = 0x400, 723 .poll_seconds = 2, 724 .instances = 2, 725}; 726 727static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 728 { 729 .name = "musb-ti81xx", 730 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 731 }, 732 { }, /* Terminating Entry */ 733}; 734MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 735 736#ifdef CONFIG_OF 737static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 738 { .compatible = "ti,musb-am33xx", 739 .data = (void *) &ti81xx_driver_data, }, 740 { }, 741}; 742MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 743#endif 744 745static struct platform_driver dsps_usbss_driver = { 746 .probe = dsps_probe, 747 .remove = __devexit_p(dsps_remove), 748 .driver = { 749 .name = "musb-dsps", 750 .pm = &dsps_pm_ops, 751 .of_match_table = of_match_ptr(musb_dsps_of_match), 752 }, 753 .id_table = musb_dsps_id_table, 754}; 755 756MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 757MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 758MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 759MODULE_LICENSE("GPL v2"); 760 761static int __init dsps_init(void) 762{ 763 return platform_driver_register(&dsps_usbss_driver); 764} 765subsys_initcall(dsps_init); 766 767static void __exit dsps_exit(void) 768{ 769 platform_driver_unregister(&dsps_usbss_driver); 770} 771module_exit(dsps_exit); 772