musb_dsps.c revision de9db572fe5135bb2cf5bb2d8520f99a56b21d9b
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/io.h> 33#include <linux/err.h> 34#include <linux/platform_device.h> 35#include <linux/dma-mapping.h> 36#include <linux/pm_runtime.h> 37#include <linux/module.h> 38#include <linux/usb/usb_phy_gen_xceiv.h> 39#include <linux/platform_data/usb-omap.h> 40#include <linux/sizes.h> 41 42#include <linux/of.h> 43#include <linux/of_device.h> 44#include <linux/of_address.h> 45#include <linux/of_irq.h> 46#include <linux/usb/of.h> 47 48#include "musb_core.h" 49 50static const struct of_device_id musb_dsps_of_match[]; 51 52/** 53 * avoid using musb_readx()/musb_writex() as glue layer should not be 54 * dependent on musb core layer symbols. 55 */ 56static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 57 { return __raw_readb(addr + offset); } 58 59static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 60 { return __raw_readl(addr + offset); } 61 62static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 63 { __raw_writeb(data, addr + offset); } 64 65static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 66 { __raw_writel(data, addr + offset); } 67 68/** 69 * DSPS musb wrapper register offset. 70 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 71 * musb ips. 72 */ 73struct dsps_musb_wrapper { 74 u16 revision; 75 u16 control; 76 u16 status; 77 u16 epintr_set; 78 u16 epintr_clear; 79 u16 epintr_status; 80 u16 coreintr_set; 81 u16 coreintr_clear; 82 u16 coreintr_status; 83 u16 phy_utmi; 84 u16 mode; 85 u16 tx_mode; 86 u16 rx_mode; 87 88 /* bit positions for control */ 89 unsigned reset:5; 90 91 /* bit positions for interrupt */ 92 unsigned usb_shift:5; 93 u32 usb_mask; 94 u32 usb_bitmap; 95 unsigned drvvbus:5; 96 97 unsigned txep_shift:5; 98 u32 txep_mask; 99 u32 txep_bitmap; 100 101 unsigned rxep_shift:5; 102 u32 rxep_mask; 103 u32 rxep_bitmap; 104 105 /* bit positions for phy_utmi */ 106 unsigned otg_disable:5; 107 108 /* bit positions for mode */ 109 unsigned iddig:5; 110 unsigned iddig_mux:5; 111 /* miscellaneous stuff */ 112 u8 poll_seconds; 113}; 114 115/* 116 * register shadow for suspend 117 */ 118struct dsps_context { 119 u32 control; 120 u32 epintr; 121 u32 coreintr; 122 u32 phy_utmi; 123 u32 mode; 124 u32 tx_mode; 125 u32 rx_mode; 126}; 127 128/** 129 * DSPS glue structure. 130 */ 131struct dsps_glue { 132 struct device *dev; 133 struct platform_device *musb; /* child musb pdev */ 134 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 135 struct timer_list timer; /* otg_workaround timer */ 136 unsigned long last_timer; /* last timer data for each instance */ 137 138 struct dsps_context context; 139}; 140 141static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 142{ 143 struct device *dev = musb->controller; 144 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 145 146 if (timeout == 0) 147 timeout = jiffies + msecs_to_jiffies(3); 148 149 /* Never idle if active, or when VBUS timeout is not set as host */ 150 if (musb->is_active || (musb->a_wait_bcon == 0 && 151 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 152 dev_dbg(musb->controller, "%s active, deleting timer\n", 153 usb_otg_state_string(musb->xceiv->state)); 154 del_timer(&glue->timer); 155 glue->last_timer = jiffies; 156 return; 157 } 158 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) 159 return; 160 161 if (!musb->g.dev.driver) 162 return; 163 164 if (time_after(glue->last_timer, timeout) && 165 timer_pending(&glue->timer)) { 166 dev_dbg(musb->controller, 167 "Longer idle timer already pending, ignoring...\n"); 168 return; 169 } 170 glue->last_timer = timeout; 171 172 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 173 usb_otg_state_string(musb->xceiv->state), 174 jiffies_to_msecs(timeout - jiffies)); 175 mod_timer(&glue->timer, timeout); 176} 177 178/** 179 * dsps_musb_enable - enable interrupts 180 */ 181static void dsps_musb_enable(struct musb *musb) 182{ 183 struct device *dev = musb->controller; 184 struct platform_device *pdev = to_platform_device(dev->parent); 185 struct dsps_glue *glue = platform_get_drvdata(pdev); 186 const struct dsps_musb_wrapper *wrp = glue->wrp; 187 void __iomem *reg_base = musb->ctrl_base; 188 u32 epmask, coremask; 189 190 /* Workaround: setup IRQs through both register sets. */ 191 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 192 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 193 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 194 195 dsps_writel(reg_base, wrp->epintr_set, epmask); 196 dsps_writel(reg_base, wrp->coreintr_set, coremask); 197 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 198 dsps_writel(reg_base, wrp->coreintr_set, 199 (1 << wrp->drvvbus) << wrp->usb_shift); 200 dsps_musb_try_idle(musb, 0); 201} 202 203/** 204 * dsps_musb_disable - disable HDRC and flush interrupts 205 */ 206static void dsps_musb_disable(struct musb *musb) 207{ 208 struct device *dev = musb->controller; 209 struct platform_device *pdev = to_platform_device(dev->parent); 210 struct dsps_glue *glue = platform_get_drvdata(pdev); 211 const struct dsps_musb_wrapper *wrp = glue->wrp; 212 void __iomem *reg_base = musb->ctrl_base; 213 214 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 215 dsps_writel(reg_base, wrp->epintr_clear, 216 wrp->txep_bitmap | wrp->rxep_bitmap); 217 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 218} 219 220static void otg_timer(unsigned long _musb) 221{ 222 struct musb *musb = (void *)_musb; 223 void __iomem *mregs = musb->mregs; 224 struct device *dev = musb->controller; 225 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 226 const struct dsps_musb_wrapper *wrp = glue->wrp; 227 u8 devctl; 228 unsigned long flags; 229 int skip_session = 0; 230 231 /* 232 * We poll because DSPS IP's won't expose several OTG-critical 233 * status change events (from the transceiver) otherwise. 234 */ 235 devctl = dsps_readb(mregs, MUSB_DEVCTL); 236 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 237 usb_otg_state_string(musb->xceiv->state)); 238 239 spin_lock_irqsave(&musb->lock, flags); 240 switch (musb->xceiv->state) { 241 case OTG_STATE_A_WAIT_BCON: 242 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 243 skip_session = 1; 244 /* fall */ 245 246 case OTG_STATE_A_IDLE: 247 case OTG_STATE_B_IDLE: 248 if (devctl & MUSB_DEVCTL_BDEVICE) { 249 musb->xceiv->state = OTG_STATE_B_IDLE; 250 MUSB_DEV_MODE(musb); 251 } else { 252 musb->xceiv->state = OTG_STATE_A_IDLE; 253 MUSB_HST_MODE(musb); 254 } 255 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 256 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 257 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 258 break; 259 case OTG_STATE_A_WAIT_VFALL: 260 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 261 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 262 MUSB_INTR_VBUSERROR << wrp->usb_shift); 263 break; 264 default: 265 break; 266 } 267 spin_unlock_irqrestore(&musb->lock, flags); 268} 269 270static irqreturn_t dsps_interrupt(int irq, void *hci) 271{ 272 struct musb *musb = hci; 273 void __iomem *reg_base = musb->ctrl_base; 274 struct device *dev = musb->controller; 275 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 276 const struct dsps_musb_wrapper *wrp = glue->wrp; 277 unsigned long flags; 278 irqreturn_t ret = IRQ_NONE; 279 u32 epintr, usbintr; 280 281 spin_lock_irqsave(&musb->lock, flags); 282 283 /* Get endpoint interrupts */ 284 epintr = dsps_readl(reg_base, wrp->epintr_status); 285 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 286 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 287 288 if (epintr) 289 dsps_writel(reg_base, wrp->epintr_status, epintr); 290 291 /* Get usb core interrupts */ 292 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 293 if (!usbintr && !epintr) 294 goto out; 295 296 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 297 if (usbintr) 298 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 299 300 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 301 usbintr, epintr); 302 /* 303 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 304 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 305 * switch appropriately between halves of the OTG state machine. 306 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 307 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 308 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 309 */ 310 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) 311 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 312 313 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 314 int drvvbus = dsps_readl(reg_base, wrp->status); 315 void __iomem *mregs = musb->mregs; 316 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 317 int err; 318 319 err = musb->int_usb & MUSB_INTR_VBUSERROR; 320 if (err) { 321 /* 322 * The Mentor core doesn't debounce VBUS as needed 323 * to cope with device connect current spikes. This 324 * means it's not uncommon for bus-powered devices 325 * to get VBUS errors during enumeration. 326 * 327 * This is a workaround, but newer RTL from Mentor 328 * seems to allow a better one: "re"-starting sessions 329 * without waiting for VBUS to stop registering in 330 * devctl. 331 */ 332 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 333 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 334 mod_timer(&glue->timer, 335 jiffies + wrp->poll_seconds * HZ); 336 WARNING("VBUS error workaround (delay coming)\n"); 337 } else if (drvvbus) { 338 MUSB_HST_MODE(musb); 339 musb->xceiv->otg->default_a = 1; 340 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 341 del_timer(&glue->timer); 342 } else { 343 musb->is_active = 0; 344 MUSB_DEV_MODE(musb); 345 musb->xceiv->otg->default_a = 0; 346 musb->xceiv->state = OTG_STATE_B_IDLE; 347 } 348 349 /* NOTE: this must complete power-on within 100 ms. */ 350 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 351 drvvbus ? "on" : "off", 352 usb_otg_state_string(musb->xceiv->state), 353 err ? " ERROR" : "", 354 devctl); 355 ret = IRQ_HANDLED; 356 } 357 358 if (musb->int_tx || musb->int_rx || musb->int_usb) 359 ret |= musb_interrupt(musb); 360 361 /* Poll for ID change in OTG port mode */ 362 if (musb->xceiv->state == OTG_STATE_B_IDLE && 363 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 364 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 365out: 366 spin_unlock_irqrestore(&musb->lock, flags); 367 368 return ret; 369} 370 371static int dsps_musb_init(struct musb *musb) 372{ 373 struct device *dev = musb->controller; 374 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 375 struct platform_device *parent = to_platform_device(dev->parent); 376 const struct dsps_musb_wrapper *wrp = glue->wrp; 377 void __iomem *reg_base; 378 struct resource *r; 379 u32 rev, val; 380 381 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 382 if (!r) 383 return -EINVAL; 384 385 reg_base = devm_ioremap_resource(dev, r); 386 if (IS_ERR(reg_base)) 387 return PTR_ERR(reg_base); 388 musb->ctrl_base = reg_base; 389 390 /* NOP driver needs change if supporting dual instance */ 391 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); 392 if (IS_ERR(musb->xceiv)) 393 return PTR_ERR(musb->xceiv); 394 395 /* Returns zero if e.g. not clocked */ 396 rev = dsps_readl(reg_base, wrp->revision); 397 if (!rev) 398 return -ENODEV; 399 400 usb_phy_init(musb->xceiv); 401 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 402 403 /* Reset the musb */ 404 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 405 406 musb->isr = dsps_interrupt; 407 408 /* reset the otgdisable bit, needed for host mode to work */ 409 val = dsps_readl(reg_base, wrp->phy_utmi); 410 val &= ~(1 << wrp->otg_disable); 411 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 412 413 return 0; 414} 415 416static int dsps_musb_exit(struct musb *musb) 417{ 418 struct device *dev = musb->controller; 419 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 420 421 del_timer_sync(&glue->timer); 422 423 usb_phy_shutdown(musb->xceiv); 424 return 0; 425} 426 427static int dsps_musb_set_mode(struct musb *musb, u8 mode) 428{ 429 struct device *dev = musb->controller; 430 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 431 const struct dsps_musb_wrapper *wrp = glue->wrp; 432 void __iomem *ctrl_base = musb->ctrl_base; 433 void __iomem *base = musb->mregs; 434 u32 reg; 435 436 reg = dsps_readl(base, wrp->mode); 437 438 switch (mode) { 439 case MUSB_HOST: 440 reg &= ~(1 << wrp->iddig); 441 442 /* 443 * if we're setting mode to host-only or device-only, we're 444 * going to ignore whatever the PHY sends us and just force 445 * ID pin status by SW 446 */ 447 reg |= (1 << wrp->iddig_mux); 448 449 dsps_writel(base, wrp->mode, reg); 450 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); 451 break; 452 case MUSB_PERIPHERAL: 453 reg |= (1 << wrp->iddig); 454 455 /* 456 * if we're setting mode to host-only or device-only, we're 457 * going to ignore whatever the PHY sends us and just force 458 * ID pin status by SW 459 */ 460 reg |= (1 << wrp->iddig_mux); 461 462 dsps_writel(base, wrp->mode, reg); 463 break; 464 case MUSB_OTG: 465 dsps_writel(base, wrp->phy_utmi, 0x02); 466 break; 467 default: 468 dev_err(glue->dev, "unsupported mode %d\n", mode); 469 return -EINVAL; 470 } 471 472 return 0; 473} 474 475static struct musb_platform_ops dsps_ops = { 476 .init = dsps_musb_init, 477 .exit = dsps_musb_exit, 478 479 .enable = dsps_musb_enable, 480 .disable = dsps_musb_disable, 481 482 .try_idle = dsps_musb_try_idle, 483 .set_mode = dsps_musb_set_mode, 484}; 485 486static u64 musb_dmamask = DMA_BIT_MASK(32); 487 488static int get_int_prop(struct device_node *dn, const char *s) 489{ 490 int ret; 491 u32 val; 492 493 ret = of_property_read_u32(dn, s, &val); 494 if (ret) 495 return 0; 496 return val; 497} 498 499static int get_musb_port_mode(struct device *dev) 500{ 501 enum usb_dr_mode mode; 502 503 mode = of_usb_get_dr_mode(dev->of_node); 504 switch (mode) { 505 case USB_DR_MODE_HOST: 506 return MUSB_PORT_MODE_HOST; 507 508 case USB_DR_MODE_PERIPHERAL: 509 return MUSB_PORT_MODE_GADGET; 510 511 case USB_DR_MODE_UNKNOWN: 512 case USB_DR_MODE_OTG: 513 default: 514 return MUSB_PORT_MODE_DUAL_ROLE; 515 } 516} 517 518static int dsps_create_musb_pdev(struct dsps_glue *glue, 519 struct platform_device *parent) 520{ 521 struct musb_hdrc_platform_data pdata; 522 struct resource resources[2]; 523 struct resource *res; 524 struct device *dev = &parent->dev; 525 struct musb_hdrc_config *config; 526 struct platform_device *musb; 527 struct device_node *dn = parent->dev.of_node; 528 int ret; 529 530 memset(resources, 0, sizeof(resources)); 531 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 532 if (!res) { 533 dev_err(dev, "failed to get memory.\n"); 534 return -EINVAL; 535 } 536 resources[0] = *res; 537 538 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 539 if (!res) { 540 dev_err(dev, "failed to get irq.\n"); 541 return -EINVAL; 542 } 543 resources[1] = *res; 544 545 /* allocate the child platform device */ 546 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 547 if (!musb) { 548 dev_err(dev, "failed to allocate musb device\n"); 549 return -ENOMEM; 550 } 551 552 musb->dev.parent = dev; 553 musb->dev.dma_mask = &musb_dmamask; 554 musb->dev.coherent_dma_mask = musb_dmamask; 555 musb->dev.of_node = of_node_get(dn); 556 557 glue->musb = musb; 558 559 ret = platform_device_add_resources(musb, resources, 560 ARRAY_SIZE(resources)); 561 if (ret) { 562 dev_err(dev, "failed to add resources\n"); 563 goto err; 564 } 565 566 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 567 if (!config) { 568 dev_err(dev, "failed to allocate musb hdrc config\n"); 569 ret = -ENOMEM; 570 goto err; 571 } 572 pdata.config = config; 573 pdata.platform_ops = &dsps_ops; 574 575 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 576 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 577 config->host_port_deassert_reset_at_resume = 1; 578 pdata.mode = get_musb_port_mode(dev); 579 /* DT keeps this entry in mA, musb expects it as per USB spec */ 580 pdata.power = get_int_prop(dn, "mentor,power") / 2; 581 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 582 583 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 584 if (ret) { 585 dev_err(dev, "failed to add platform_data\n"); 586 goto err; 587 } 588 589 ret = platform_device_add(musb); 590 if (ret) { 591 dev_err(dev, "failed to register musb device\n"); 592 goto err; 593 } 594 return 0; 595 596err: 597 platform_device_put(musb); 598 return ret; 599} 600 601static int dsps_probe(struct platform_device *pdev) 602{ 603 const struct of_device_id *match; 604 const struct dsps_musb_wrapper *wrp; 605 struct dsps_glue *glue; 606 int ret; 607 608 if (!strcmp(pdev->name, "musb-hdrc")) 609 return -ENODEV; 610 611 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 612 if (!match) { 613 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 614 return -EINVAL; 615 } 616 wrp = match->data; 617 618 /* allocate glue */ 619 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 620 if (!glue) { 621 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 622 return -ENOMEM; 623 } 624 625 glue->dev = &pdev->dev; 626 glue->wrp = wrp; 627 628 platform_set_drvdata(pdev, glue); 629 pm_runtime_enable(&pdev->dev); 630 631 ret = pm_runtime_get_sync(&pdev->dev); 632 if (ret < 0) { 633 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 634 goto err2; 635 } 636 637 ret = dsps_create_musb_pdev(glue, pdev); 638 if (ret) 639 goto err3; 640 641 return 0; 642 643err3: 644 pm_runtime_put(&pdev->dev); 645err2: 646 pm_runtime_disable(&pdev->dev); 647 return ret; 648} 649 650static int dsps_remove(struct platform_device *pdev) 651{ 652 struct dsps_glue *glue = platform_get_drvdata(pdev); 653 654 platform_device_unregister(glue->musb); 655 656 /* disable usbss clocks */ 657 pm_runtime_put(&pdev->dev); 658 pm_runtime_disable(&pdev->dev); 659 return 0; 660} 661 662static const struct dsps_musb_wrapper am33xx_driver_data = { 663 .revision = 0x00, 664 .control = 0x14, 665 .status = 0x18, 666 .epintr_set = 0x38, 667 .epintr_clear = 0x40, 668 .epintr_status = 0x30, 669 .coreintr_set = 0x3c, 670 .coreintr_clear = 0x44, 671 .coreintr_status = 0x34, 672 .phy_utmi = 0xe0, 673 .mode = 0xe8, 674 .tx_mode = 0x70, 675 .rx_mode = 0x74, 676 .reset = 0, 677 .otg_disable = 21, 678 .iddig = 8, 679 .iddig_mux = 7, 680 .usb_shift = 0, 681 .usb_mask = 0x1ff, 682 .usb_bitmap = (0x1ff << 0), 683 .drvvbus = 8, 684 .txep_shift = 0, 685 .txep_mask = 0xffff, 686 .txep_bitmap = (0xffff << 0), 687 .rxep_shift = 16, 688 .rxep_mask = 0xfffe, 689 .rxep_bitmap = (0xfffe << 16), 690 .poll_seconds = 2, 691}; 692 693static const struct of_device_id musb_dsps_of_match[] = { 694 { .compatible = "ti,musb-am33xx", 695 .data = (void *) &am33xx_driver_data, }, 696 { }, 697}; 698MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 699 700#ifdef CONFIG_PM 701static int dsps_suspend(struct device *dev) 702{ 703 struct dsps_glue *glue = dev_get_drvdata(dev); 704 const struct dsps_musb_wrapper *wrp = glue->wrp; 705 struct musb *musb = platform_get_drvdata(glue->musb); 706 void __iomem *mbase = musb->ctrl_base; 707 708 glue->context.control = dsps_readl(mbase, wrp->control); 709 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set); 710 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set); 711 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi); 712 glue->context.mode = dsps_readl(mbase, wrp->mode); 713 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode); 714 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode); 715 716 return 0; 717} 718 719static int dsps_resume(struct device *dev) 720{ 721 struct dsps_glue *glue = dev_get_drvdata(dev); 722 const struct dsps_musb_wrapper *wrp = glue->wrp; 723 struct musb *musb = platform_get_drvdata(glue->musb); 724 void __iomem *mbase = musb->ctrl_base; 725 726 dsps_writel(mbase, wrp->control, glue->context.control); 727 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr); 728 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 729 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 730 dsps_writel(mbase, wrp->mode, glue->context.mode); 731 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 732 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 733 734 return 0; 735} 736#endif 737 738static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 739 740static struct platform_driver dsps_usbss_driver = { 741 .probe = dsps_probe, 742 .remove = dsps_remove, 743 .driver = { 744 .name = "musb-dsps", 745 .pm = &dsps_pm_ops, 746 .of_match_table = musb_dsps_of_match, 747 }, 748}; 749 750MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 751MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 752MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 753MODULE_LICENSE("GPL v2"); 754 755module_platform_driver(dsps_usbss_driver); 756