musb_dsps.c revision ded017ee6c7b90f7356bd8488f8af1c10ba90490
1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA  02111-1307  USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
34#include <linux/err.h>
35#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
39
40#include <linux/of.h>
41#include <linux/of_device.h>
42#include <linux/of_address.h>
43
44#include <plat/usb.h>
45
46#include "musb_core.h"
47
48/**
49 * avoid using musb_readx()/musb_writex() as glue layer should not be
50 * dependent on musb core layer symbols.
51 */
52static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
53	{ return __raw_readb(addr + offset); }
54
55static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
56	{ return __raw_readl(addr + offset); }
57
58static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
59	{ __raw_writeb(data, addr + offset); }
60
61static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
62	{ __raw_writel(data, addr + offset); }
63
64/**
65 * DSPS musb wrapper register offset.
66 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
67 * musb ips.
68 */
69struct dsps_musb_wrapper {
70	u16	revision;
71	u16	control;
72	u16	status;
73	u16	eoi;
74	u16	epintr_set;
75	u16	epintr_clear;
76	u16	epintr_status;
77	u16	coreintr_set;
78	u16	coreintr_clear;
79	u16	coreintr_status;
80	u16	phy_utmi;
81	u16	mode;
82
83	/* bit positions for control */
84	unsigned	reset:5;
85
86	/* bit positions for interrupt */
87	unsigned	usb_shift:5;
88	u32		usb_mask;
89	u32		usb_bitmap;
90	unsigned	drvvbus:5;
91
92	unsigned	txep_shift:5;
93	u32		txep_mask;
94	u32		txep_bitmap;
95
96	unsigned	rxep_shift:5;
97	u32		rxep_mask;
98	u32		rxep_bitmap;
99
100	/* bit positions for phy_utmi */
101	unsigned	otg_disable:5;
102
103	/* bit positions for mode */
104	unsigned	iddig:5;
105	/* miscellaneous stuff */
106	u32		musb_core_offset;
107	u8		poll_seconds;
108};
109
110/**
111 * DSPS glue structure.
112 */
113struct dsps_glue {
114	struct device *dev;
115	struct platform_device *musb;	/* child musb pdev */
116	const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
117	struct timer_list timer;	/* otg_workaround timer */
118};
119
120/**
121 * dsps_musb_enable - enable interrupts
122 */
123static void dsps_musb_enable(struct musb *musb)
124{
125	struct device *dev = musb->controller;
126	struct platform_device *pdev = to_platform_device(dev->parent);
127	struct dsps_glue *glue = platform_get_drvdata(pdev);
128	const struct dsps_musb_wrapper *wrp = glue->wrp;
129	void __iomem *reg_base = musb->ctrl_base;
130	u32 epmask, coremask;
131
132	/* Workaround: setup IRQs through both register sets. */
133	epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
134	       ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
135	coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
136
137	dsps_writel(reg_base, wrp->epintr_set, epmask);
138	dsps_writel(reg_base, wrp->coreintr_set, coremask);
139	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
140	if (is_otg_enabled(musb))
141		dsps_writel(reg_base, wrp->coreintr_set,
142			    (1 << wrp->drvvbus) << wrp->usb_shift);
143}
144
145/**
146 * dsps_musb_disable - disable HDRC and flush interrupts
147 */
148static void dsps_musb_disable(struct musb *musb)
149{
150	struct device *dev = musb->controller;
151	struct platform_device *pdev = to_platform_device(dev->parent);
152	struct dsps_glue *glue = platform_get_drvdata(pdev);
153	const struct dsps_musb_wrapper *wrp = glue->wrp;
154	void __iomem *reg_base = musb->ctrl_base;
155
156	dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
157	dsps_writel(reg_base, wrp->epintr_clear,
158			 wrp->txep_bitmap | wrp->rxep_bitmap);
159	dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
160	dsps_writel(reg_base, wrp->eoi, 0);
161}
162
163static void otg_timer(unsigned long _musb)
164{
165	struct musb *musb = (void *)_musb;
166	void __iomem *mregs = musb->mregs;
167	struct device *dev = musb->controller;
168	struct platform_device *pdev = to_platform_device(dev->parent);
169	struct dsps_glue *glue = platform_get_drvdata(pdev);
170	const struct dsps_musb_wrapper *wrp = glue->wrp;
171	u8 devctl;
172	unsigned long flags;
173
174	/*
175	 * We poll because DSPS IP's won't expose several OTG-critical
176	 * status change events (from the transceiver) otherwise.
177	 */
178	devctl = dsps_readb(mregs, MUSB_DEVCTL);
179	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
180				otg_state_string(musb->xceiv->state));
181
182	spin_lock_irqsave(&musb->lock, flags);
183	switch (musb->xceiv->state) {
184	case OTG_STATE_A_WAIT_BCON:
185		devctl &= ~MUSB_DEVCTL_SESSION;
186		dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
187
188		devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
189		if (devctl & MUSB_DEVCTL_BDEVICE) {
190			musb->xceiv->state = OTG_STATE_B_IDLE;
191			MUSB_DEV_MODE(musb);
192		} else {
193			musb->xceiv->state = OTG_STATE_A_IDLE;
194			MUSB_HST_MODE(musb);
195		}
196		break;
197	case OTG_STATE_A_WAIT_VFALL:
198		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
199		dsps_writel(musb->ctrl_base, wrp->coreintr_set,
200			    MUSB_INTR_VBUSERROR << wrp->usb_shift);
201		break;
202	case OTG_STATE_B_IDLE:
203		if (!is_peripheral_enabled(musb))
204			break;
205
206		devctl = dsps_readb(mregs, MUSB_DEVCTL);
207		if (devctl & MUSB_DEVCTL_BDEVICE)
208			mod_timer(&glue->timer,
209					jiffies + wrp->poll_seconds * HZ);
210		else
211			musb->xceiv->state = OTG_STATE_A_IDLE;
212		break;
213	default:
214		break;
215	}
216	spin_unlock_irqrestore(&musb->lock, flags);
217}
218
219static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
220{
221	struct device *dev = musb->controller;
222	struct platform_device *pdev = to_platform_device(dev->parent);
223	struct dsps_glue *glue = platform_get_drvdata(pdev);
224	static unsigned long last_timer;
225
226	if (!is_otg_enabled(musb))
227		return;
228
229	if (timeout == 0)
230		timeout = jiffies + msecs_to_jiffies(3);
231
232	/* Never idle if active, or when VBUS timeout is not set as host */
233	if (musb->is_active || (musb->a_wait_bcon == 0 &&
234				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
235		dev_dbg(musb->controller, "%s active, deleting timer\n",
236				otg_state_string(musb->xceiv->state));
237		del_timer(&glue->timer);
238		last_timer = jiffies;
239		return;
240	}
241
242	if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
243		dev_dbg(musb->controller,
244			"Longer idle timer already pending, ignoring...\n");
245		return;
246	}
247	last_timer = timeout;
248
249	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
250		otg_state_string(musb->xceiv->state),
251			jiffies_to_msecs(timeout - jiffies));
252	mod_timer(&glue->timer, timeout);
253}
254
255static irqreturn_t dsps_interrupt(int irq, void *hci)
256{
257	struct musb  *musb = hci;
258	void __iomem *reg_base = musb->ctrl_base;
259	struct device *dev = musb->controller;
260	struct platform_device *pdev = to_platform_device(dev->parent);
261	struct dsps_glue *glue = platform_get_drvdata(pdev);
262	const struct dsps_musb_wrapper *wrp = glue->wrp;
263	unsigned long flags;
264	irqreturn_t ret = IRQ_NONE;
265	u32 epintr, usbintr;
266
267	spin_lock_irqsave(&musb->lock, flags);
268
269	/* Get endpoint interrupts */
270	epintr = dsps_readl(reg_base, wrp->epintr_status);
271	musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
272	musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
273
274	if (epintr)
275		dsps_writel(reg_base, wrp->epintr_status, epintr);
276
277	/* Get usb core interrupts */
278	usbintr = dsps_readl(reg_base, wrp->coreintr_status);
279	if (!usbintr && !epintr)
280		goto eoi;
281
282	musb->int_usb =	(usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
283	if (usbintr)
284		dsps_writel(reg_base, wrp->coreintr_status, usbintr);
285
286	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
287			usbintr, epintr);
288	/*
289	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
290	 * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
291	 * switch appropriately between halves of the OTG state machine.
292	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
293	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
294	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
295	 */
296	if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
297		pr_info("CAUTION: musb: Babble Interrupt Occured\n");
298
299	if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
300		int drvvbus = dsps_readl(reg_base, wrp->status);
301		void __iomem *mregs = musb->mregs;
302		u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
303		int err;
304
305		err = is_host_enabled(musb) && (musb->int_usb &
306						MUSB_INTR_VBUSERROR);
307		if (err) {
308			/*
309			 * The Mentor core doesn't debounce VBUS as needed
310			 * to cope with device connect current spikes. This
311			 * means it's not uncommon for bus-powered devices
312			 * to get VBUS errors during enumeration.
313			 *
314			 * This is a workaround, but newer RTL from Mentor
315			 * seems to allow a better one: "re"-starting sessions
316			 * without waiting for VBUS to stop registering in
317			 * devctl.
318			 */
319			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
320			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
321			mod_timer(&glue->timer,
322					jiffies + wrp->poll_seconds * HZ);
323			WARNING("VBUS error workaround (delay coming)\n");
324		} else if (is_host_enabled(musb) && drvvbus) {
325			musb->is_active = 1;
326			MUSB_HST_MODE(musb);
327			musb->xceiv->otg->default_a = 1;
328			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
329			del_timer(&glue->timer);
330		} else {
331			musb->is_active = 0;
332			MUSB_DEV_MODE(musb);
333			musb->xceiv->otg->default_a = 0;
334			musb->xceiv->state = OTG_STATE_B_IDLE;
335		}
336
337		/* NOTE: this must complete power-on within 100 ms. */
338		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
339				drvvbus ? "on" : "off",
340				otg_state_string(musb->xceiv->state),
341				err ? " ERROR" : "",
342				devctl);
343		ret = IRQ_HANDLED;
344	}
345
346	if (musb->int_tx || musb->int_rx || musb->int_usb)
347		ret |= musb_interrupt(musb);
348
349 eoi:
350	/* EOI needs to be written for the IRQ to be re-asserted. */
351	if (ret == IRQ_HANDLED || epintr || usbintr)
352		dsps_writel(reg_base, wrp->eoi, 1);
353
354	/* Poll for ID change */
355	if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
356		mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
357
358	spin_unlock_irqrestore(&musb->lock, flags);
359
360	return ret;
361}
362
363static int dsps_musb_init(struct musb *musb)
364{
365	struct device *dev = musb->controller;
366	struct musb_hdrc_platform_data *plat = dev->platform_data;
367	struct platform_device *pdev = to_platform_device(dev->parent);
368	struct dsps_glue *glue = platform_get_drvdata(pdev);
369	const struct dsps_musb_wrapper *wrp = glue->wrp;
370	struct omap_musb_board_data *data = plat->board_data;
371	void __iomem *reg_base = musb->ctrl_base;
372	u32 rev, val;
373	int status;
374
375	/* mentor core register starts at offset of 0x400 from musb base */
376	musb->mregs += wrp->musb_core_offset;
377
378	/* NOP driver needs change if supporting dual instance */
379	usb_nop_xceiv_register();
380	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
381	if (IS_ERR_OR_NULL(musb->xceiv))
382		return -ENODEV;
383
384	/* Returns zero if e.g. not clocked */
385	rev = dsps_readl(reg_base, wrp->revision);
386	if (!rev) {
387		status = -ENODEV;
388		goto err0;
389	}
390
391	if (is_host_enabled(musb))
392		setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
393
394	/* Reset the musb */
395	dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
396
397	/* Start the on-chip PHY and its PLL. */
398	if (data->set_phy_power)
399		data->set_phy_power(1);
400
401	musb->isr = dsps_interrupt;
402
403	/* reset the otgdisable bit, needed for host mode to work */
404	val = dsps_readl(reg_base, wrp->phy_utmi);
405	val &= ~(1 << wrp->otg_disable);
406	dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
407
408	/* clear level interrupt */
409	dsps_writel(reg_base, wrp->eoi, 0);
410
411	return 0;
412err0:
413	usb_put_phy(musb->xceiv);
414	usb_nop_xceiv_unregister();
415	return status;
416}
417
418static int dsps_musb_exit(struct musb *musb)
419{
420	struct device *dev = musb->controller;
421	struct musb_hdrc_platform_data *plat = dev->platform_data;
422	struct omap_musb_board_data *data = plat->board_data;
423	struct platform_device *pdev = to_platform_device(dev->parent);
424	struct dsps_glue *glue = platform_get_drvdata(pdev);
425
426	if (is_host_enabled(musb))
427		del_timer_sync(&glue->timer);
428
429	/* Shutdown the on-chip PHY and its PLL. */
430	if (data->set_phy_power)
431		data->set_phy_power(0);
432
433	/* NOP driver needs change if supporting dual instance */
434	usb_put_phy(musb->xceiv);
435	usb_nop_xceiv_unregister();
436
437	return 0;
438}
439
440static struct musb_platform_ops dsps_ops = {
441	.init		= dsps_musb_init,
442	.exit		= dsps_musb_exit,
443
444	.enable		= dsps_musb_enable,
445	.disable	= dsps_musb_disable,
446
447	.try_idle	= dsps_musb_try_idle,
448};
449
450static u64 musb_dmamask = DMA_BIT_MASK(32);
451
452static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
453{
454	struct device *dev = glue->dev;
455	struct platform_device *pdev = to_platform_device(dev);
456	struct musb_hdrc_platform_data  *pdata = dev->platform_data;
457	struct platform_device	*musb;
458	struct resource *res;
459	struct resource	resources[2];
460	char res_name[10];
461	int ret;
462
463	/* get memory resource */
464	sprintf(res_name, "musb%d", id);
465	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
466	if (!res) {
467		dev_err(dev, "%s get mem resource failed\n", res_name);
468		ret = -ENODEV;
469		goto err0;
470	}
471	res->parent = NULL;
472	resources[0] = *res;
473
474	/* get irq resource */
475	sprintf(res_name, "musb%d-irq", id);
476	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
477	if (!res) {
478		dev_err(dev, "%s get irq resource failed\n", res_name);
479		ret = -ENODEV;
480		goto err0;
481	}
482	strcpy((u8 *)res->name, "mc");
483	res->parent = NULL;
484	resources[1] = *res;
485
486	/* allocate the child platform device */
487	musb = platform_device_alloc("musb-hdrc", -1);
488	if (!musb) {
489		dev_err(dev, "failed to allocate musb device\n");
490		ret = -ENOMEM;
491		goto err0;
492	}
493
494	musb->dev.parent		= dev;
495	musb->dev.dma_mask		= &musb_dmamask;
496	musb->dev.coherent_dma_mask	= musb_dmamask;
497
498	glue->musb			= musb;
499
500	pdata->platform_ops		= &dsps_ops;
501
502	ret = platform_device_add_resources(musb, resources, 2);
503	if (ret) {
504		dev_err(dev, "failed to add resources\n");
505		goto err1;
506	}
507
508	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
509	if (ret) {
510		dev_err(dev, "failed to add platform_data\n");
511		goto err1;
512	}
513
514	ret = platform_device_add(musb);
515	if (ret) {
516		dev_err(dev, "failed to register musb device\n");
517		goto err1;
518	}
519
520	return 0;
521
522err1:
523	platform_device_put(musb);
524err0:
525	return ret;
526}
527
528static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
529{
530	platform_device_del(glue->musb);
531	platform_device_put(glue->musb);
532}
533
534static int __devinit dsps_probe(struct platform_device *pdev)
535{
536	const struct platform_device_id *id = platform_get_device_id(pdev);
537	const struct dsps_musb_wrapper *wrp =
538				(struct dsps_musb_wrapper *)id->driver_data;
539	struct dsps_glue *glue;
540	struct resource *iomem;
541	int ret;
542
543	/* allocate glue */
544	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
545	if (!glue) {
546		dev_err(&pdev->dev, "unable to allocate glue memory\n");
547		ret = -ENOMEM;
548		goto err0;
549	}
550
551	/* get memory resource */
552	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
553	if (!iomem) {
554		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
555		ret = -ENODEV;
556		goto err1;
557	}
558
559	glue->dev = &pdev->dev;
560
561	glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
562	if (!glue->wrp) {
563		dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
564		ret = -ENOMEM;
565		goto err1;
566	}
567	platform_set_drvdata(pdev, glue);
568
569	/* create the child platform device for first instances of musb */
570	ret = dsps_create_musb_pdev(glue, 0);
571	if (ret != 0) {
572		dev_err(&pdev->dev, "failed to create child pdev\n");
573		goto err2;
574	}
575
576	/* enable the usbss clocks */
577	pm_runtime_enable(&pdev->dev);
578
579	ret = pm_runtime_get_sync(&pdev->dev);
580	if (ret < 0) {
581		dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
582		goto err3;
583	}
584
585	return 0;
586
587err3:
588	pm_runtime_disable(&pdev->dev);
589err2:
590	kfree(glue->wrp);
591err1:
592	kfree(glue);
593err0:
594	return ret;
595}
596static int __devexit dsps_remove(struct platform_device *pdev)
597{
598	struct dsps_glue *glue = platform_get_drvdata(pdev);
599
600	/* delete the child platform device */
601	dsps_delete_musb_pdev(glue);
602
603	/* disable usbss clocks */
604	pm_runtime_put(&pdev->dev);
605	pm_runtime_disable(&pdev->dev);
606	kfree(glue->wrp);
607	kfree(glue);
608	return 0;
609}
610
611#ifdef CONFIG_PM_SLEEP
612static int dsps_suspend(struct device *dev)
613{
614	struct musb_hdrc_platform_data *plat = dev->platform_data;
615	struct omap_musb_board_data *data = plat->board_data;
616
617	/* Shutdown the on-chip PHY and its PLL. */
618	if (data->set_phy_power)
619		data->set_phy_power(0);
620
621	return 0;
622}
623
624static int dsps_resume(struct device *dev)
625{
626	struct musb_hdrc_platform_data *plat = dev->platform_data;
627	struct omap_musb_board_data *data = plat->board_data;
628
629	/* Start the on-chip PHY and its PLL. */
630	if (data->set_phy_power)
631		data->set_phy_power(1);
632
633	return 0;
634}
635#endif
636
637static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
638
639static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
640	.revision		= 0x00,
641	.control		= 0x14,
642	.status			= 0x18,
643	.eoi			= 0x24,
644	.epintr_set		= 0x38,
645	.epintr_clear		= 0x40,
646	.epintr_status		= 0x30,
647	.coreintr_set		= 0x3c,
648	.coreintr_clear		= 0x44,
649	.coreintr_status	= 0x34,
650	.phy_utmi		= 0xe0,
651	.mode			= 0xe8,
652	.reset			= 0,
653	.otg_disable		= 21,
654	.iddig			= 8,
655	.usb_shift		= 0,
656	.usb_mask		= 0x1ff,
657	.usb_bitmap		= (0x1ff << 0),
658	.drvvbus		= 8,
659	.txep_shift		= 0,
660	.txep_mask		= 0xffff,
661	.txep_bitmap		= (0xffff << 0),
662	.rxep_shift		= 16,
663	.rxep_mask		= 0xfffe,
664	.rxep_bitmap		= (0xfffe << 16),
665	.musb_core_offset	= 0x400,
666	.poll_seconds		= 2,
667};
668
669static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
670	{
671		.name	= "musb-ti81xx",
672		.driver_data	= (kernel_ulong_t) &ti81xx_driver_data,
673	},
674	{  },	/* Terminating Entry */
675};
676MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
677
678static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
679	{ .compatible = "musb-ti81xx", },
680	{ .compatible = "ti,ti81xx-musb", },
681	{ .compatible = "ti,am335x-musb", },
682	{  },
683};
684MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
685
686static struct platform_driver dsps_usbss_driver = {
687	.probe		= dsps_probe,
688	.remove         = __devexit_p(dsps_remove),
689	.driver         = {
690		.name   = "musb-dsps",
691		.pm	= &dsps_pm_ops,
692		.of_match_table	= musb_dsps_of_match,
693	},
694	.id_table	= musb_dsps_id_table,
695};
696
697MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
698MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
699MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
700MODULE_LICENSE("GPL v2");
701
702static int __init dsps_init(void)
703{
704	return platform_driver_register(&dsps_usbss_driver);
705}
706subsys_initcall(dsps_init);
707
708static void __exit dsps_exit(void)
709{
710	platform_driver_unregister(&dsps_usbss_driver);
711}
712module_exit(dsps_exit);
713