musb_dsps.c revision fa7b4ca50f03b6e71665ccef66ca000311353fc8
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/err.h> 35#include <linux/platform_device.h> 36#include <linux/dma-mapping.h> 37#include <linux/pm_runtime.h> 38#include <linux/module.h> 39#include <linux/usb/nop-usb-xceiv.h> 40#include <linux/platform_data/usb-omap.h> 41#include <linux/sizes.h> 42 43#include <linux/of.h> 44#include <linux/of_device.h> 45#include <linux/of_address.h> 46 47#include "musb_core.h" 48 49static const struct of_device_id musb_dsps_of_match[]; 50 51/** 52 * avoid using musb_readx()/musb_writex() as glue layer should not be 53 * dependent on musb core layer symbols. 54 */ 55static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 56 { return __raw_readb(addr + offset); } 57 58static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 59 { return __raw_readl(addr + offset); } 60 61static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 62 { __raw_writeb(data, addr + offset); } 63 64static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 65 { __raw_writel(data, addr + offset); } 66 67/** 68 * DSPS musb wrapper register offset. 69 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 70 * musb ips. 71 */ 72struct dsps_musb_wrapper { 73 u16 revision; 74 u16 control; 75 u16 status; 76 u16 eoi; 77 u16 epintr_set; 78 u16 epintr_clear; 79 u16 epintr_status; 80 u16 coreintr_set; 81 u16 coreintr_clear; 82 u16 coreintr_status; 83 u16 phy_utmi; 84 u16 mode; 85 86 /* bit positions for control */ 87 unsigned reset:5; 88 89 /* bit positions for interrupt */ 90 unsigned usb_shift:5; 91 u32 usb_mask; 92 u32 usb_bitmap; 93 unsigned drvvbus:5; 94 95 unsigned txep_shift:5; 96 u32 txep_mask; 97 u32 txep_bitmap; 98 99 unsigned rxep_shift:5; 100 u32 rxep_mask; 101 u32 rxep_bitmap; 102 103 /* bit positions for phy_utmi */ 104 unsigned otg_disable:5; 105 106 /* bit positions for mode */ 107 unsigned iddig:5; 108 /* miscellaneous stuff */ 109 u32 musb_core_offset; 110 u8 poll_seconds; 111 /* number of musb instances */ 112 u8 instances; 113}; 114 115/** 116 * DSPS glue structure. 117 */ 118struct dsps_glue { 119 struct device *dev; 120 struct platform_device *musb[2]; /* child musb pdev */ 121 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 122 struct timer_list timer[2]; /* otg_workaround timer */ 123 unsigned long last_timer[2]; /* last timer data for each instance */ 124 u32 __iomem *usb_ctrl[2]; 125}; 126 127#define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620 128#define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628 129 130static const resource_size_t dsps_control_module_phys[] = { 131 DSPS_AM33XX_CONTROL_MODULE_PHYS_0, 132 DSPS_AM33XX_CONTROL_MODULE_PHYS_1, 133}; 134 135#define USBPHY_CM_PWRDN (1 << 0) 136#define USBPHY_OTG_PWRDN (1 << 1) 137#define USBPHY_OTGVDET_EN (1 << 19) 138#define USBPHY_OTGSESSEND_EN (1 << 20) 139 140/** 141 * musb_dsps_phy_control - phy on/off 142 * @glue: struct dsps_glue * 143 * @id: musb instance 144 * @on: flag for phy to be switched on or off 145 * 146 * This is to enable the PHY using usb_ctrl register in system control 147 * module space. 148 * 149 * XXX: This function will be removed once we have a seperate driver for 150 * control module 151 */ 152static void musb_dsps_phy_control(struct dsps_glue *glue, u8 id, u8 on) 153{ 154 u32 usbphycfg; 155 156 usbphycfg = readl(glue->usb_ctrl[id]); 157 158 if (on) { 159 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN); 160 usbphycfg |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN; 161 } else { 162 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN; 163 } 164 165 writel(usbphycfg, glue->usb_ctrl[id]); 166} 167/** 168 * dsps_musb_enable - enable interrupts 169 */ 170static void dsps_musb_enable(struct musb *musb) 171{ 172 struct device *dev = musb->controller; 173 struct platform_device *pdev = to_platform_device(dev->parent); 174 struct dsps_glue *glue = platform_get_drvdata(pdev); 175 const struct dsps_musb_wrapper *wrp = glue->wrp; 176 void __iomem *reg_base = musb->ctrl_base; 177 u32 epmask, coremask; 178 179 /* Workaround: setup IRQs through both register sets. */ 180 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 181 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 182 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 183 184 dsps_writel(reg_base, wrp->epintr_set, epmask); 185 dsps_writel(reg_base, wrp->coreintr_set, coremask); 186 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 187 dsps_writel(reg_base, wrp->coreintr_set, 188 (1 << wrp->drvvbus) << wrp->usb_shift); 189} 190 191/** 192 * dsps_musb_disable - disable HDRC and flush interrupts 193 */ 194static void dsps_musb_disable(struct musb *musb) 195{ 196 struct device *dev = musb->controller; 197 struct platform_device *pdev = to_platform_device(dev->parent); 198 struct dsps_glue *glue = platform_get_drvdata(pdev); 199 const struct dsps_musb_wrapper *wrp = glue->wrp; 200 void __iomem *reg_base = musb->ctrl_base; 201 202 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 203 dsps_writel(reg_base, wrp->epintr_clear, 204 wrp->txep_bitmap | wrp->rxep_bitmap); 205 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 206 dsps_writel(reg_base, wrp->eoi, 0); 207} 208 209static void otg_timer(unsigned long _musb) 210{ 211 struct musb *musb = (void *)_musb; 212 void __iomem *mregs = musb->mregs; 213 struct device *dev = musb->controller; 214 struct platform_device *pdev = to_platform_device(dev); 215 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 216 const struct dsps_musb_wrapper *wrp = glue->wrp; 217 u8 devctl; 218 unsigned long flags; 219 220 /* 221 * We poll because DSPS IP's won't expose several OTG-critical 222 * status change events (from the transceiver) otherwise. 223 */ 224 devctl = dsps_readb(mregs, MUSB_DEVCTL); 225 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 226 usb_otg_state_string(musb->xceiv->state)); 227 228 spin_lock_irqsave(&musb->lock, flags); 229 switch (musb->xceiv->state) { 230 case OTG_STATE_A_WAIT_BCON: 231 devctl &= ~MUSB_DEVCTL_SESSION; 232 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 233 234 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 235 if (devctl & MUSB_DEVCTL_BDEVICE) { 236 musb->xceiv->state = OTG_STATE_B_IDLE; 237 MUSB_DEV_MODE(musb); 238 } else { 239 musb->xceiv->state = OTG_STATE_A_IDLE; 240 MUSB_HST_MODE(musb); 241 } 242 break; 243 case OTG_STATE_A_WAIT_VFALL: 244 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 245 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 246 MUSB_INTR_VBUSERROR << wrp->usb_shift); 247 break; 248 case OTG_STATE_B_IDLE: 249 devctl = dsps_readb(mregs, MUSB_DEVCTL); 250 if (devctl & MUSB_DEVCTL_BDEVICE) 251 mod_timer(&glue->timer[pdev->id], 252 jiffies + wrp->poll_seconds * HZ); 253 else 254 musb->xceiv->state = OTG_STATE_A_IDLE; 255 break; 256 default: 257 break; 258 } 259 spin_unlock_irqrestore(&musb->lock, flags); 260} 261 262static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 263{ 264 struct device *dev = musb->controller; 265 struct platform_device *pdev = to_platform_device(dev); 266 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 267 268 if (timeout == 0) 269 timeout = jiffies + msecs_to_jiffies(3); 270 271 /* Never idle if active, or when VBUS timeout is not set as host */ 272 if (musb->is_active || (musb->a_wait_bcon == 0 && 273 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 274 dev_dbg(musb->controller, "%s active, deleting timer\n", 275 usb_otg_state_string(musb->xceiv->state)); 276 del_timer(&glue->timer[pdev->id]); 277 glue->last_timer[pdev->id] = jiffies; 278 return; 279 } 280 281 if (time_after(glue->last_timer[pdev->id], timeout) && 282 timer_pending(&glue->timer[pdev->id])) { 283 dev_dbg(musb->controller, 284 "Longer idle timer already pending, ignoring...\n"); 285 return; 286 } 287 glue->last_timer[pdev->id] = timeout; 288 289 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 290 usb_otg_state_string(musb->xceiv->state), 291 jiffies_to_msecs(timeout - jiffies)); 292 mod_timer(&glue->timer[pdev->id], timeout); 293} 294 295static irqreturn_t dsps_interrupt(int irq, void *hci) 296{ 297 struct musb *musb = hci; 298 void __iomem *reg_base = musb->ctrl_base; 299 struct device *dev = musb->controller; 300 struct platform_device *pdev = to_platform_device(dev); 301 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 302 const struct dsps_musb_wrapper *wrp = glue->wrp; 303 unsigned long flags; 304 irqreturn_t ret = IRQ_NONE; 305 u32 epintr, usbintr; 306 307 spin_lock_irqsave(&musb->lock, flags); 308 309 /* Get endpoint interrupts */ 310 epintr = dsps_readl(reg_base, wrp->epintr_status); 311 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 312 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 313 314 if (epintr) 315 dsps_writel(reg_base, wrp->epintr_status, epintr); 316 317 /* Get usb core interrupts */ 318 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 319 if (!usbintr && !epintr) 320 goto eoi; 321 322 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 323 if (usbintr) 324 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 325 326 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 327 usbintr, epintr); 328 /* 329 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 330 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 331 * switch appropriately between halves of the OTG state machine. 332 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 333 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 334 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 335 */ 336 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) 337 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 338 339 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 340 int drvvbus = dsps_readl(reg_base, wrp->status); 341 void __iomem *mregs = musb->mregs; 342 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 343 int err; 344 345 err = musb->int_usb & MUSB_INTR_VBUSERROR; 346 if (err) { 347 /* 348 * The Mentor core doesn't debounce VBUS as needed 349 * to cope with device connect current spikes. This 350 * means it's not uncommon for bus-powered devices 351 * to get VBUS errors during enumeration. 352 * 353 * This is a workaround, but newer RTL from Mentor 354 * seems to allow a better one: "re"-starting sessions 355 * without waiting for VBUS to stop registering in 356 * devctl. 357 */ 358 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 359 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 360 mod_timer(&glue->timer[pdev->id], 361 jiffies + wrp->poll_seconds * HZ); 362 WARNING("VBUS error workaround (delay coming)\n"); 363 } else if (drvvbus) { 364 musb->is_active = 1; 365 MUSB_HST_MODE(musb); 366 musb->xceiv->otg->default_a = 1; 367 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 368 del_timer(&glue->timer[pdev->id]); 369 } else { 370 musb->is_active = 0; 371 MUSB_DEV_MODE(musb); 372 musb->xceiv->otg->default_a = 0; 373 musb->xceiv->state = OTG_STATE_B_IDLE; 374 } 375 376 /* NOTE: this must complete power-on within 100 ms. */ 377 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 378 drvvbus ? "on" : "off", 379 usb_otg_state_string(musb->xceiv->state), 380 err ? " ERROR" : "", 381 devctl); 382 ret = IRQ_HANDLED; 383 } 384 385 if (musb->int_tx || musb->int_rx || musb->int_usb) 386 ret |= musb_interrupt(musb); 387 388 eoi: 389 /* EOI needs to be written for the IRQ to be re-asserted. */ 390 if (ret == IRQ_HANDLED || epintr || usbintr) 391 dsps_writel(reg_base, wrp->eoi, 1); 392 393 /* Poll for ID change */ 394 if (musb->xceiv->state == OTG_STATE_B_IDLE) 395 mod_timer(&glue->timer[pdev->id], 396 jiffies + wrp->poll_seconds * HZ); 397 398 spin_unlock_irqrestore(&musb->lock, flags); 399 400 return ret; 401} 402 403static int dsps_musb_init(struct musb *musb) 404{ 405 struct device *dev = musb->controller; 406 struct platform_device *pdev = to_platform_device(dev); 407 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 408 const struct dsps_musb_wrapper *wrp = glue->wrp; 409 void __iomem *reg_base = musb->ctrl_base; 410 u32 rev, val; 411 int status; 412 413 /* mentor core register starts at offset of 0x400 from musb base */ 414 musb->mregs += wrp->musb_core_offset; 415 416 /* NOP driver needs change if supporting dual instance */ 417 usb_nop_xceiv_register(); 418 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 419 if (IS_ERR_OR_NULL(musb->xceiv)) 420 return -EPROBE_DEFER; 421 422 /* Returns zero if e.g. not clocked */ 423 rev = dsps_readl(reg_base, wrp->revision); 424 if (!rev) { 425 status = -ENODEV; 426 goto err0; 427 } 428 429 usb_phy_init(musb->xceiv); 430 431 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb); 432 433 /* Reset the musb */ 434 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 435 436 /* Start the on-chip PHY and its PLL. */ 437 musb_dsps_phy_control(glue, pdev->id, 1); 438 439 musb->isr = dsps_interrupt; 440 441 /* reset the otgdisable bit, needed for host mode to work */ 442 val = dsps_readl(reg_base, wrp->phy_utmi); 443 val &= ~(1 << wrp->otg_disable); 444 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 445 446 /* clear level interrupt */ 447 dsps_writel(reg_base, wrp->eoi, 0); 448 449 return 0; 450err0: 451 usb_put_phy(musb->xceiv); 452 usb_nop_xceiv_unregister(); 453 return status; 454} 455 456static int dsps_musb_exit(struct musb *musb) 457{ 458 struct device *dev = musb->controller; 459 struct platform_device *pdev = to_platform_device(dev); 460 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 461 462 del_timer_sync(&glue->timer[pdev->id]); 463 464 /* Shutdown the on-chip PHY and its PLL. */ 465 musb_dsps_phy_control(glue, pdev->id, 0); 466 usb_phy_shutdown(musb->xceiv); 467 468 /* NOP driver needs change if supporting dual instance */ 469 usb_put_phy(musb->xceiv); 470 usb_nop_xceiv_unregister(); 471 472 return 0; 473} 474 475static struct musb_platform_ops dsps_ops = { 476 .init = dsps_musb_init, 477 .exit = dsps_musb_exit, 478 479 .enable = dsps_musb_enable, 480 .disable = dsps_musb_disable, 481 482 .try_idle = dsps_musb_try_idle, 483}; 484 485static u64 musb_dmamask = DMA_BIT_MASK(32); 486 487static int dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 488{ 489 struct device *dev = glue->dev; 490 struct platform_device *pdev = to_platform_device(dev); 491 struct musb_hdrc_platform_data *pdata = dev->platform_data; 492 struct device_node *np = pdev->dev.of_node; 493 struct musb_hdrc_config *config; 494 struct platform_device *musb; 495 struct resource *res; 496 struct resource resources[2]; 497 char res_name[11]; 498 int ret; 499 500 resources[0].start = dsps_control_module_phys[id]; 501 resources[0].end = resources[0].start + SZ_4 - 1; 502 resources[0].flags = IORESOURCE_MEM; 503 504 glue->usb_ctrl[id] = devm_ioremap_resource(&pdev->dev, resources); 505 if (IS_ERR(glue->usb_ctrl[id])) { 506 ret = PTR_ERR(glue->usb_ctrl[id]); 507 goto err0; 508 } 509 510 /* first resource is for usbss, so start index from 1 */ 511 res = platform_get_resource(pdev, IORESOURCE_MEM, id + 1); 512 if (!res) { 513 dev_err(dev, "failed to get memory for instance %d\n", id); 514 ret = -ENODEV; 515 goto err0; 516 } 517 res->parent = NULL; 518 resources[0] = *res; 519 520 /* first resource is for usbss, so start index from 1 */ 521 res = platform_get_resource(pdev, IORESOURCE_IRQ, id + 1); 522 if (!res) { 523 dev_err(dev, "failed to get irq for instance %d\n", id); 524 ret = -ENODEV; 525 goto err0; 526 } 527 res->parent = NULL; 528 resources[1] = *res; 529 resources[1].name = "mc"; 530 531 /* allocate the child platform device */ 532 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 533 if (!musb) { 534 dev_err(dev, "failed to allocate musb device\n"); 535 ret = -ENOMEM; 536 goto err0; 537 } 538 539 musb->dev.parent = dev; 540 musb->dev.dma_mask = &musb_dmamask; 541 musb->dev.coherent_dma_mask = musb_dmamask; 542 543 glue->musb[id] = musb; 544 545 ret = platform_device_add_resources(musb, resources, 2); 546 if (ret) { 547 dev_err(dev, "failed to add resources\n"); 548 goto err2; 549 } 550 551 if (np) { 552 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 553 if (!pdata) { 554 dev_err(&pdev->dev, 555 "failed to allocate musb platform data\n"); 556 ret = -ENOMEM; 557 goto err2; 558 } 559 560 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); 561 if (!config) { 562 dev_err(&pdev->dev, 563 "failed to allocate musb hdrc config\n"); 564 ret = -ENOMEM; 565 goto err2; 566 } 567 568 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps); 569 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits); 570 snprintf(res_name, sizeof(res_name), "port%d-mode", id); 571 of_property_read_u32(np, res_name, (u32 *)&pdata->mode); 572 of_property_read_u32(np, "power", (u32 *)&pdata->power); 573 config->multipoint = of_property_read_bool(np, "multipoint"); 574 575 pdata->config = config; 576 } 577 578 pdata->platform_ops = &dsps_ops; 579 580 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 581 if (ret) { 582 dev_err(dev, "failed to add platform_data\n"); 583 goto err2; 584 } 585 586 ret = platform_device_add(musb); 587 if (ret) { 588 dev_err(dev, "failed to register musb device\n"); 589 goto err2; 590 } 591 592 return 0; 593 594err2: 595 platform_device_put(musb); 596err0: 597 return ret; 598} 599 600static int dsps_probe(struct platform_device *pdev) 601{ 602 const struct of_device_id *match; 603 const struct dsps_musb_wrapper *wrp; 604 struct dsps_glue *glue; 605 struct resource *iomem; 606 int ret, i; 607 608 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 609 if (!match) { 610 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 611 ret = -EINVAL; 612 goto err0; 613 } 614 wrp = match->data; 615 616 /* allocate glue */ 617 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 618 if (!glue) { 619 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 620 ret = -ENOMEM; 621 goto err0; 622 } 623 624 /* get memory resource */ 625 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 626 if (!iomem) { 627 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 628 ret = -ENODEV; 629 goto err1; 630 } 631 632 glue->dev = &pdev->dev; 633 634 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 635 if (!glue->wrp) { 636 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 637 ret = -ENOMEM; 638 goto err1; 639 } 640 platform_set_drvdata(pdev, glue); 641 642 /* enable the usbss clocks */ 643 pm_runtime_enable(&pdev->dev); 644 645 ret = pm_runtime_get_sync(&pdev->dev); 646 if (ret < 0) { 647 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 648 goto err2; 649 } 650 651 /* create the child platform device for all instances of musb */ 652 for (i = 0; i < wrp->instances ; i++) { 653 ret = dsps_create_musb_pdev(glue, i); 654 if (ret != 0) { 655 dev_err(&pdev->dev, "failed to create child pdev\n"); 656 /* release resources of previously created instances */ 657 for (i--; i >= 0 ; i--) 658 platform_device_unregister(glue->musb[i]); 659 goto err3; 660 } 661 } 662 663 return 0; 664 665err3: 666 pm_runtime_put(&pdev->dev); 667err2: 668 pm_runtime_disable(&pdev->dev); 669 kfree(glue->wrp); 670err1: 671 kfree(glue); 672err0: 673 return ret; 674} 675static int dsps_remove(struct platform_device *pdev) 676{ 677 struct dsps_glue *glue = platform_get_drvdata(pdev); 678 const struct dsps_musb_wrapper *wrp = glue->wrp; 679 int i; 680 681 /* delete the child platform device */ 682 for (i = 0; i < wrp->instances ; i++) 683 platform_device_unregister(glue->musb[i]); 684 685 /* disable usbss clocks */ 686 pm_runtime_put(&pdev->dev); 687 pm_runtime_disable(&pdev->dev); 688 kfree(glue->wrp); 689 kfree(glue); 690 return 0; 691} 692 693#ifdef CONFIG_PM_SLEEP 694static int dsps_suspend(struct device *dev) 695{ 696 struct platform_device *pdev = to_platform_device(dev->parent); 697 struct dsps_glue *glue = platform_get_drvdata(pdev); 698 const struct dsps_musb_wrapper *wrp = glue->wrp; 699 int i; 700 701 for (i = 0; i < wrp->instances; i++) 702 musb_dsps_phy_control(glue, i, 0); 703 704 return 0; 705} 706 707static int dsps_resume(struct device *dev) 708{ 709 struct platform_device *pdev = to_platform_device(dev->parent); 710 struct dsps_glue *glue = platform_get_drvdata(pdev); 711 const struct dsps_musb_wrapper *wrp = glue->wrp; 712 int i; 713 714 for (i = 0; i < wrp->instances; i++) 715 musb_dsps_phy_control(glue, i, 1); 716 717 return 0; 718} 719#endif 720 721static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 722 723static const struct dsps_musb_wrapper am33xx_driver_data = { 724 .revision = 0x00, 725 .control = 0x14, 726 .status = 0x18, 727 .eoi = 0x24, 728 .epintr_set = 0x38, 729 .epintr_clear = 0x40, 730 .epintr_status = 0x30, 731 .coreintr_set = 0x3c, 732 .coreintr_clear = 0x44, 733 .coreintr_status = 0x34, 734 .phy_utmi = 0xe0, 735 .mode = 0xe8, 736 .reset = 0, 737 .otg_disable = 21, 738 .iddig = 8, 739 .usb_shift = 0, 740 .usb_mask = 0x1ff, 741 .usb_bitmap = (0x1ff << 0), 742 .drvvbus = 8, 743 .txep_shift = 0, 744 .txep_mask = 0xffff, 745 .txep_bitmap = (0xffff << 0), 746 .rxep_shift = 16, 747 .rxep_mask = 0xfffe, 748 .rxep_bitmap = (0xfffe << 16), 749 .musb_core_offset = 0x400, 750 .poll_seconds = 2, 751 .instances = 1, 752}; 753 754static const struct of_device_id musb_dsps_of_match[] = { 755 { .compatible = "ti,musb-am33xx", 756 .data = (void *) &am33xx_driver_data, }, 757 { }, 758}; 759MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 760 761static struct platform_driver dsps_usbss_driver = { 762 .probe = dsps_probe, 763 .remove = dsps_remove, 764 .driver = { 765 .name = "musb-dsps", 766 .pm = &dsps_pm_ops, 767 .of_match_table = of_match_ptr(musb_dsps_of_match), 768 }, 769}; 770 771MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 772MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 773MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 774MODULE_LICENSE("GPL v2"); 775 776static int __init dsps_init(void) 777{ 778 return platform_driver_register(&dsps_usbss_driver); 779} 780subsys_initcall(dsps_init); 781 782static void __exit dsps_exit(void) 783{ 784 platform_driver_unregister(&dsps_usbss_driver); 785} 786module_exit(dsps_exit); 787