musb_dsps.c revision fc7af215f9151316e9b4ce261f52043966f06976
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/io.h> 33#include <linux/err.h> 34#include <linux/platform_device.h> 35#include <linux/dma-mapping.h> 36#include <linux/pm_runtime.h> 37#include <linux/module.h> 38#include <linux/usb/usb_phy_generic.h> 39#include <linux/platform_data/usb-omap.h> 40#include <linux/sizes.h> 41 42#include <linux/of.h> 43#include <linux/of_device.h> 44#include <linux/of_address.h> 45#include <linux/of_irq.h> 46#include <linux/usb/of.h> 47 48#include <linux/debugfs.h> 49 50#include "musb_core.h" 51 52static const struct of_device_id musb_dsps_of_match[]; 53 54/** 55 * avoid using musb_readx()/musb_writex() as glue layer should not be 56 * dependent on musb core layer symbols. 57 */ 58static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 59{ 60 return __raw_readb(addr + offset); 61} 62 63static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 64{ 65 return __raw_readl(addr + offset); 66} 67 68static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 69{ 70 __raw_writeb(data, addr + offset); 71} 72 73static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 74{ 75 __raw_writel(data, addr + offset); 76} 77 78/** 79 * DSPS musb wrapper register offset. 80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 81 * musb ips. 82 */ 83struct dsps_musb_wrapper { 84 u16 revision; 85 u16 control; 86 u16 status; 87 u16 epintr_set; 88 u16 epintr_clear; 89 u16 epintr_status; 90 u16 coreintr_set; 91 u16 coreintr_clear; 92 u16 coreintr_status; 93 u16 phy_utmi; 94 u16 mode; 95 u16 tx_mode; 96 u16 rx_mode; 97 98 /* bit positions for control */ 99 unsigned reset:5; 100 101 /* bit positions for interrupt */ 102 unsigned usb_shift:5; 103 u32 usb_mask; 104 u32 usb_bitmap; 105 unsigned drvvbus:5; 106 107 unsigned txep_shift:5; 108 u32 txep_mask; 109 u32 txep_bitmap; 110 111 unsigned rxep_shift:5; 112 u32 rxep_mask; 113 u32 rxep_bitmap; 114 115 /* bit positions for phy_utmi */ 116 unsigned otg_disable:5; 117 118 /* bit positions for mode */ 119 unsigned iddig:5; 120 unsigned iddig_mux:5; 121 /* miscellaneous stuff */ 122 u8 poll_seconds; 123}; 124 125/* 126 * register shadow for suspend 127 */ 128struct dsps_context { 129 u32 control; 130 u32 epintr; 131 u32 coreintr; 132 u32 phy_utmi; 133 u32 mode; 134 u32 tx_mode; 135 u32 rx_mode; 136}; 137 138/** 139 * DSPS glue structure. 140 */ 141struct dsps_glue { 142 struct device *dev; 143 struct platform_device *musb; /* child musb pdev */ 144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 145 struct timer_list timer; /* otg_workaround timer */ 146 unsigned long last_timer; /* last timer data for each instance */ 147 148 struct dsps_context context; 149 struct debugfs_regset32 regset; 150 struct dentry *dbgfs_root; 151}; 152 153static const struct debugfs_reg32 dsps_musb_regs[] = { 154 { "revision", 0x00 }, 155 { "control", 0x14 }, 156 { "status", 0x18 }, 157 { "eoi", 0x24 }, 158 { "intr0_stat", 0x30 }, 159 { "intr1_stat", 0x34 }, 160 { "intr0_set", 0x38 }, 161 { "intr1_set", 0x3c }, 162 { "txmode", 0x70 }, 163 { "rxmode", 0x74 }, 164 { "autoreq", 0xd0 }, 165 { "srpfixtime", 0xd4 }, 166 { "tdown", 0xd8 }, 167 { "phy_utmi", 0xe0 }, 168 { "mode", 0xe8 }, 169}; 170 171static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 172{ 173 struct device *dev = musb->controller; 174 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 175 176 if (timeout == 0) 177 timeout = jiffies + msecs_to_jiffies(3); 178 179 /* Never idle if active, or when VBUS timeout is not set as host */ 180 if (musb->is_active || (musb->a_wait_bcon == 0 && 181 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 182 dev_dbg(musb->controller, "%s active, deleting timer\n", 183 usb_otg_state_string(musb->xceiv->state)); 184 del_timer(&glue->timer); 185 glue->last_timer = jiffies; 186 return; 187 } 188 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) 189 return; 190 191 if (!musb->g.dev.driver) 192 return; 193 194 if (time_after(glue->last_timer, timeout) && 195 timer_pending(&glue->timer)) { 196 dev_dbg(musb->controller, 197 "Longer idle timer already pending, ignoring...\n"); 198 return; 199 } 200 glue->last_timer = timeout; 201 202 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 203 usb_otg_state_string(musb->xceiv->state), 204 jiffies_to_msecs(timeout - jiffies)); 205 mod_timer(&glue->timer, timeout); 206} 207 208/** 209 * dsps_musb_enable - enable interrupts 210 */ 211static void dsps_musb_enable(struct musb *musb) 212{ 213 struct device *dev = musb->controller; 214 struct platform_device *pdev = to_platform_device(dev->parent); 215 struct dsps_glue *glue = platform_get_drvdata(pdev); 216 const struct dsps_musb_wrapper *wrp = glue->wrp; 217 void __iomem *reg_base = musb->ctrl_base; 218 u32 epmask, coremask; 219 220 /* Workaround: setup IRQs through both register sets. */ 221 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 222 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 223 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 224 225 dsps_writel(reg_base, wrp->epintr_set, epmask); 226 dsps_writel(reg_base, wrp->coreintr_set, coremask); 227 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 228 dsps_writel(reg_base, wrp->coreintr_set, 229 (1 << wrp->drvvbus) << wrp->usb_shift); 230 dsps_musb_try_idle(musb, 0); 231} 232 233/** 234 * dsps_musb_disable - disable HDRC and flush interrupts 235 */ 236static void dsps_musb_disable(struct musb *musb) 237{ 238 struct device *dev = musb->controller; 239 struct platform_device *pdev = to_platform_device(dev->parent); 240 struct dsps_glue *glue = platform_get_drvdata(pdev); 241 const struct dsps_musb_wrapper *wrp = glue->wrp; 242 void __iomem *reg_base = musb->ctrl_base; 243 244 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 245 dsps_writel(reg_base, wrp->epintr_clear, 246 wrp->txep_bitmap | wrp->rxep_bitmap); 247 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 248} 249 250static void otg_timer(unsigned long _musb) 251{ 252 struct musb *musb = (void *)_musb; 253 void __iomem *mregs = musb->mregs; 254 struct device *dev = musb->controller; 255 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 256 const struct dsps_musb_wrapper *wrp = glue->wrp; 257 u8 devctl; 258 unsigned long flags; 259 int skip_session = 0; 260 261 /* 262 * We poll because DSPS IP's won't expose several OTG-critical 263 * status change events (from the transceiver) otherwise. 264 */ 265 devctl = dsps_readb(mregs, MUSB_DEVCTL); 266 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 267 usb_otg_state_string(musb->xceiv->state)); 268 269 spin_lock_irqsave(&musb->lock, flags); 270 switch (musb->xceiv->state) { 271 case OTG_STATE_A_WAIT_BCON: 272 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 273 skip_session = 1; 274 /* fall */ 275 276 case OTG_STATE_A_IDLE: 277 case OTG_STATE_B_IDLE: 278 if (devctl & MUSB_DEVCTL_BDEVICE) { 279 musb->xceiv->state = OTG_STATE_B_IDLE; 280 MUSB_DEV_MODE(musb); 281 } else { 282 musb->xceiv->state = OTG_STATE_A_IDLE; 283 MUSB_HST_MODE(musb); 284 } 285 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 286 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 287 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 288 break; 289 case OTG_STATE_A_WAIT_VFALL: 290 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 291 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 292 MUSB_INTR_VBUSERROR << wrp->usb_shift); 293 break; 294 default: 295 break; 296 } 297 spin_unlock_irqrestore(&musb->lock, flags); 298} 299 300static irqreturn_t dsps_interrupt(int irq, void *hci) 301{ 302 struct musb *musb = hci; 303 void __iomem *reg_base = musb->ctrl_base; 304 struct device *dev = musb->controller; 305 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 306 const struct dsps_musb_wrapper *wrp = glue->wrp; 307 unsigned long flags; 308 irqreturn_t ret = IRQ_NONE; 309 u32 epintr, usbintr; 310 311 spin_lock_irqsave(&musb->lock, flags); 312 313 /* Get endpoint interrupts */ 314 epintr = dsps_readl(reg_base, wrp->epintr_status); 315 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 316 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 317 318 if (epintr) 319 dsps_writel(reg_base, wrp->epintr_status, epintr); 320 321 /* Get usb core interrupts */ 322 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 323 if (!usbintr && !epintr) 324 goto out; 325 326 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 327 if (usbintr) 328 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 329 330 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 331 usbintr, epintr); 332 /* 333 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 334 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 335 * switch appropriately between halves of the OTG state machine. 336 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 337 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 338 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 339 */ 340 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) { 341 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 342 343 /* 344 * When a babble condition occurs, the musb controller removes 345 * the session and is no longer in host mode. Hence, all 346 * devices connected to its root hub get disconnected. 347 * 348 * Hand this error down to the musb core isr, so it can 349 * recover. 350 */ 351 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT; 352 musb->int_tx = musb->int_rx = 0; 353 } 354 355 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 356 int drvvbus = dsps_readl(reg_base, wrp->status); 357 void __iomem *mregs = musb->mregs; 358 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 359 int err; 360 361 err = musb->int_usb & MUSB_INTR_VBUSERROR; 362 if (err) { 363 /* 364 * The Mentor core doesn't debounce VBUS as needed 365 * to cope with device connect current spikes. This 366 * means it's not uncommon for bus-powered devices 367 * to get VBUS errors during enumeration. 368 * 369 * This is a workaround, but newer RTL from Mentor 370 * seems to allow a better one: "re"-starting sessions 371 * without waiting for VBUS to stop registering in 372 * devctl. 373 */ 374 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 375 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 376 mod_timer(&glue->timer, 377 jiffies + wrp->poll_seconds * HZ); 378 WARNING("VBUS error workaround (delay coming)\n"); 379 } else if (drvvbus) { 380 MUSB_HST_MODE(musb); 381 musb->xceiv->otg->default_a = 1; 382 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 383 del_timer(&glue->timer); 384 } else { 385 musb->is_active = 0; 386 MUSB_DEV_MODE(musb); 387 musb->xceiv->otg->default_a = 0; 388 musb->xceiv->state = OTG_STATE_B_IDLE; 389 } 390 391 /* NOTE: this must complete power-on within 100 ms. */ 392 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 393 drvvbus ? "on" : "off", 394 usb_otg_state_string(musb->xceiv->state), 395 err ? " ERROR" : "", 396 devctl); 397 ret = IRQ_HANDLED; 398 } 399 400 if (musb->int_tx || musb->int_rx || musb->int_usb) 401 ret |= musb_interrupt(musb); 402 403 /* Poll for ID change in OTG port mode */ 404 if (musb->xceiv->state == OTG_STATE_B_IDLE && 405 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 406 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 407out: 408 spin_unlock_irqrestore(&musb->lock, flags); 409 410 return ret; 411} 412 413static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 414{ 415 struct dentry *root; 416 struct dentry *file; 417 char buf[128]; 418 419 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 420 root = debugfs_create_dir(buf, NULL); 421 if (!root) 422 return -ENOMEM; 423 glue->dbgfs_root = root; 424 425 glue->regset.regs = dsps_musb_regs; 426 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 427 glue->regset.base = musb->ctrl_base; 428 429 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 430 if (!file) { 431 debugfs_remove_recursive(root); 432 return -ENOMEM; 433 } 434 return 0; 435} 436 437static int dsps_musb_init(struct musb *musb) 438{ 439 struct device *dev = musb->controller; 440 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 441 struct platform_device *parent = to_platform_device(dev->parent); 442 const struct dsps_musb_wrapper *wrp = glue->wrp; 443 void __iomem *reg_base; 444 struct resource *r; 445 u32 rev, val; 446 int ret; 447 448 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 449 if (!r) 450 return -EINVAL; 451 452 reg_base = devm_ioremap_resource(dev, r); 453 if (IS_ERR(reg_base)) 454 return PTR_ERR(reg_base); 455 musb->ctrl_base = reg_base; 456 457 /* NOP driver needs change if supporting dual instance */ 458 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); 459 if (IS_ERR(musb->xceiv)) 460 return PTR_ERR(musb->xceiv); 461 462 /* Returns zero if e.g. not clocked */ 463 rev = dsps_readl(reg_base, wrp->revision); 464 if (!rev) 465 return -ENODEV; 466 467 usb_phy_init(musb->xceiv); 468 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 469 470 /* Reset the musb */ 471 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 472 473 musb->isr = dsps_interrupt; 474 475 /* reset the otgdisable bit, needed for host mode to work */ 476 val = dsps_readl(reg_base, wrp->phy_utmi); 477 val &= ~(1 << wrp->otg_disable); 478 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 479 480 ret = dsps_musb_dbg_init(musb, glue); 481 if (ret) 482 return ret; 483 484 return 0; 485} 486 487static int dsps_musb_exit(struct musb *musb) 488{ 489 struct device *dev = musb->controller; 490 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 491 492 del_timer_sync(&glue->timer); 493 usb_phy_shutdown(musb->xceiv); 494 debugfs_remove_recursive(glue->dbgfs_root); 495 496 return 0; 497} 498 499static int dsps_musb_set_mode(struct musb *musb, u8 mode) 500{ 501 struct device *dev = musb->controller; 502 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 503 const struct dsps_musb_wrapper *wrp = glue->wrp; 504 void __iomem *ctrl_base = musb->ctrl_base; 505 void __iomem *base = musb->mregs; 506 u32 reg; 507 508 reg = dsps_readl(base, wrp->mode); 509 510 switch (mode) { 511 case MUSB_HOST: 512 reg &= ~(1 << wrp->iddig); 513 514 /* 515 * if we're setting mode to host-only or device-only, we're 516 * going to ignore whatever the PHY sends us and just force 517 * ID pin status by SW 518 */ 519 reg |= (1 << wrp->iddig_mux); 520 521 dsps_writel(base, wrp->mode, reg); 522 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); 523 break; 524 case MUSB_PERIPHERAL: 525 reg |= (1 << wrp->iddig); 526 527 /* 528 * if we're setting mode to host-only or device-only, we're 529 * going to ignore whatever the PHY sends us and just force 530 * ID pin status by SW 531 */ 532 reg |= (1 << wrp->iddig_mux); 533 534 dsps_writel(base, wrp->mode, reg); 535 break; 536 case MUSB_OTG: 537 dsps_writel(base, wrp->phy_utmi, 0x02); 538 break; 539 default: 540 dev_err(glue->dev, "unsupported mode %d\n", mode); 541 return -EINVAL; 542 } 543 544 return 0; 545} 546 547static void dsps_musb_reset(struct musb *musb) 548{ 549 struct device *dev = musb->controller; 550 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 551 const struct dsps_musb_wrapper *wrp = glue->wrp; 552 553 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset)); 554 udelay(100); 555} 556 557static struct musb_platform_ops dsps_ops = { 558 .init = dsps_musb_init, 559 .exit = dsps_musb_exit, 560 561 .enable = dsps_musb_enable, 562 .disable = dsps_musb_disable, 563 564 .try_idle = dsps_musb_try_idle, 565 .set_mode = dsps_musb_set_mode, 566 .reset = dsps_musb_reset, 567}; 568 569static u64 musb_dmamask = DMA_BIT_MASK(32); 570 571static int get_int_prop(struct device_node *dn, const char *s) 572{ 573 int ret; 574 u32 val; 575 576 ret = of_property_read_u32(dn, s, &val); 577 if (ret) 578 return 0; 579 return val; 580} 581 582static int get_musb_port_mode(struct device *dev) 583{ 584 enum usb_dr_mode mode; 585 586 mode = of_usb_get_dr_mode(dev->of_node); 587 switch (mode) { 588 case USB_DR_MODE_HOST: 589 return MUSB_PORT_MODE_HOST; 590 591 case USB_DR_MODE_PERIPHERAL: 592 return MUSB_PORT_MODE_GADGET; 593 594 case USB_DR_MODE_UNKNOWN: 595 case USB_DR_MODE_OTG: 596 default: 597 return MUSB_PORT_MODE_DUAL_ROLE; 598 } 599} 600 601static int dsps_create_musb_pdev(struct dsps_glue *glue, 602 struct platform_device *parent) 603{ 604 struct musb_hdrc_platform_data pdata; 605 struct resource resources[2]; 606 struct resource *res; 607 struct device *dev = &parent->dev; 608 struct musb_hdrc_config *config; 609 struct platform_device *musb; 610 struct device_node *dn = parent->dev.of_node; 611 int ret; 612 613 memset(resources, 0, sizeof(resources)); 614 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 615 if (!res) { 616 dev_err(dev, "failed to get memory.\n"); 617 return -EINVAL; 618 } 619 resources[0] = *res; 620 621 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 622 if (!res) { 623 dev_err(dev, "failed to get irq.\n"); 624 return -EINVAL; 625 } 626 resources[1] = *res; 627 628 /* allocate the child platform device */ 629 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 630 if (!musb) { 631 dev_err(dev, "failed to allocate musb device\n"); 632 return -ENOMEM; 633 } 634 635 musb->dev.parent = dev; 636 musb->dev.dma_mask = &musb_dmamask; 637 musb->dev.coherent_dma_mask = musb_dmamask; 638 musb->dev.of_node = of_node_get(dn); 639 640 glue->musb = musb; 641 642 ret = platform_device_add_resources(musb, resources, 643 ARRAY_SIZE(resources)); 644 if (ret) { 645 dev_err(dev, "failed to add resources\n"); 646 goto err; 647 } 648 649 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 650 if (!config) { 651 dev_err(dev, "failed to allocate musb hdrc config\n"); 652 ret = -ENOMEM; 653 goto err; 654 } 655 pdata.config = config; 656 pdata.platform_ops = &dsps_ops; 657 658 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 659 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 660 config->host_port_deassert_reset_at_resume = 1; 661 pdata.mode = get_musb_port_mode(dev); 662 /* DT keeps this entry in mA, musb expects it as per USB spec */ 663 pdata.power = get_int_prop(dn, "mentor,power") / 2; 664 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 665 666 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 667 if (ret) { 668 dev_err(dev, "failed to add platform_data\n"); 669 goto err; 670 } 671 672 ret = platform_device_add(musb); 673 if (ret) { 674 dev_err(dev, "failed to register musb device\n"); 675 goto err; 676 } 677 return 0; 678 679err: 680 platform_device_put(musb); 681 return ret; 682} 683 684static int dsps_probe(struct platform_device *pdev) 685{ 686 const struct of_device_id *match; 687 const struct dsps_musb_wrapper *wrp; 688 struct dsps_glue *glue; 689 int ret; 690 691 if (!strcmp(pdev->name, "musb-hdrc")) 692 return -ENODEV; 693 694 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 695 if (!match) { 696 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 697 return -EINVAL; 698 } 699 wrp = match->data; 700 701 /* allocate glue */ 702 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 703 if (!glue) { 704 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 705 return -ENOMEM; 706 } 707 708 glue->dev = &pdev->dev; 709 glue->wrp = wrp; 710 711 platform_set_drvdata(pdev, glue); 712 pm_runtime_enable(&pdev->dev); 713 714 ret = pm_runtime_get_sync(&pdev->dev); 715 if (ret < 0) { 716 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 717 goto err2; 718 } 719 720 ret = dsps_create_musb_pdev(glue, pdev); 721 if (ret) 722 goto err3; 723 724 return 0; 725 726err3: 727 pm_runtime_put(&pdev->dev); 728err2: 729 pm_runtime_disable(&pdev->dev); 730 return ret; 731} 732 733static int dsps_remove(struct platform_device *pdev) 734{ 735 struct dsps_glue *glue = platform_get_drvdata(pdev); 736 737 platform_device_unregister(glue->musb); 738 739 /* disable usbss clocks */ 740 pm_runtime_put(&pdev->dev); 741 pm_runtime_disable(&pdev->dev); 742 743 return 0; 744} 745 746static const struct dsps_musb_wrapper am33xx_driver_data = { 747 .revision = 0x00, 748 .control = 0x14, 749 .status = 0x18, 750 .epintr_set = 0x38, 751 .epintr_clear = 0x40, 752 .epintr_status = 0x30, 753 .coreintr_set = 0x3c, 754 .coreintr_clear = 0x44, 755 .coreintr_status = 0x34, 756 .phy_utmi = 0xe0, 757 .mode = 0xe8, 758 .tx_mode = 0x70, 759 .rx_mode = 0x74, 760 .reset = 0, 761 .otg_disable = 21, 762 .iddig = 8, 763 .iddig_mux = 7, 764 .usb_shift = 0, 765 .usb_mask = 0x1ff, 766 .usb_bitmap = (0x1ff << 0), 767 .drvvbus = 8, 768 .txep_shift = 0, 769 .txep_mask = 0xffff, 770 .txep_bitmap = (0xffff << 0), 771 .rxep_shift = 16, 772 .rxep_mask = 0xfffe, 773 .rxep_bitmap = (0xfffe << 16), 774 .poll_seconds = 2, 775}; 776 777static const struct of_device_id musb_dsps_of_match[] = { 778 { .compatible = "ti,musb-am33xx", 779 .data = (void *) &am33xx_driver_data, }, 780 { }, 781}; 782MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 783 784#ifdef CONFIG_PM_SLEEP 785static int dsps_suspend(struct device *dev) 786{ 787 struct dsps_glue *glue = dev_get_drvdata(dev); 788 const struct dsps_musb_wrapper *wrp = glue->wrp; 789 struct musb *musb = platform_get_drvdata(glue->musb); 790 void __iomem *mbase = musb->ctrl_base; 791 792 glue->context.control = dsps_readl(mbase, wrp->control); 793 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set); 794 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set); 795 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi); 796 glue->context.mode = dsps_readl(mbase, wrp->mode); 797 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode); 798 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode); 799 800 return 0; 801} 802 803static int dsps_resume(struct device *dev) 804{ 805 struct dsps_glue *glue = dev_get_drvdata(dev); 806 const struct dsps_musb_wrapper *wrp = glue->wrp; 807 struct musb *musb = platform_get_drvdata(glue->musb); 808 void __iomem *mbase = musb->ctrl_base; 809 810 dsps_writel(mbase, wrp->control, glue->context.control); 811 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr); 812 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 813 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 814 dsps_writel(mbase, wrp->mode, glue->context.mode); 815 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 816 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 817 818 return 0; 819} 820#endif 821 822static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 823 824static struct platform_driver dsps_usbss_driver = { 825 .probe = dsps_probe, 826 .remove = dsps_remove, 827 .driver = { 828 .name = "musb-dsps", 829 .pm = &dsps_pm_ops, 830 .of_match_table = musb_dsps_of_match, 831 }, 832}; 833 834MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 835MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 836MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 837MODULE_LICENSE("GPL v2"); 838 839module_platform_driver(dsps_usbss_driver); 840