phy-fsl-usb.h revision 0807c500a1a6d7fa20cbd7bbe7fea14a66112463
10807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Copyright (C) 2007,2008 Freescale Semiconductor, Inc. 20807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * 30807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * This program is free software; you can redistribute it and/or modify it 40807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * under the terms of the GNU General Public License as published by the 50807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * Free Software Foundation; either version 2 of the License, or (at your 60807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * option) any later version. 70807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * 80807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * This program is distributed in the hope that it will be useful, but 90807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * WITHOUT ANY WARRANTY; without even the implied warranty of 100807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 110807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * General Public License for more details. 120807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * 130807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * You should have received a copy of the GNU General Public License along 140807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * with this program; if not, write to the Free Software Foundation, Inc., 150807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * 675 Mass Ave, Cambridge, MA 02139, USA. 160807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang */ 170807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 180807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#include "otg_fsm.h" 190807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#include <linux/usb/otg.h> 200807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#include <linux/ioctl.h> 210807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 220807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* USB Command Register Bit Masks */ 230807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_RUN_STOP (0x1<<0) 240807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_CTRL_RESET (0x1<<1) 250807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_PERIODIC_SCHEDULE_EN (0x1<<4) 260807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASYNC_SCHEDULE_EN (0x1<<5) 270807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_INT_AA_DOORBELL (0x1<<6) 280807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP (0x3<<8) 290807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASYNC_SCH_PARK_EN (0x1<<11) 300807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_SUTW (0x1<<13) 310807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ATDTW (0x1<<14) 320807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC (0xFF<<16) 330807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 340807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 15,3,2 are frame list size */ 350807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_1024 (0x0<<15 | 0x0<<2) 360807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_512 (0x0<<15 | 0x1<<2) 370807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_256 (0x0<<15 | 0x2<<2) 380807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_128 (0x0<<15 | 0x3<<2) 390807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_64 (0x1<<15 | 0x0<<2) 400807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_32 (0x1<<15 | 0x1<<2) 410807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_16 (0x1<<15 | 0x2<<2) 420807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_FRAME_SIZE_8 (0x1<<15 | 0x3<<2) 430807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 440807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 9-8 are async schedule park mode count */ 450807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP_00 (0x0<<8) 460807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP_01 (0x1<<8) 470807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP_10 (0x2<<8) 480807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP_11 (0x3<<8) 490807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ASP_BIT_POS (8) 500807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 510807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 23-16 are interrupt threshold control */ 520807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_NO_THRESHOLD (0x00<<16) 530807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_1_MICRO_FRM (0x01<<16) 540807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_2_MICRO_FRM (0x02<<16) 550807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_4_MICRO_FRM (0x04<<16) 560807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_8_MICRO_FRM (0x08<<16) 570807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_16_MICRO_FRM (0x10<<16) 580807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_32_MICRO_FRM (0x20<<16) 590807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_64_MICRO_FRM (0x40<<16) 600807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CMD_ITC_BIT_POS (16) 610807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 620807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* USB Status Register Bit Masks */ 630807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_INT (0x1<<0) 640807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_ERR (0x1<<1) 650807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_PORT_CHANGE (0x1<<2) 660807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_FRM_LST_ROLL (0x1<<3) 670807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_SYS_ERR (0x1<<4) 680807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_IAA (0x1<<5) 690807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_RESET_RECEIVED (0x1<<6) 700807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_SOF (0x1<<7) 710807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_DCSUSPEND (0x1<<8) 720807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_HC_HALTED (0x1<<12) 730807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_RCL (0x1<<13) 740807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_PERIODIC_SCHEDULE (0x1<<14) 750807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_STS_ASYNC_SCHEDULE (0x1<<15) 760807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 770807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* USB Interrupt Enable Register Bit Masks */ 780807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_INT_EN (0x1<<0) 790807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_ERR_INT_EN (0x1<<1) 800807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_PC_DETECT_EN (0x1<<2) 810807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_FRM_LST_ROLL_EN (0x1<<3) 820807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_SYS_ERR_EN (0x1<<4) 830807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_ASYN_ADV_EN (0x1<<5) 840807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_RESET_EN (0x1<<6) 850807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_SOF_EN (0x1<<7) 860807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_INTR_DEVICE_SUSPEND (0x1<<8) 870807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 880807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Device Address bit masks */ 890807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_DEVICE_ADDRESS_MASK (0x7F<<25) 900807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_DEVICE_ADDRESS_BIT_POS (25) 910807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* PORTSC Register Bit Masks,Only one PORT in OTG mode*/ 920807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_CURRENT_CONNECT_STATUS (0x1<<0) 930807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_CONNECT_STATUS_CHANGE (0x1<<1) 940807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_ENABLE (0x1<<2) 950807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_EN_DIS_CHANGE (0x1<<3) 960807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_OVER_CURRENT_ACT (0x1<<4) 970807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_OVER_CUURENT_CHG (0x1<<5) 980807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_FORCE_RESUME (0x1<<6) 990807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SUSPEND (0x1<<7) 1000807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_RESET (0x1<<8) 1010807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_BITS (0x3<<10) 1020807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_POWER (0x1<<12) 1030807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_INDICTOR_CTRL (0x3<<14) 1040807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_TEST_CTRL (0xF<<16) 1050807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_WAKE_ON_CONNECT_EN (0x1<<20) 1060807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_WAKE_ON_CONNECT_DIS (0x1<<21) 1070807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_WAKE_ON_OVER_CURRENT (0x1<<22) 1080807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PHY_LOW_POWER_SPD (0x1<<23) 1090807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_FORCE_FULL_SPEED (0x1<<24) 1100807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SPEED_MASK (0x3<<26) 1110807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_TRANSCEIVER_WIDTH (0x1<<28) 1120807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PHY_TYPE_SEL (0x3<<30) 1130807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 11-10 are line status */ 1140807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_SE0 (0x0<<10) 1150807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_JSTATE (0x1<<10) 1160807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_KSTATE (0x2<<10) 1170807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_UNDEF (0x3<<10) 1180807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_LINE_STATUS_BIT_POS (10) 1190807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1200807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 15-14 are port indicator control */ 1210807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PIC_OFF (0x0<<14) 1220807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PIC_AMBER (0x1<<14) 1230807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PIC_GREEN (0x2<<14) 1240807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PIC_UNDEF (0x3<<14) 1250807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PIC_BIT_POS (14) 1260807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1270807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 19-16 are port test control */ 1280807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_DISABLE (0x0<<16) 1290807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_JSTATE (0x1<<16) 1300807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_KSTATE (0x2<<16) 1310807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_SEQNAK (0x3<<16) 1320807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_PACKET (0x4<<16) 1330807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_FORCE_EN (0x5<<16) 1340807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTC_BIT_POS (16) 1350807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1360807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 27-26 are port speed */ 1370807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SPEED_FULL (0x0<<26) 1380807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SPEED_LOW (0x1<<26) 1390807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SPEED_HIGH (0x2<<26) 1400807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PORT_SPEED_UNDEF (0x3<<26) 1410807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_SPEED_BIT_POS (26) 1420807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1430807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 28 is parallel transceiver width for UTMI interface */ 1440807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTW (0x1<<28) 1450807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTW_8BIT (0x0<<28) 1460807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTW_16BIT (0x1<<28) 1470807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1480807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* bit 31-30 are port transceiver select */ 1490807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTS_UTMI (0x0<<30) 1500807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTS_ULPI (0x2<<30) 1510807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTS_FSLS_SERIAL (0x3<<30) 1520807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_PTS_BIT_POS (30) 1530807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1540807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define PORTSC_W1C_BITS \ 1550807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang (PORTSC_CONNECT_STATUS_CHANGE | \ 1560807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang PORTSC_PORT_EN_DIS_CHANGE | \ 1570807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang PORTSC_OVER_CUURENT_CHG) 1580807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1590807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* OTG Status Control Register Bit Masks */ 1600807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_CTRL_VBUS_DISCHARGE (0x1<<0) 1610807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_CTRL_VBUS_CHARGE (0x1<<1) 1620807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_CTRL_OTG_TERMINATION (0x1<<3) 1630807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_CTRL_DATA_PULSING (0x1<<4) 1640807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_CTRL_ID_PULL_EN (0x1<<5) 1650807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_HA_DATA_PULSE (0x1<<6) 1660807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_HA_BA (0x1<<7) 1670807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_USB_ID (0x1<<8) 1680807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_A_VBUS_VALID (0x1<<9) 1690807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_A_SESSION_VALID (0x1<<10) 1700807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_B_SESSION_VALID (0x1<<11) 1710807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_B_SESSION_END (0x1<<12) 1720807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_1MS_TOGGLE (0x1<<13) 1730807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_STS_DATA_PULSING (0x1<<14) 1740807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_USB_ID (0x1<<16) 1750807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_A_VBUS_VALID (0x1<<17) 1760807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_A_SESSION_VALID (0x1<<18) 1770807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_B_SESSION_VALID (0x1<<19) 1780807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_B_SESSION_END (0x1<<20) 1790807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_1MS (0x1<<21) 1800807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_DATA_PULSING (0x1<<22) 1810807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_USB_ID_EN (0x1<<24) 1820807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_A_VBUS_VALID_EN (0x1<<25) 1830807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_A_SESSION_VALID_EN (0x1<<26) 1840807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_B_SESSION_VALID_EN (0x1<<27) 1850807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_B_SESSION_END_EN (0x1<<28) 1860807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_1MS_TIMER_EN (0x1<<29) 1870807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTR_DATA_PULSING_EN (0x1<<30) 1880807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTSTS_MASK (0x00ff0000) 1890807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1900807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* USB MODE Register Bit Masks */ 1910807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_CTRL_MODE_IDLE (0x0<<0) 1920807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_CTRL_MODE_DEVICE (0x2<<0) 1930807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_CTRL_MODE_HOST (0x3<<0) 1940807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_CTRL_MODE_RSV (0x1<<0) 1950807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_SETUP_LOCK_OFF (0x1<<3) 1960807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_STREAM_DISABLE (0x1<<4) 1970807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_MODE_ES (0x1<<2) /* Endian Select */ 1980807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 1990807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* control Register Bit Masks */ 2000807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CTRL_IOENB (0x1<<2) 2010807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define USB_CTRL_ULPI_INT0EN (0x1<<0) 2020807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2030807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* BCSR5 */ 2040807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define BCSR5_INT_USB (0x02) 2050807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2060807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* USB module clk cfg */ 2070807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_OFFS (0xA08) 2080807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_CLK_DISABLE (0x00000000) /* USB clk disable */ 2090807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_MPHCM_11 (0x00c00000) 2100807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_MPHCM_01 (0x00400000) 2110807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_MPHCM_10 (0x00800000) 2120807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_DRCM_11 (0x00300000) 2130807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_DRCM_01 (0x00100000) 2140807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SCCR_USB_DRCM_10 (0x00200000) 2150807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2160807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SICRL_OFFS (0x114) 2170807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SICRL_USB0 (0x40000000) 2180807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SICRL_USB1 (0x20000000) 2190807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2200807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SICRH_OFFS (0x118) 2210807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SICRH_USB_UTMI (0x00020000) 2220807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2230807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* OTG interrupt enable bit masks */ 2240807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTERRUPT_ENABLE_BITS_MASK \ 2250807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang (OTGSC_INTR_USB_ID_EN | \ 2260807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_1MS_TIMER_EN | \ 2270807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_A_VBUS_VALID_EN | \ 2280807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_A_SESSION_VALID_EN | \ 2290807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_B_SESSION_VALID_EN | \ 2300807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_B_SESSION_END_EN | \ 2310807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_DATA_PULSING_EN) 2320807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2330807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* OTG interrupt status bit masks */ 2340807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTGSC_INTERRUPT_STATUS_BITS_MASK \ 2350807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang (OTGSC_INTSTS_USB_ID | \ 2360807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTR_1MS_TIMER_EN | \ 2370807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTSTS_A_VBUS_VALID | \ 2380807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTSTS_A_SESSION_VALID | \ 2390807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTSTS_B_SESSION_VALID | \ 2400807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTSTS_B_SESSION_END | \ 2410807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang OTGSC_INTSTS_DATA_PULSING) 2420807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2430807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* 2440807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * A-DEVICE timing constants 2450807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang */ 2460807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2470807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Wait for VBUS Rise */ 2480807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TA_WAIT_VRISE (100) /* a_wait_vrise 100 ms, section: 6.6.5.1 */ 2490807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2500807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Wait for B-Connect */ 2510807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TA_WAIT_BCON (10000) /* a_wait_bcon > 1 sec, section: 6.6.5.2 2520807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * This is only used to get out of 2530807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * OTG_STATE_A_WAIT_BCON state if there was 2540807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * no connection for these many milliseconds 2550807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang */ 2560807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2570807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* A-Idle to B-Disconnect */ 2580807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* It is necessary for this timer to be more than 750 ms because of a bug in OPT 2590807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * test 5.4 in which B OPT disconnects after 750 ms instead of 75ms as stated 2600807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang * in the test description 2610807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang */ 2620807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TA_AIDL_BDIS (5000) /* a_suspend minimum 200 ms, section: 6.6.5.3 */ 2630807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2640807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* B-Idle to A-Disconnect */ 2650807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TA_BIDL_ADIS (12) /* 3 to 200 ms */ 2660807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2670807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* B-device timing constants */ 2680807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2690807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2700807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Data-Line Pulse Time*/ 2710807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_DATA_PLS (10) /* b_srp_init,continue 5~10ms, section:5.3.3 */ 2720807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_DATA_PLS_MIN (5) /* minimum 5 ms */ 2730807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_DATA_PLS_MAX (10) /* maximum 10 ms */ 2740807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2750807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* SRP Initiate Time */ 2760807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_SRP_INIT (100) /* b_srp_init,maximum 100 ms, section:5.3.8 */ 2770807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2780807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* SRP Fail Time */ 2790807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_SRP_FAIL (7000) /* b_srp_init,Fail time 5~30s, section:6.8.2.2*/ 2800807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2810807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* SRP result wait time */ 2820807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_SRP_WAIT (60) 2830807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2840807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* VBus time */ 2850807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_VBUS_PLS (30) /* time to keep vbus pulsing asserted */ 2860807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2870807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Discharge time */ 2880807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* This time should be less than 10ms. It varies from system to system. */ 2890807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_VBUS_DSCHRG (8) 2900807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2910807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* A-SE0 to B-Reset */ 2920807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_ASE0_BRST (20) /* b_wait_acon, mini 3.125 ms,section:6.8.2.4 */ 2930807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2940807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* A bus suspend timer before we can switch to b_wait_aconn */ 2950807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_A_SUSPEND (7) 2960807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_BUS_RESUME (12) 2970807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 2980807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* SE0 Time Before SRP */ 2990807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define TB_SE0_SRP (2) /* b_idle,minimum 2 ms, section:5.3.2 */ 3000807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3010807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SET_OTG_STATE(otg_ptr, newstate) ((otg_ptr)->state = newstate) 3020807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3030807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangstruct usb_dr_mmap { 3040807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang /* Capability register */ 3050807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res1[256]; 3060807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u16 caplength; /* Capability Register Length */ 3070807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u16 hciversion; /* Host Controller Interface Version */ 3080807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 hcsparams; /* Host Controller Structual Parameters */ 3090807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 hccparams; /* Host Controller Capability Parameters */ 3100807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res2[20]; 3110807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 dciversion; /* Device Controller Interface Version */ 3120807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 dccparams; /* Device Controller Capability Parameters */ 3130807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res3[24]; 3140807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang /* Operation register */ 3150807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 usbcmd; /* USB Command Register */ 3160807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 usbsts; /* USB Status Register */ 3170807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 usbintr; /* USB Interrupt Enable Register */ 3180807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 frindex; /* Frame Index Register */ 3190807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res4[4]; 3200807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 deviceaddr; /* Device Address */ 3210807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endpointlistaddr; /* Endpoint List Address Register */ 3220807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res5[4]; 3230807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 burstsize; /* Master Interface Data Burst Size Register */ 3240807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 txttfilltuning; /* Transmit FIFO Tuning Controls Register */ 3250807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res6[8]; 3260807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 ulpiview; /* ULPI register access */ 3270807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res7[12]; 3280807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 configflag; /* Configure Flag Register */ 3290807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 portsc; /* Port 1 Status and Control Register */ 3300807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res8[28]; 3310807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 otgsc; /* On-The-Go Status and Control */ 3320807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 usbmode; /* USB Mode Register */ 3330807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endptsetupstat; /* Endpoint Setup Status Register */ 3340807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endpointprime; /* Endpoint Initialization Register */ 3350807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endptflush; /* Endpoint Flush Register */ 3360807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endptstatus; /* Endpoint Status Register */ 3370807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endptcomplete; /* Endpoint Complete Register */ 3380807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 endptctrl[6]; /* Endpoint Control Registers */ 3390807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res9[552]; 3400807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 snoop1; 3410807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 snoop2; 3420807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 age_cnt_thresh; /* Age Count Threshold Register */ 3430807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 pri_ctrl; /* Priority Control Register */ 3440807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 si_ctrl; /* System Interface Control Register */ 3450807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 res10[236]; 3460807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u32 control; /* General Purpose Control Register */ 3470807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang}; 3480807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3490807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangstruct fsl_otg_timer { 3500807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang unsigned long expires; /* Number of count increase to timeout */ 3510807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang unsigned long count; /* Tick counter */ 3520807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang void (*function)(unsigned long); /* Timeout function */ 3530807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang unsigned long data; /* Data passed to function */ 3540807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct list_head list; 3550807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang}; 3560807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3570807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yanginline struct fsl_otg_timer *otg_timer_initializer 3580807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang(void (*function)(unsigned long), unsigned long expires, unsigned long data) 3590807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang{ 3600807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct fsl_otg_timer *timer; 3610807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3620807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang timer = kmalloc(sizeof(struct fsl_otg_timer), GFP_KERNEL); 3630807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang if (!timer) 3640807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang return NULL; 3650807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang timer->function = function; 3660807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang timer->expires = expires; 3670807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang timer->data = data; 3680807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang return timer; 3690807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang} 3700807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3710807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangstruct fsl_otg { 3720807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct otg_transceiver otg; 3730807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct otg_fsm fsm; 3740807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct usb_dr_mmap *dr_mem_map; 3750807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct delayed_work otg_event; 3760807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3770807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang /* used for usb host */ 3780807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang struct work_struct work_wq; 3790807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 host_working; 3800807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3810807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang int irq; 3820807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang}; 3830807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3840807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangstruct fsl_otg_config { 3850807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang u8 otg_port; 3860807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang}; 3870807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 3880807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* For SRP and HNP handle */ 3890807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define FSL_OTG_MAJOR 240 3900807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define FSL_OTG_NAME "fsl-usb2-otg" 3910807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* Command to OTG driver ioctl */ 3920807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define OTG_IOCTL_MAGIC FSL_OTG_MAJOR 3930807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang/* if otg work as host, it should return 1, otherwise return 0 */ 3940807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define GET_OTG_STATUS _IOR(OTG_IOCTL_MAGIC, 1, int) 3950807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SET_A_SUSPEND_REQ _IOW(OTG_IOCTL_MAGIC, 2, int) 3960807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SET_A_BUS_DROP _IOW(OTG_IOCTL_MAGIC, 3, int) 3970807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SET_A_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 4, int) 3980807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define SET_B_BUS_REQ _IOW(OTG_IOCTL_MAGIC, 5, int) 3990807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define GET_A_SUSPEND_REQ _IOR(OTG_IOCTL_MAGIC, 6, int) 4000807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define GET_A_BUS_DROP _IOR(OTG_IOCTL_MAGIC, 7, int) 4010807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define GET_A_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 8, int) 4020807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang#define GET_B_BUS_REQ _IOR(OTG_IOCTL_MAGIC, 9, int) 4030807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yang 4040807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangvoid fsl_otg_add_timer(void *timer); 4050807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangvoid fsl_otg_del_timer(void *timer); 4060807c500a1a6d7fa20cbd7bbe7fea14a66112463Li Yangvoid fsl_otg_pulse_vbus(void); 407