1dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao/*
2dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
3dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao *
4dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao * Copyright (C) 2008 Marvell International Ltd.
597d9655c7fcc8e408d06ac6fb4cdffecd51cf5e8Jingoo Han *	Eric Miao <eric.miao@marvell.com>
6dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao *
7dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao *  This program is free software; you can redistribute it and/or modify
8dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao *  it under the terms of the GNU General Public License version 2 as
9dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao *  publishhed by the Free Software Foundation.
10dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao */
11dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
12dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/module.h>
13dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/kernel.h>
14dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/init.h>
15dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/device.h>
16dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/spi/spi.h>
17f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport#include <linux/spi/tdo24m.h>
18dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/fb.h>
19dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#include <linux/lcd.h>
205a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h>
21dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
22dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
23dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
24dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define TDO24M_SPI_BUFF_SIZE	(4)
25dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define MODE_QVGA	0
26dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define MODE_VGA	1
27dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
28dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostruct tdo24m {
29dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_device	*spi_dev;
30dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct lcd_device	*lcd_dev;
31dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
32dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_message	msg;
33dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_transfer	xfer;
34dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	uint8_t			*buf;
35dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
36f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	int (*adj_mode)(struct tdo24m *lcd, int mode);
37f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	int color_invert;
38f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
39dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int			power;
40dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int			mode;
41dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
42dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
43dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao/* use bit 30, 31 as the indicator of command parameter number */
44dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define CMD0(x)		((0 << 30) | (x))
45dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define CMD1(x, x1)	((1 << 30) | ((x) << 9) | 0x100 | (x1))
46dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define CMD2(x, x1, x2)	((2 << 30) | ((x) << 18) | 0x20000 |\
47dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			((x1) << 9) | 0x100 | (x2))
48dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#define CMD_NULL	(-1)
49dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
5053c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_panel_reset[] = {
51dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x1), /* reset */
52dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x0), /* nop */
53dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x0), /* nop */
54dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x0), /* nop */
55dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
56dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
57dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
5853c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_panel_on[] = {
59dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x29),		/* Display ON */
60dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xB8, 0xFF, 0xF9),	/* Output Control */
61dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x11),		/* Sleep out */
62dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xB0, 0x16),	/* Wake */
63dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
64dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
65dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
6653c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_panel_off[] = {
67dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x28),		/* Display OFF */
68dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xB8, 0x80, 0x02),	/* Output Control */
69dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x10),		/* Sleep in */
70dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xB0, 0x00),	/* Deep stand by in */
71dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
72dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
73dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
7453c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_vga_pass_through_tdo24m[] = {
75dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xB0, 0x16),
76dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xBC, 0x80),
77dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xE1, 0x00),
78dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0x36, 0x50),
79dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0x3B, 0x00),
80dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
81dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
82dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
8353c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_qvga_pass_through_tdo24m[] = {
84dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xB0, 0x16),
85dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xBC, 0x81),
86dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xE1, 0x00),
87dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0x36, 0x50),
88dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0x3B, 0x22),
89dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
90dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
91dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
9253c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_vga_transfer_tdo24m[] = {
9397d9655c7fcc8e408d06ac6fb4cdffecd51cf5e8Jingoo Han	CMD1(0xcf, 0x02),	/* Blanking period control (1) */
94dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd0, 0x08, 0x04),	/* Blanking period control (2) */
95dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xd1, 0x01),	/* CKV timing control on/off */
96dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd2, 0x14, 0x00),	/* CKV 1,2 timing control */
97dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd3, 0x1a, 0x0f),	/* OEV timing control */
98dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd4, 0x1f, 0xaf),	/* ASW timing control (1) */
99dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xd5, 0x14),	/* ASW timing control (2) */
100dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x21),		/* Invert for normally black display */
101dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x29),		/* Display on */
102dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
103dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
104dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
10553c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_qvga_transfer[] = {
106dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xd6, 0x02),	/* Blanking period control (1) */
107dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd7, 0x08, 0x04),	/* Blanking period control (2) */
108dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xd8, 0x01),	/* CKV timing control on/off */
109dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xd9, 0x00, 0x08),	/* CKV 1,2 timing control */
110dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xde, 0x05, 0x0a),	/* OEV timing control */
111dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xdf, 0x0a, 0x19),	/* ASW timing control (1) */
112dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xe0, 0x0a),	/* ASW timing control (2) */
113dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x21),		/* Invert for normally black display */
114dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x29),		/* Display on */
115dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
116dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
117dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
11853c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_vga_pass_through_tdo35s[] = {
119f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xB0, 0x16),
120f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xBC, 0x80),
121f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xE1, 0x00),
122f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0x3B, 0x00),
123f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD_NULL,
124f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport};
125f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
12653c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_qvga_pass_through_tdo35s[] = {
127f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xB0, 0x16),
128f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xBC, 0x81),
129f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xE1, 0x00),
130f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0x3B, 0x22),
131f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD_NULL,
132f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport};
133f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
13453c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_vga_transfer_tdo35s[] = {
13597d9655c7fcc8e408d06ac6fb4cdffecd51cf5e8Jingoo Han	CMD1(0xcf, 0x02),	/* Blanking period control (1) */
136f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD2(0xd0, 0x08, 0x04),	/* Blanking period control (2) */
137f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xd1, 0x01),	/* CKV timing control on/off */
138f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD2(0xd2, 0x00, 0x1e),	/* CKV 1,2 timing control */
139f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD2(0xd3, 0x14, 0x28),	/* OEV timing control */
140f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD2(0xd4, 0x28, 0x64),	/* ASW timing control (1) */
141f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD1(0xd5, 0x28),	/* ASW timing control (2) */
142f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD0(0x21),		/* Invert for normally black display */
143f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD0(0x29),		/* Display on */
144f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	CMD_NULL,
145f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport};
146f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
14753c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic const uint32_t lcd_panel_config[] = {
148dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xb8, 0xff, 0xf9),	/* Output control */
149dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD0(0x11),		/* sleep out */
150dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xba, 0x01),	/* Display mode (1) */
151dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xbb, 0x00),	/* Display mode (2) */
152dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0x3a, 0x60),	/* Display mode 18-bit RGB */
153dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xbf, 0x10),	/* Drive system change control */
154dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb1, 0x56),	/* Booster operation setup */
155dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb2, 0x33),	/* Booster mode setup */
156dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb3, 0x11),	/* Booster frequency setup */
157dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb4, 0x02),	/* Op amp/system clock */
158dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb5, 0x35),	/* VCS voltage */
159dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb6, 0x40),	/* VCOM voltage */
160dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xb7, 0x03),	/* External display signal */
161dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xbd, 0x00),	/* ASW slew rate */
162dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xbe, 0x00),	/* Dummy data for QuadData operation */
163dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc0, 0x11),	/* Sleep out FR count (A) */
164dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc1, 0x11),	/* Sleep out FR count (B) */
165dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc2, 0x11),	/* Sleep out FR count (C) */
166dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xc3, 0x20, 0x40),	/* Sleep out FR count (D) */
167dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xc4, 0x60, 0xc0),	/* Sleep out FR count (E) */
168dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xc5, 0x10, 0x20),	/* Sleep out FR count (F) */
169dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc6, 0xc0),	/* Sleep out FR count (G) */
170dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xc7, 0x33, 0x43),	/* Gamma 1 fine tuning (1) */
171dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc8, 0x44),	/* Gamma 1 fine tuning (2) */
172dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xc9, 0x33),	/* Gamma 1 inclination adjustment */
173dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD1(0xca, 0x00),	/* Gamma 1 blue offset adjustment */
174dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD2(0xec, 0x01, 0xf0),	/* Horizontal clock cycles */
175dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	CMD_NULL,
176dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
177dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
17853c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Hanstatic int tdo24m_writes(struct tdo24m *lcd, const uint32_t *array)
179dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
180dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_transfer *x = &lcd->xfer;
18153c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Han	const uint32_t *p = array;
18253c7a2fffd71787299d6c7a7107b233d37ad7284Jingoo Han	uint32_t data;
183dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int nparams, err = 0;
184dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
185dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	for (; *p != CMD_NULL; p++) {
186f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		if (!lcd->color_invert && *p == CMD0(0x21))
187f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport			continue;
188dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
189dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		nparams = (*p >> 30) & 0x3;
190dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
191dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		data = *p << (7 - nparams);
192dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		switch (nparams) {
193dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		case 0:
194dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[0] = (data >> 8) & 0xff;
195dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[1] = data & 0xff;
196dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			break;
197dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		case 1:
198dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[0] = (data >> 16) & 0xff;
199dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[1] = (data >> 8) & 0xff;
200dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[2] = data & 0xff;
201dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			break;
202dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		case 2:
203dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[0] = (data >> 24) & 0xff;
204dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[1] = (data >> 16) & 0xff;
205dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[2] = (data >> 8) & 0xff;
206dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			lcd->buf[3] = data & 0xff;
207dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			break;
208dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		default:
209dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			continue;
210dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		}
211dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		x->len = nparams + 2;
212dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		err = spi_sync(lcd->spi_dev, &lcd->msg);
213dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		if (err)
214dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao			break;
215dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	}
216dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
217dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return err;
218dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
219dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
220dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
221dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
222dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	switch (mode) {
223dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	case MODE_VGA:
224f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
225dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		tdo24m_writes(lcd, lcd_panel_config);
226f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
227dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		break;
228dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	case MODE_QVGA:
229f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
230f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_panel_config);
231f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_qvga_transfer);
232f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		break;
233f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	default:
234f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		return -EINVAL;
235f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	}
236f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
237f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	lcd->mode = mode;
238f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	return 0;
239f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport}
240f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
241f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoportstatic int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
242f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport{
243f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	switch (mode) {
244f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	case MODE_VGA:
245f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
246f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_panel_config);
247f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
248f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		break;
249f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	case MODE_QVGA:
250f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
251dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		tdo24m_writes(lcd, lcd_panel_config);
252dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		tdo24m_writes(lcd, lcd_qvga_transfer);
253dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		break;
254dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	default:
255dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		return -EINVAL;
256dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	}
257dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
258dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	lcd->mode = mode;
259dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return 0;
260dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
261dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
262dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_power_on(struct tdo24m *lcd)
263dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
264dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int err;
265dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
266dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	err = tdo24m_writes(lcd, lcd_panel_on);
267dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (err)
268dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		goto out;
269dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
270dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	err = tdo24m_writes(lcd, lcd_panel_reset);
271dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (err)
272dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		goto out;
273dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
274f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	err = lcd->adj_mode(lcd, lcd->mode);
275dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaoout:
276dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return err;
277dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
278dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
279dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_power_off(struct tdo24m *lcd)
280dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
281dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return tdo24m_writes(lcd, lcd_panel_off);
282dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
283dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
284dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_power(struct tdo24m *lcd, int power)
285dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
286dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int ret = 0;
287dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
288dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
289dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		ret = tdo24m_power_on(lcd);
290dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
291dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		ret = tdo24m_power_off(lcd);
292dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
293dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (!ret)
294dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		lcd->power = power;
295dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
296dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return ret;
297dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
298dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
299dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
300dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_set_power(struct lcd_device *ld, int power)
301dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
302dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct tdo24m *lcd = lcd_get_data(ld);
30351ed5dc253b4a11047266345d6ee30d0939f310eJingoo Han
304dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return tdo24m_power(lcd, power);
305dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
306dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
307dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_get_power(struct lcd_device *ld)
308dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
309dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct tdo24m *lcd = lcd_get_data(ld);
31051ed5dc253b4a11047266345d6ee30d0939f310eJingoo Han
311dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return lcd->power;
312dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
313dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
314dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
315dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
316dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct tdo24m *lcd = lcd_get_data(ld);
317dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int mode = MODE_QVGA;
318dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
319dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (m->xres == 640 || m->xres == 480)
320dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		mode = MODE_VGA;
321dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
322dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (lcd->mode == mode)
323dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		return 0;
324dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
325f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	return lcd->adj_mode(lcd, mode);
326dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
327dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
328dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic struct lcd_ops tdo24m_ops = {
329dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.get_power	= tdo24m_get_power,
330dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.set_power	= tdo24m_set_power,
331dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.set_mode	= tdo24m_set_mode,
332dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
333dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
3341b9e450de105c1429a15f4e2566695f4f425672aBill Pembertonstatic int tdo24m_probe(struct spi_device *spi)
335dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
336dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct tdo24m *lcd;
337dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_message *m;
338dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	struct spi_transfer *x;
339f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	struct tdo24m_platform_data *pdata;
340f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	enum tdo24m_model model;
341dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	int err;
342dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
343c512794cada491e008eeca822af7e4ad5db72a56Jingoo Han	pdata = dev_get_platdata(&spi->dev);
344f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	if (pdata)
345f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		model = pdata->model;
346f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	else
347f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		model = TDO24M;
348f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
349dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	spi->bits_per_word = 8;
350dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	spi->mode = SPI_MODE_3;
351dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	err = spi_setup(spi);
352dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (err)
353dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		return err;
354dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
355d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han	lcd = devm_kzalloc(&spi->dev, sizeof(struct tdo24m), GFP_KERNEL);
356dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (!lcd)
357dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		return -ENOMEM;
358dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
359dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	lcd->spi_dev = spi;
360dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	lcd->power = FB_BLANK_POWERDOWN;
361dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	lcd->mode = MODE_VGA;	/* default to VGA */
362dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
363d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han	lcd->buf = devm_kzalloc(&spi->dev, TDO24M_SPI_BUFF_SIZE, GFP_KERNEL);
364d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han	if (lcd->buf == NULL)
365dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		return -ENOMEM;
366dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
367dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	m = &lcd->msg;
368dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	x = &lcd->xfer;
369dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
370dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	spi_message_init(m);
371dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
372f64dcac0b1247842db2530959cbe3df1cb1947c4Mike Rapoport	x->cs_change = 1;
373dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	x->tx_buf = &lcd->buf[0];
374dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	spi_message_add_tail(x, m);
375dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
376f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	switch (model) {
377f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	case TDO24M:
378f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		lcd->color_invert = 1;
379f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		lcd->adj_mode = tdo24m_adj_mode;
380f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		break;
381f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	case TDO35S:
382f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		lcd->adj_mode = tdo35s_adj_mode;
383f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		lcd->color_invert = 0;
384f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		break;
385f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	default:
386f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport		dev_err(&spi->dev, "Unsupported model");
387d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han		return -EINVAL;
388f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport	}
389f4f6bda00fc6bf995a35d8246db45aacaa9b3f09Mike Rapoport
3900524fc5194e548a4fe32d87850b976e0ec4e9007Jingoo Han	lcd->lcd_dev = devm_lcd_device_register(&spi->dev, "tdo24m", &spi->dev,
3910524fc5194e548a4fe32d87850b976e0ec4e9007Jingoo Han						lcd, &tdo24m_ops);
392d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han	if (IS_ERR(lcd->lcd_dev))
393d073adc5caf03a928a230baf2d8a86b1f9a03710Jingoo Han		return PTR_ERR(lcd->lcd_dev);
394dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
395719d5b2bbbd980d06b8bd962cc2b9f0789b77670Jingoo Han	spi_set_drvdata(spi, lcd);
396dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
397dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	if (err)
3980524fc5194e548a4fe32d87850b976e0ec4e9007Jingoo Han		return err;
399dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
400dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return 0;
401dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
402dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
4037e4b9d0bb2a6464e541d51a1e59ba73470c7c453Bill Pembertonstatic int tdo24m_remove(struct spi_device *spi)
404dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
405719d5b2bbbd980d06b8bd962cc2b9f0789b77670Jingoo Han	struct tdo24m *lcd = spi_get_drvdata(spi);
406dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
407dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	tdo24m_power(lcd, FB_BLANK_POWERDOWN);
408dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return 0;
409dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
410dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
4113e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Han#ifdef CONFIG_PM_SLEEP
4123e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Hanstatic int tdo24m_suspend(struct device *dev)
413dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
4143e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Han	struct tdo24m *lcd = dev_get_drvdata(dev);
415dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
416dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
417dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
418dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
4193e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Hanstatic int tdo24m_resume(struct device *dev)
420dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
4213e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Han	struct tdo24m *lcd = dev_get_drvdata(dev);
422dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
423dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	return tdo24m_power(lcd, FB_BLANK_UNBLANK);
424dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
425dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao#endif
426dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
4273e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Hanstatic SIMPLE_DEV_PM_OPS(tdo24m_pm_ops, tdo24m_suspend, tdo24m_resume);
4283e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Han
429dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao/* Power down all displays on reboot, poweroff or halt */
430dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic void tdo24m_shutdown(struct spi_device *spi)
431dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao{
432719d5b2bbbd980d06b8bd962cc2b9f0789b77670Jingoo Han	struct tdo24m *lcd = spi_get_drvdata(spi);
433dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
434dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	tdo24m_power(lcd, FB_BLANK_POWERDOWN);
435dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao}
436dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
437dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miaostatic struct spi_driver tdo24m_driver = {
438dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.driver = {
439dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		.name		= "tdo24m",
440dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao		.owner		= THIS_MODULE,
4413e14e689496a36cfa4d034cb4fcf98deee363d7cJingoo Han		.pm		= &tdo24m_pm_ops,
442dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	},
443dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.probe		= tdo24m_probe,
444d1723fa266aff677571cad0bac7203ed2e424823Bill Pemberton	.remove		= tdo24m_remove,
445dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao	.shutdown	= tdo24m_shutdown,
446dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao};
447dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
448462dd83833065a6b3add3f102f4fe69efa1422e9Axel Linmodule_spi_driver(tdo24m_driver);
449dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric Miao
450dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric MiaoMODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
451dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric MiaoMODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
452dd89ccb23a718a25dd989a27b04bf52871c9fb23Eric MiaoMODULE_LICENSE("GPL");
453e0626e3844e8f430fc1a4417f523a00797df7ca6Anton VorontsovMODULE_ALIAS("spi:tdo24m");
454