intelfbhw.h revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac
11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef _INTELFBHW_H 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define _INTELFBHW_H 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* $DHD: intelfb/intelfbhw.h,v 1.5 2003/06/27 15:06:25 dawes Exp $ */ 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*** HW-specific data ***/ 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Information about the 852GM/855GM variants */ 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_85X_CAPID 0x44 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_85X_VARIANT_MASK 0x7 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_85X_VARIANT_SHIFT 5 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_VAR_855GME 0x0 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_VAR_855GM 0x4 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_VAR_852GME 0x2 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_VAR_852GM 0x5 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Information about DVO/LVDS Ports */ 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOA_PORT 0x1 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOB_PORT 0x2 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOC_PORT 0x4 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LVDS_PORT 0x8 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The Bridge device's PCI config space has information about the 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * fb aperture size and the amount of pre-reserved memory. 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_GMCH_CTRL 0x52 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_GMCH_ENABLED 0x4 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_GMCH_MEM_MASK 0x1 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_GMCH_MEM_64M 0x1 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_GMCH_MEM_128M 0 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_MASK (0x7 << 4) 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_DISABLED (0x0 << 4) 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_LOCAL (0x1 << 4) 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_STOLEN_512 (0x2 << 4) 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_STOLEN_1024 (0x3 << 4) 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_830_GMCH_GMS_STOLEN_8192 (0x4 << 4) 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_MASK (0x7 << 4) 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_DISABLED (0x0 << 4) 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_STOLEN_1M (0x1 << 4) 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_STOLEN_4M (0x2 << 4) 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_STOLEN_8M (0x3 << 4) 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_STOLEN_16M (0x4 << 4) 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_855_GMCH_GMS_STOLEN_32M (0x5 << 4) 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_915G_GMCH_GMS_STOLEN_48M (0x6 << 4) 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INTEL_915G_GMCH_GMS_STOLEN_64M (0x7 << 4) 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* HW registers */ 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Fence registers */ 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FENCE 0x2000 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FENCE_NUM 8 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Primary ring buffer */ 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRI_RING_TAIL 0x2030 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_TAIL_MASK 0x001ffff8 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_INUSE 0x1 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRI_RING_HEAD 0x2034 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_HEAD_WRAP_MASK 0x7ff 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_HEAD_WRAP_SHIFT 21 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_HEAD_MASK 0x001ffffc 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRI_RING_START 0x2038 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_START_MASK 0xfffff000 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRI_RING_LENGTH 0x203c 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_LENGTH_MASK 0x001ff000 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_REPORT_MASK (0x3 << 1) 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_NO_REPORT (0x0 << 1) 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_REPORT_64K (0x1 << 1) 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_REPORT_4K (0x2 << 1) 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_REPORT_128K (0x3 << 1) 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_ENABLE 0x1 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Tail can't wrap to any closer than RING_MIN_FREE bytes of the head, 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * and the last RING_MIN_FREE bytes need to be padded with MI_NOOP 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RING_MIN_FREE 64 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IPEHR 0x2088 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INSTDONE 0x2090 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PRI_RING_EMPTY 1 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INSTPM 0x20c0 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SYNC_FLUSH_ENABLE (1 << 5) 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INSTPS 0x20c4 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MEM_MODE 0x20cc 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MASK_SHIFT 16 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_BLC_0 0x20d8 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPA_WM_SHIFT 0 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPA_WM_MASK 0x3f 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPA_BL_SHIFT 8 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPA_BL_MASK 0xf 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPB_WM_SHIFT 16 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPB_WM_MASK 0x1f 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPB_BL_SHIFT 24 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPB_BL_MASK 0x7 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_BLC_1 0x20dc 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPC_WM_SHIFT 0 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPC_WM_MASK 0x1f 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPC_BL_SHIFT 8 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FW_DISPC_BL_MASK 0x7 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* PLL registers */ 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA0_DIVISOR 0x06000 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA1_DIVISOR 0x06004 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD 0x06010 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_0_P1_SHIFT 0 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_0_P1_FORCE_DIV2 (1 << 5) 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_0_P2_SHIFT 7 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_1_P1_SHIFT 8 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_1_P1_FORCE_DIV2 (1 << 13) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGAPD_1_P2_SHIFT 15 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_A 0x06014 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_B 0x06018 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_VCO_ENABLE (1 << 31) 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_2X_CLOCK_ENABLE (1 << 30) 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_SYNCLOCK_ENABLE (1 << 29) 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_VGA_MODE_DISABLE (1 << 28) 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_P2_MASK 1 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_P2_SHIFT 23 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_P1_FORCE_DIV2 (1 << 21) 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_P1_MASK 0x1f 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_P1_SHIFT 16 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_REFERENCE_SELECT_MASK (0x3 << 13) 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_REFERENCE_DEFAULT (0x0 << 13) 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_REFERENCE_TVCLK (0x2 << 13) 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_RATE_SELECT_MASK (1 << 8) 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_RATE_SELECT_FP0 (0 << 8) 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DPLL_RATE_SELECT_FP1 (1 << 8) 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPA0 0x06040 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPA1 0x06044 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPB0 0x06048 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FPB1 0x0604c 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FP_DIVISOR_MASK 0x3f 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FP_N_DIVISOR_SHIFT 16 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FP_M1_DIVISOR_SHIFT 8 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FP_M2_DIVISOR_SHIFT 0 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* PLL parameters (these are for 852GM/855GM/865G, check earlier chips). */ 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Clock values are in units of kHz */ 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLL_REFCLK 48000 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_VCO_FREQ 930000 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_VCO_FREQ 1400000 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_CLOCK 25000 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_CLOCK 350000 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define P_TRANSITION_CLOCK 165000 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_M 108 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_M 140 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_M1 18 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_M1 26 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_M2 6 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_M2 16 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_P 4 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_P 128 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_P1 0 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_P1 31 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_N 3 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_N 16 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CALC_VCLOCK(m1, m2, n, p1, p2) \ 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((PLL_REFCLK * (5 * ((m1) + 2) + ((m2) + 2)) / ((n) + 2)) / \ 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (((p1) + 2) * (1 << (p2 + 1)))) 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CALC_VCLOCK3(m, n, p) ((PLL_REFCLK * (m) / (n)) / (p)) 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Two pipes */ 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPE_A 0 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPE_B 1 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPE_MASK 1 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* palette registers */ 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_A 0x0a000 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_B 0x0a800 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef PALETTE_8_ENTRIES 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_ENTRIES 256 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_SIZE (PALETTE_8_ENTRIES * 4) 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_10_ENTRIES 128 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_10_SIZE (PALETTE_10_ENTRIES * 8) 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_MASK 0xff 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_RED_SHIFT 16 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_GREEN_SHIFT 8 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PALETTE_8_BLUE_SHIFT 0 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* CRTC registers */ 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HTOTAL_A 0x60000 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANK_A 0x60004 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNC_A 0x60008 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VTOTAL_A 0x6000c 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANK_A 0x60010 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNC_A 0x60014 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_A 0x6001c 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BCLRPAT_A 0x60020 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HTOTAL_B 0x61000 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANK_B 0x61004 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNC_B 0x61008 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VTOTAL_B 0x6100c 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANK_B 0x61010 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNC_B 0x61014 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_B 0x6101c 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BCLRPAT_B 0x61020 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HTOTAL_MASK 0xfff 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HTOTAL_SHIFT 16 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HACTIVE_MASK 0x7ff 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HACTIVE_SHIFT 0 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANKEND_MASK 0xfff 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANKEND_SHIFT 16 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANKSTART_MASK 0xfff 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HBLANKSTART_SHIFT 0 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNCEND_MASK 0xfff 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNCEND_SHIFT 16 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNCSTART_MASK 0xfff 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HSYNCSTART_SHIFT 0 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VTOTAL_MASK 0xfff 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VTOTAL_SHIFT 16 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VACTIVE_MASK 0x7ff 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VACTIVE_SHIFT 0 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANKEND_MASK 0xfff 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANKEND_SHIFT 16 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANKSTART_MASK 0xfff 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VBLANKSTART_SHIFT 0 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNCEND_MASK 0xfff 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNCEND_SHIFT 16 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNCSTART_MASK 0xfff 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VSYNCSTART_SHIFT 0 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_HORIZ_MASK 0x7ff 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_HORIZ_SHIFT 16 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_VERT_MASK 0x7ff 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_SIZE_VERT_SHIFT 0 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA 0x61100 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DAC_ENABLE (1 << 31) 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DAC_DISABLE 0 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_PIPE_SELECT_SHIFT 30 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_USE_VGA_HVPOLARITY (1 << 15) 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_SETS_HVPOLARITY 0 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DPMS_CONTROL_MASK (0x3 << 10) 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DPMS_D0 (0x0 << 10) 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DPMS_D2 (0x1 << 10) 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DPMS_D1 (0x2 << 10) 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_DPMS_D3 (0x3 << 10) 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_VSYNC_ACTIVE_SHIFT 4 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_HSYNC_ACTIVE_SHIFT 3 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_SYNC_ACTIVE_MASK 1 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_SYNC_ACTIVE_HIGH 1 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADPA_SYNC_ACTIVE_LOW 0 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOA 0x61120 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOB 0x61140 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOC 0x61160 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define LVDS 0x61180 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PORT_ENABLE (1 << 31) 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PORT_PIPE_SELECT_SHIFT 30 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PORT_TV_FLAGS_MASK 0xFF 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PORT_TV_FLAGS 0xC4 // ripped from my BIOS 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds // to understand and correct 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOA_SRCDIM 0x61124 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOB_SRCDIM 0x61144 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DVOC_SRCDIM 0x61164 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPEACONF 0x70008 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPEBCONF 0x71008 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_ENABLE (1 << 31) 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_DISABLE 0 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_DOUBLE_WIDE (1 << 30) 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_SINGLE_WIDE 0 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_LOCKED (1 << 25) 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_UNLOCKED 0 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_GAMMA (1 << 24) 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PIPECONF_PALETTE 0 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPARB 0x70030 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPARB_AEND_MASK 0x1ff 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPARB_AEND_SHIFT 0 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPARB_BEND_MASK 0x3ff 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPARB_BEND_SHIFT 9 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Desktop HW cursor */ 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_CONTROL 0x70080 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_ENABLE (1 << 31) 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_GAMMA_ENABLE (1 << 30) 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_STRIDE_MASK (0x3 << 28) 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_STRIDE_256 (0x0 << 28) 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_STRIDE_512 (0x1 << 28) 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_STRIDE_1K (0x2 << 28) 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_STRIDE_2K (0x3 << 28) 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_MASK (0x7 << 24) 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_2C (0x0 << 24) 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_3C (0x1 << 24) 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_4C (0x2 << 24) 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_ARGB (0x4 << 24) 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_FORMAT_XRGB (0x5 << 24) 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Mobile HW cursor (and i810) */ 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_CONTROL CURSOR_CONTROL 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_CONTROL 0x700c0 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_MASK 0x27 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_DISABLE 0 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_64_3C 0x04 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_64_4C_AX 0x05 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_64_4C 0x06 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_64_32B_AX 0x07 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MODE_64_ARGB_AX 0x27 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_PIPE_SELECT_SHIFT 28 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MOBILE_GAMMA_ENABLE (1 << 26) 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_MEM_TYPE_LOCAL (1 << 25) 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* All platforms (desktop has no pipe B) */ 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_BASEADDR 0x70084 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_BASEADDR 0x700c4 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_BASE_MASK 0xffffff00 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_POSITION 0x70088 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_POSITION 0x700c8 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_POS_SIGN (1 << 15) 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_POS_MASK 0x7ff 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_X_SHIFT 0 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_Y_SHIFT 16 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_PALETTE0 0x70090 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_PALETTE1 0x70094 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_PALETTE2 0x70098 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_A_PALETTE3 0x7009c 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_PALETTE0 0x700d0 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_PALETTE1 0x700d4 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_PALETTE2 0x700d8 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_B_PALETTE3 0x700dc 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_COLOR_MASK 0xff 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_RED_SHIFT 16 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_GREEN_SHIFT 8 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_BLUE_SHIFT 0 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_PALETTE_MASK 0xffffff 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Desktop only */ 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_SIZE 0x700a0 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_SIZE_MASK 0x3ff 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_SIZE_H_SHIFT 0 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CURSOR_SIZE_V_SHIFT 12 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPACNTR 0x70180 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPBCNTR 0x71180 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_PLANE_ENABLE (1 << 31) 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_PLANE_DISABLE 0 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_GAMMA_ENABLE (1<<30) 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_GAMMA_DISABLE 0 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_PIXFORMAT_MASK (0xf<<26) 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_8BPP (0x2<<26) 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_15_16BPP (0x4<<26) 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_16BPP (0x5<<26) 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_32BPP (0x7<<26) 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_STEREO_ENABLE (1<<25) 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_STEREO_DISABLE 0 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_SEL_PIPE_SHIFT 24 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_SRC_KEY_ENABLE (1<<22) 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_SRC_KEY_DISABLE 0 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_LINE_DOUBLE (1<<20) 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_NO_LINE_DOUBLE 0 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_STEREO_POLARITY_FIRST 0 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* plane B only */ 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_ALPHA_TRANS_DISABLE 0 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DISPPLANE_SPRITE_ABOVE_OVERLAY 1 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPABASE 0x70184 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPASTRIDE 0x70188 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPBBASE 0x71184 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DSPBSTRIDE 0x71188 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGACNTRL 0x71400 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_DISABLE (1 << 31) 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ENABLE 0 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PIPE_SELECT_SHIFT 29 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PALETTE_READ_SELECT 23 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PALETTE_A_WRITE_DISABLE (1 << 22) 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PALETTE_B_WRITE_DISABLE (1 << 21) 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_LEGACY_PALETTE (1 << 20) 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_6BIT_DAC 0 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_8BIT_DAC (1 << 20) 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADD_ID 0x71408 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADD_ID_MASK 0xff 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* BIOS scratch area registers (830M and 845G). */ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF0 0x71410 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF1 0x71414 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF2 0x71418 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF3 0x7141c 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF4 0x71420 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF5 0x71424 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF6 0x71428 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* BIOS scratch area registers (852GM, 855GM, 865G). */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF00 0x70410 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF01 0x70414 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF02 0x70418 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF03 0x7041c 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF04 0x70420 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF05 0x70424 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF06 0x70428 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF10 SWF0 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF11 SWF1 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF12 SWF2 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF13 SWF3 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF14 SWF4 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF15 SWF5 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF16 SWF6 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF30 0x72414 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF31 0x72418 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SWF32 0x7241c 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Memory Commands */ 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_NOOP (0x00 << 23) 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_NOOP_WRITE_ID (1 << 22) 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_NOOP_ID_MASK ((1 << 22) - 1) 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_FLUSH (0x04 << 23) 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_WRITE_DIRTY_STATE (1 << 4) 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_END_SCENE (1 << 3) 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_INHIBIT_RENDER_CACHE_FLUSH (1 << 2) 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_INVALIDATE_MAP_CACHE (1 << 0) 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MI_STORE_DWORD_IMM ((0x20 << 23) | 1) 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2D Commands */ 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define COLOR_BLT_CMD ((2 << 29) | (0x40 << 22) | 3) 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_COLOR_BLT_CMD ((2 << 29) | (0x50 << 22) | 4) 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_SETUP_CLIP_BLT_CMD ((2 << 29) | (0x03 << 22) | 1) 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_SRC_COPY_BLT_CMD ((2 << 29) | (0x53 << 22) | 6) 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_COPY_BLT_CMD ((2 << 29) | (0x43 << 22) | 4) 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_MONO_PAT_BLT_CMD ((2 << 29) | (0x52 << 22) | 7) 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_MONO_SRC_BLT_CMD ((2 << 29) | (0x54 << 22) | 6) 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define XY_MONO_SRC_IMM_BLT_CMD ((2 << 29) | (0x71 << 22) | 5) 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TXT_IMM_BLT_CMD ((2 << 29) | (0x30 << 22) | 2) 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SETUP_BLT_CMD ((2 << 29) | (0x00 << 22) | 6) 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DW_LENGTH_MASK 0xff 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WRITE_ALPHA (1 << 21) 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WRITE_RGB (1 << 20) 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VERT_SEED (3 << 8) 4661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HORIZ_SEED (3 << 12) 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define COLOR_DEPTH_8 (0 << 24) 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define COLOR_DEPTH_16 (1 << 24) 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define COLOR_DEPTH_32 (3 << 24) 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_ROP_GXCOPY 0xcc 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SRC_ROP_GXXOR 0x66 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PAT_ROP_GXCOPY 0xf0 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PAT_ROP_GXXOR 0x5a 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PITCH_SHIFT 0 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ROP_SHIFT 16 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WIDTH_SHIFT 0 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define HEIGHT_SHIFT 16 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* in bytes */ 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_MONO_IMM_SIZE 128 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*** Macros ***/ 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* I/O macros */ 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr))) 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr))) 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \ 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (addr))) 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \ 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (addr))) 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Ring buffer macros */ 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define OUT_RING(n) do { \ 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((n), (u32 __iomem *)(dinfo->ring.virtual + dinfo->ring_tail));\ 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dinfo->ring_tail += 4; \ 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dinfo->ring_tail &= dinfo->ring_tail_mask; \ 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define START_RING(n) do { \ 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (dinfo->ring_space < (n) * 4) \ 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds wait_ring(dinfo,(n) * 4); \ 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dinfo->ring_space -= (n) * 4; \ 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ADVANCE_RING() do { \ 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds OUTREG(PRI_RING_TAIL, dinfo->ring_tail); \ 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DO_RING_IDLE() do { \ 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 head, tail; \ 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do { \ 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds head = INREG(PRI_RING_HEAD) & RING_HEAD_MASK; \ 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tail = INREG(PRI_RING_TAIL) & RING_TAIL_MASK; \ 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); \ 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } while (head != tail); \ 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* function protoypes */ 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_get_chipset(struct pci_dev *pdev, const char **name, 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int *chipset, int *mobile); 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size, 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int *stolen_size); 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_check_non_crt(struct intelfb_info *dinfo); 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern const char *intelfbhw_dvo_to_string(int dvo); 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_validate_mode(struct intelfb_info *dinfo, 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct fb_var_screeninfo *var); 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_pan_display(struct fb_var_screeninfo *var, 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct fb_info *info); 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_do_blank(int blank, struct fb_info *info); 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno, 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned red, unsigned green, unsigned blue, 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned transp); 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_read_hw_state(struct intelfb_info *dinfo, 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct intelfb_hwstate *hw, int flag); 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_print_hw_state(struct intelfb_info *dinfo, 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct intelfb_hwstate *hw); 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_mode_to_hw(struct intelfb_info *dinfo, 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct intelfb_hwstate *hw, 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct fb_var_screeninfo *var); 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_program_mode(struct intelfb_info *dinfo, 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds const struct intelfb_hwstate *hw, int blank); 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_do_sync(struct intelfb_info *dinfo); 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_2d_stop(struct intelfb_info *dinfo); 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_2d_start(struct intelfb_info *dinfo); 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 w, u32 h, u32 color, u32 pitch, u32 bpp, 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 rop); 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_do_bitblt(struct intelfb_info *dinfo, u32 curx, u32 cury, 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 dstx, u32 dsty, u32 w, u32 h, u32 pitch, 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 bpp); 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 w, u32 h, const u8* cdat, u32 x, u32 y, 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 pitch, u32 bpp); 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_init(struct intelfb_info *dinfo); 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_hide(struct intelfb_info *dinfo); 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_show(struct intelfb_info *dinfo); 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y); 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 fg); 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int height, u8 *data); 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern void intelfbhw_cursor_reset(struct intelfb_info *dinfo); 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* _INTELFBHW_H */ 571