11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Portions Copyright (c) 2001 Matrox Graphics Inc. 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Version: 1.65 2002/08/14 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Contributors: "menion?" <menion@mindless.com> 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Betatesting, fixes, ideas 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Kurt Garloff" <garloff@suse.de> 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Betatesting, fixes, ideas, videomodes, videomodes timmings 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Tom Rini" <trini@kernel.crashing.org> 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MTRR stuff, PPC cleanups, betatesting, fixes, ideas 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Bibek Sahu" <scorpio@dodds.net> 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Access device through readb|w|l and write b|w|l 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Extensive debugging stuff 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Daniel Haun" <haund@usa.net> 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Testing, hardware cursor fixes 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Scott Wood" <sawst46+@pitt.edu> 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Fixes 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Betatesting 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Kelly French" <targon@hazmat.com> 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Betatesting, bug reporting 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Pablo Bianucci" <pbian@pccp.com.ar> 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Fixes, ideas, betatesting 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Fixes, enhandcements, ideas, betatesting 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PPC betatesting, PPC support, backward compatibility 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Paul Womar" <Paul@pwomar.demon.co.uk> 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Owen Waller" <O.Waller@ee.qub.ac.uk> 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * PPC betatesting 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Thomas Pornin" <pornin@bolet.ens.fr> 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Alpha betatesting 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Pieter van Leuven" <pvl@iae.nl> 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * G100 testing 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "H. Peter Arvin" <hpa@transmeta.com> 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Ideas 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Cort Dougan" <cort@cs.nmt.edu> 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * CHRP fixes and PReP cleanup 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * "Mark Vojkovich" <mvojkovi@ucsd.edu> 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * G400 support 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (following author is not in any relation with this code, but his code 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * is included in this driver) 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on framebuffer driver for VBE 2.0 compliant graphic boards 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * (following author is not in any relation with this code, but his ideas 75beb7dd86a101263bf63a78c7c6d4da3849b35bd6Robert P. J. Day * were used when writing this driver) 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "matroxfb_Ti3026.h" 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "matroxfb_misc.h" 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "matroxfb_accel.h" 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/matroxfb.h> 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_FB_MATROX_MILLENIUM 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define outTi3026 matroxfb_DAC_out 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define inTi3026 matroxfb_DAC_in 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_INDEX 0x00 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_PALWRADD 0x00 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_PALDATA 0x01 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_PIXRDMSK 0x02 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_PALRDADD 0x03 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURCOLWRADD 0x04 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CLOVERSCAN 0x00 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CLCOLOR0 0x01 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CLCOLOR1 0x02 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CLCOLOR2 0x03 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURCOLDATA 0x05 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURCOLRDADD 0x07 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURCTRL 0x09 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_X_DATAREG 0x0A 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURRAMDATA 0x0B 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURPOSXL 0x0C 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURPOSXH 0x0D 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURPOSYL 0x0E 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_CURPOSYH 0x0F 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XSILICONREV 0x01 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL 0x06 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_DIS 0x00 /* transparent, transparent, transparent, transparent */ 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_3COLOR 0x01 /* transparent, 0, 1, 2 */ 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_XGA 0x02 /* 0, 1, transparent, complement */ 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_XWIN 0x03 /* transparent, transparent, 0, 1 */ 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_BLANK2048 0x00 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_BLANK4096 0x10 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_INTERLACED 0x20 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_ODD 0x00 /* ext.signal ODD/\EVEN */ 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_EVEN 0x40 /* ext.signal EVEN/\ODD */ 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_INDIRECT 0x00 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCURCTRL_DIRECT 0x80 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL 0x0F 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL_1_1 0x06 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL_2_1 0x07 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL_4_1 0x06 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL_8_1 0x06 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLATCHCTRL_16_1 0x06 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026A_XLATCHCTRL_4_3 0x06 /* ??? do not understand... but it works... !!! */ 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026A_XLATCHCTRL_8_3 0x07 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026B_XLATCHCTRL_4_3 0x08 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026B_XLATCHCTRL_8_3 0x06 /* ??? do not understand... but it works... !!! */ 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL 0x18 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_VRAM_SHIFT_ACCEL 0x00 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_VRAM_SHIFT_TVP 0x20 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR 0x80 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_TRUECOLOR 0x40 /* paletized */ 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_DIRECTCOLOR 0x00 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_24_ALTERNATE 0x08 /* 5:4/5:2 instead of 4:3/8:3 */ 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_RGB_888 0x16 /* 4:3/8:3 (or 5:4/5:2) */ 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_BGR_888 0x17 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_ORGB_8888 0x06 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_BGRO_8888 0x07 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_RGB_565 0x05 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_ORGB_1555 0x04 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_RGB_664 0x03 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTRUECOLORCTRL_RGBO_4444 0x01 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL 0x19 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_MEMORY_8BIT 0x01 /* - */ 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_MEMORY_16BIT 0x02 /* - */ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_MEMORY_32BIT 0x03 /* 2MB RAM, 512K * 4 */ 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_MEMORY_64BIT 0x04 /* >2MB RAM, 512K * 8 & more */ 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_PIXEL_4BIT 0x40 /* L0,H0,L1,H1... */ 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_PIXEL_4BIT_SWAPPED 0x60 /* H0,L0,H1,L1... */ 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_PIXEL_8BIT 0x48 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_PIXEL_16BIT 0x50 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_PIXEL_32BIT 0x58 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMUXCTRL_VGA 0x98 /* VGA MEMORY, 8BIT PIXEL */ 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL 0x1A 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV1 0x00 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV2 0x10 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV4 0x20 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV8 0x30 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV16 0x40 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV32 0x50 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_DIV64 0x60 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_CLKSTOPPED 0x70 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_CLK0 0x00 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_CLK1 0x01 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_CLK2 0x02 /* CLK2 is TTL source*/ 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_NCLK2 0x03 /* not CLK2 is TTL source */ 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_ECLK2 0x04 /* CLK2 and not CLK2 is ECL source */ 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_PLL 0x05 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_DIS 0x06 /* disable & poweroff internal clock */ 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCLKCTRL_SRC_CLK0VGA 0x07 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPALETTEPAGE 0x1C 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL 0x1D 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_HSYNC_POS 0x00 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_HSYNC_NEG 0x01 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_VSYNC_POS 0x00 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_VSYNC_NEG 0x02 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_LITTLE_ENDIAN 0x00 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_BIG_ENDIAN 0x08 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_BLACK_0IRE 0x00 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_BLACK_75IRE 0x10 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_NO_SYNC_ON_GREEN 0x00 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_SYNC_ON_GREEN 0x20 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_OVERSCAN_DIS 0x00 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENCTRL_OVERSCAN_EN 0x40 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL 0x1E 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_DAC_PUP 0x00 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_DAC_PDOWN 0x01 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_DAC_EXT 0x00 /* or 8, bit 3 is ignored */ 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_DAC_6BIT 0x04 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_DAC_8BIT 0x0C 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_PSEL_DIS 0x00 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_PSEL_EN 0x10 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_PSEL_LOW 0x00 /* PSEL high selects directcolor */ 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMISCCTRL_PSEL_HIGH 0x20 /* PSEL high selects truecolor or pseudocolor */ 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENIOCTRL 0x2A 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XGENIODATA 0x2B 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLADDR 0x2C 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLADDR_X(LOOP,MCLK,PIX) (((LOOP)<<4) | ((MCLK)<<2) | (PIX)) 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLDATA_N 0x00 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLDATA_M 0x01 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLDATA_P 0x02 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPLLDATA_STAT 0x03 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XPIXPLLDATA 0x2D 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLDATA 0x2E 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XLOOPPLLDATA 0x2F 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYOVRMIN 0x30 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYOVRMAX 0x31 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYREDMIN 0x32 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYREDMAX 0x33 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYGREENMIN 0x34 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYGREENMAX 0x35 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYBLUEMIN 0x36 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYBLUEMAX 0x37 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL 0x38 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_OVR_EN 0x01 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_RED_EN 0x02 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_GREEN_EN 0x04 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_BLUE_EN 0x08 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_NEGATE 0x10 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM1 0x00 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM2 0x20 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM4 0x40 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM8 0x60 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM16 0x80 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCOLKEYCTRL_ZOOM32 0xA0 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL 0x39 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_DIV(X) (((X)-1)>>1) /* 2,4,6,8,10,12,14,16, division applied to LOOP PLL after divide by 2^P */ 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_STROBEMKC4 0x08 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_MCLK_DOTCLOCK 0x00 /* MKC4 */ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL 0x10 /* MKC4 */ 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_RCLK_PIXPLL 0x00 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_RCLK_LOOPPLL 0x20 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XMEMPLLCTRL_RCLK_DOTDIVN 0x40 /* dot clock divided by loop pclk N prescaler */ 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XSENSETEST 0x3A 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XTESTMODEDATA 0x3B 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCRCREML 0x3C 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCRCREMH 0x3D 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XCRCBITSEL 0x3E 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TVP3026_XID 0x3F 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic const unsigned char DACseq[] = 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ TVP3026_XLATCHCTRL, TVP3026_XTRUECOLORCTRL, 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XMUXCTRL, TVP3026_XCLKCTRL, 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XPALETTEPAGE, 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XGENCTRL, 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XMISCCTRL, 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XGENIOCTRL, 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XGENIODATA, 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XCOLKEYOVRMIN, TVP3026_XCOLKEYOVRMAX, TVP3026_XCOLKEYREDMIN, TVP3026_XCOLKEYREDMAX, 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XCOLKEYGREENMIN, TVP3026_XCOLKEYGREENMAX, TVP3026_XCOLKEYBLUEMIN, TVP3026_XCOLKEYBLUEMAX, 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XCOLKEYCTRL, 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XMEMPLLCTRL, TVP3026_XSENSETEST, TVP3026_XCURCTRL }; 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XLATCHCTRL 0 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XTRUECOLORCTRL 1 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XMUXCTRL 2 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XCLKCTRL 3 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XGENCTRL 5 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XMISCCTRL 6 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XMEMPLLCTRL 18 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define POS3026_XCURCTRL 20 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic const unsigned char MGADACbpp32[] = 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ TVP3026_XLATCHCTRL_2_1, TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_8888, 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0x00, TVP3026_XCLKCTRL_DIV1 | TVP3026_XCLKCTRL_SRC_PLL, 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0x00, 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XGENCTRL_HSYNC_POS | TVP3026_XGENCTRL_VSYNC_POS | TVP3026_XGENCTRL_LITTLE_ENDIAN | TVP3026_XGENCTRL_BLACK_0IRE | TVP3026_XGENCTRL_NO_SYNC_ON_GREEN | TVP3026_XGENCTRL_OVERSCAN_DIS, 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_HIGH, 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0x00, 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0x1E, 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0xFF, 0xFF, 0xFF, 0xFF, 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0xFF, 0xFF, 0xFF, 0xFF, 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds TVP3026_XCOLKEYCTRL_ZOOM1, 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 0x00, 0x00, TVP3026_XCURCTRL_DIS }; 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 282316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic int Ti3026_calcclock(const struct matrox_fb_info *minfo, 283316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare unsigned int freq, unsigned int fmax, int *in, 284316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare int *feed, int *post) 285316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int fvco; 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int lin, lfeed, lpost; 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2895ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 291316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost); 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds fvco >>= (*post = lpost); 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *in = 64 - lin; 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *feed = 64 - lfeed; 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return fvco; 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 298316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk) 299316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int f_pll; 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int pixfeed, pixin, pixpost; 302fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare struct matrox_hw_state *hw = &minfo->hw; 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3045ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 306316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost); 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[0] = pixin | 0xC0; 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[1] = pixfeed; 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[2] = pixpost | 0xB0; 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds { 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int loopfeed, loopin, looppost, loopdiv, z; 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int Bpp; 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 316fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare Bpp = minfo->curr.final_bppShift; 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 318fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->fbcon.var.bits_per_pixel == 24) { 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopfeed = 3; /* set lm to any possible value */ 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopin = 3 * 32 / Bpp; 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopfeed = 4; 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopin = 4 * 32 / Bpp; 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds z = (110000 * loopin) / (f_pll * loopfeed); 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopdiv = 0; /* div 2 */ 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (z < 2) 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds looppost = 0; 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (z < 4) 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds looppost = 1; 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else if (z < 8) 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds looppost = 2; 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds looppost = 3; 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds loopdiv = z/16; 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 337fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->fbcon.var.bits_per_pixel == 24) { 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[4] = (65 - loopfeed) | 0x80; 340fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->accel.ramdac_rev > 0x20) { 341fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (isInterleave(minfo)) 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3; 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[4] &= ~0xC0; 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3; 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { 348fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (isInterleave(minfo)) 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ; /* default... */ 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else { 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[4] ^= 0xC0; /* change from 0x80 to 0x40 */ 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XLATCHCTRL] = TVP3026A_XLATCHCTRL_4_3; 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[5] = looppost | 0xF8; 356fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.mga_24bpp_fix) 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[5] ^= 0x40; 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[4] = 65 - loopfeed; 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACclk[5] = looppost | 0xF0; 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMEMPLLCTRL] = loopdiv | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_RCLK_LOOPPLL; 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 368316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m) 369316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 370fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; 371fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare struct matrox_hw_state *hw = &minfo->hw; 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3735ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg)); 376fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare switch (minfo->fbcon.var.bits_per_pixel) { 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 4: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1; /* or _8_1, they are same */ 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR; 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT; 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV8; 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW; 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 8: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_8_1; /* or _4_1, they are same */ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR; 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_8BIT; 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV4; 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMISCCTRL] = TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_LOW; 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 16: 39025985edcedea6396277003854657b5f3cb31a628Lucas De Marchi /* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used every time) */ 391fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565); 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT; 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2; 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 24: 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* XLATCHCTRL is: for (A) use _4_3 (?_8_3 is same? TBD), for (B) it is set in setpclk */ 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_888; 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_32BIT; 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV4; 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds case 32: 40225985edcedea6396277003854657b5f3cb31a628Lucas De Marchi /* XLATCHCTRL should be _2_1 / _1_1... Why is not? (_2_1 is used every time) */ 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_32BIT; 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds default: 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 1; /* TODO: failed */ 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 408316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (matroxfb_vgaHWinit(minfo, m)) return 1; 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set SYNC */ 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MiscOutReg = 0xCB; 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (m->sync & FB_SYNC_HOR_HIGH_ACT) 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_HSYNC_NEG; 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (m->sync & FB_SYNC_VERT_HIGH_ACT) 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_VSYNC_NEG; 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (m->sync & FB_SYNC_ON_GREEN) 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN; 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set DELAY */ 420fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->video.len < 0x400000) 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->CRTCEXT[3] |= 0x08; 422fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare else if (minfo->video.len > 0x400000) 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->CRTCEXT[3] |= 0x10; 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set HWCURSOR */ 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (m->interlaced) { 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCURCTRL] |= TVP3026_XCURCTRL_INTERLACED; 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (m->HTotal >= 1536) 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->DACreg[POS3026_XCURCTRL] |= TVP3026_XCURCTRL_BLANK4096; 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set interleaving */ 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg &= ~0x00001000; 434fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000; 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set DAC */ 437316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare Ti3026_setpclk(minfo, m->pixclock); 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 441316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout) 442316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int f_pll; 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int pclk_m, pclk_n, pclk_p; 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int mclk_m, mclk_n, mclk_p; 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned int rfhcnt, mclk_ctl; 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int tmout; 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4495ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 451316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p); 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* save pclk */ 454316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); 455316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA); 456316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFD); 457316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA); 458316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); 459316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA); 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* stop pclk */ 462316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); 463316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set pclk to new mclk */ 466316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); 467316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0); 468316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m); 469316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0); 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* wait for PLL to lock */ 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (tmout = 500000; tmout; tmout--) { 473316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 476cf6ac4ce1bdf2d0718d5f33d62f695e105706a5dJoe Perches } 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!tmout) 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n"); 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* output pclk on mclk pin */ 481316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL); 482316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7); 483316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4); 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* stop MCLK */ 486316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFB); 487316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00); 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* set mclk to new freq */ 490316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xF3); 491316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0); 492316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m); 493316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0); 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* wait for PLL to lock */ 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (tmout = 500000; tmout; tmout--) { 497316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40) 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!tmout) 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "matroxfb: Memory PLL not locked after 5 secs\n"); 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds f_pll = f_pll * 333 / (10000 << mclk_p); 505fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (isMilleniumII(minfo)) { 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rfhcnt = (f_pll - 128) / 256; 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rfhcnt > 15) 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rfhcnt = 15; 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } else { 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rfhcnt = (f_pll - 64) / 128; 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (rfhcnt > 15) 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds rfhcnt = 0; 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 514fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16); 515fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg); 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* output MCLK to MCLK pin */ 518316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); 519316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4); 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* stop PCLK */ 522316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); 523316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* restore pclk */ 526316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); 527316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n); 528316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m); 529316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p); 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* wait for PLL to lock */ 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (tmout = 500000; tmout; tmout--) { 533316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!tmout) 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n"); 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 541316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic void ti3026_ramdac_init(struct matrox_fb_info *minfo) 542316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 5435ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 545fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.vco_freq_min = 110000; 546fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.ref_freq = 114545; 547fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.feed_div_min = 2; 548fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.feed_div_max = 24; 549fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.in_div_min = 2; 550fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.in_div_max = 63; 551fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->features.pll.post_shift_max = 3; 552fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.noinit) 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return; 554316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare ti3026_setMCLK(minfo, 60000); 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 557316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic void Ti3026_restore(struct matrox_fb_info *minfo) 558316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char progdac[6]; 561fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare struct matrox_hw_state *hw = &minfo->hw; 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITFLAGS 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5645ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef DEBUG 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk(KERN_INFO "EXTVGA regs: "); 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 6; i++) 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk("%02X:", hw->CRTCEXT[i]); 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk("\n"); 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITBEGIN 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 575fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITEND 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 579316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare matroxfb_vgaHWrestore(minfo); 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITBEGIN 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 583fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->crtc1.panpos = -1; 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 6; i++) 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 21; i++) { 588316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, DACseq[i], hw->DACreg[i]); 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 591316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x00); 592316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA); 593316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); 594316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x15); 595316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA); 596316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); 597316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); 598316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA); 599316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITEND 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (memcmp(hw->DACclk, progdac, 6)) { 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* agrhh... setting up PLL is very slow on Millennium... */ 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Mystique PLL is locked in few ms, but Millennium PLL lock takes about 0.15 s... */ 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Maybe even we should call schedule() ? */ 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITBEGIN 608316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]); 609316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); 610316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0); 611316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, 0); 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 613316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x00); 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 3; i++) 615316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]); 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* wait for PLL only if PLL clock requested (always for PowerMode, never for VGA) */ 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (hw->MiscOutReg & 0x08) { 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int tmout; 619316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x3F); 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (tmout = 500000; tmout; --tmout) { 621316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITEND 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!tmout) 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n"); 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk(KERN_INFO "PixelPLL: %d\n", 500000-tmout); 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITBEGIN 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 634316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]); 635316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x00); 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 3; i < 6; i++) 637316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]); 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITEND 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((hw->MiscOutReg & 0x08) && ((hw->DACclk[5] & 0x80) == 0x80)) { 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int tmout; 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITBEGIN 643316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x3F); 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (tmout = 500000; tmout; --tmout) { 645316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40) 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds break; 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CRITEND 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!tmout) 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "matroxfb: Loop PLL not locked after 5 secs\n"); 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk(KERN_INFO "LoopPLL: %d\n", 500000-tmout); 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef DEBUG 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk(KERN_DEBUG "3026DACregs "); 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 21; i++) { 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk("R%02X=%02X ", DACseq[i], hw->DACreg[i]); 661ad361c9884e809340f6daca80d56a9e9c871690aJoe Perches if ((i & 0x7) == 0x7) dprintk(KERN_DEBUG "continuing... "); 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 663ad361c9884e809340f6daca80d56a9e9c871690aJoe Perches dprintk(KERN_DEBUG "DACclk "); 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < 6; i++) 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk("C%02X=%02X ", i, hw->DACclk[i]); 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dprintk("\n"); 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 670316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic void Ti3026_reset(struct matrox_fb_info *minfo) 671316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 6725ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 674316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare ti3026_ramdac_init(minfo); 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic struct matrox_altout ti3026_output = { 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds .name = "Primary output", 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 681316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvarestatic int Ti3026_preinit(struct matrox_fb_info *minfo) 682316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare{ 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds static const int vxres_mill2[] = { 512, 640, 768, 800, 832, 960, 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1024, 1152, 1280, 1600, 1664, 1920, 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2048, 0}; 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds static const int vxres_mill1[] = { 640, 768, 800, 960, 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1024, 1152, 1280, 1600, 1920, 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2048, 0}; 689fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare struct matrox_hw_state *hw = &minfo->hw; 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6915ae121705bed9ea7425daef4d7d29038f7312f3fHarvey Harrison DBG(__func__) 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 693fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->millenium = 1; 694fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL); 695fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->capable.cfb4 = 1; 696fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->capable.text = 1; /* isMilleniumII(minfo); */ 697fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1; 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 699fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->outputs[0].data = minfo; 700fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->outputs[0].output = &ti3026_output; 701fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->outputs[0].src = minfo->outputs[0].default_src; 702fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR; 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 704fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.noinit) 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* preserve VGA I/O, BIOS and PPC */ 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg &= 0xC0000100; 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg |= 0x002C0000; 709fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.novga) 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg &= ~0x00000100; 711fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.nobios) 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg &= ~0x40000000; 713fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare if (minfo->devflags.nopciretry) 7141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds hw->MXoptionReg |= 0x20000000; 715fc2d10ddfc8989e82f74d2a38c7d6bfa45bcaba9Jean Delvare pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 717316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV); 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 719316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); 720316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); 721316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA); 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 723316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); 724316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00); 725316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mga_outb(M_MISC_REG, 0x67); 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 729316b4d644caceb2cf7432d8a27e45b88f57ef2a0Jean Delvare outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mga_outl(M_RESET, 1); 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(250); 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mga_outl(M_RESET, 0); 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(250); 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds mga_outl(M_MACCESS, 0x00008000); 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds udelay(10); 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return 0; 7381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 7391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct matrox_switch matrox_millennium = { 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds Ti3026_preinit, Ti3026_reset, Ti3026_init, Ti3026_restore 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsEXPORT_SYMBOL(matrox_millennium); 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus TorvaldsMODULE_LICENSE("GPL"); 746