11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*
21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * linux/drivers/video/sa1100fb.h
31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *    -- StrongARM 1100 LCD Controller Frame Buffer Device
41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *
51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *  Copyright (C) 1999 Eric A. Thomas
61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *   Based on acornfb.c Copyright (C) Russell King.
71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds *
81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General Public
91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * License.  See the file COPYING in the main directory of this archive
101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details.
111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */
121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
137cb66dcc828662c8cacb74af08478433cef102b1Russell King#define LCCR0           0x0000          /* LCD Control Reg. 0 */
147cb66dcc828662c8cacb74af08478433cef102b1Russell King#define LCSR            0x0004          /* LCD Status Reg. */
157cb66dcc828662c8cacb74af08478433cef102b1Russell King#define DBAR1           0x0010          /* LCD DMA Base Address Reg. channel 1 */
167cb66dcc828662c8cacb74af08478433cef102b1Russell King#define DCAR1           0x0014          /* LCD DMA Current Address Reg. channel 1 */
177cb66dcc828662c8cacb74af08478433cef102b1Russell King#define DBAR2           0x0018          /* LCD DMA Base Address Reg.  channel 2 */
187cb66dcc828662c8cacb74af08478433cef102b1Russell King#define DCAR2           0x001C          /* LCD DMA Current Address Reg. channel 2 */
197cb66dcc828662c8cacb74af08478433cef102b1Russell King#define LCCR1           0x0020          /* LCD Control Reg. 1 */
207cb66dcc828662c8cacb74af08478433cef102b1Russell King#define LCCR2           0x0024          /* LCD Control Reg. 2 */
217cb66dcc828662c8cacb74af08478433cef102b1Russell King#define LCCR3           0x0028          /* LCD Control Reg. 3 */
227cb66dcc828662c8cacb74af08478433cef102b1Russell King
231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Shadows for LCD controller registers */
241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct sa1100fb_lcd_reg {
251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	unsigned long lccr0;
261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	unsigned long lccr1;
271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	unsigned long lccr2;
281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	unsigned long lccr3;
291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds};
301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct sa1100fb_info {
321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	struct fb_info		fb;
331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	struct device		*dev;
3458f5cbf275f8fb9529cba20df2564d370a6107daRussell King	const struct sa1100fb_rgb *rgb[NR_RGB];
357cb66dcc828662c8cacb74af08478433cef102b1Russell King	void __iomem		*base;
361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	/*
381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	 * These are the addresses we mapped
391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	 * the framebuffer memory region to.
401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	 */
411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	dma_addr_t		map_dma;
421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_char *		map_cpu;
431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			map_size;
441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_char *		screen_cpu;
461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	dma_addr_t		screen_dma;
471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u16 *			palette_cpu;
481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	dma_addr_t		palette_dma;
491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			palette_size;
501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	dma_addr_t		dbar1;
521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	dma_addr_t		dbar2;
531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			reg_lccr0;
551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			reg_lccr1;
561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			reg_lccr2;
571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	u_int			reg_lccr3;
581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	volatile u_char		state;
601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	volatile u_char		task_state;
617951ac91c7d45b61f54f1cdabc24b52b40785de6Matthias Kaehlcke	struct mutex		ctrlr_lock;
621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	wait_queue_head_t	ctrlr_wait;
631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	struct work_struct	task;
641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef CONFIG_CPU_FREQ
661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	struct notifier_block	freq_transition;
671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds	struct notifier_block	freq_policy;
681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif
69086ada54abaa4316e8603f02410fe8ebc9ba2de1Russell King
70086ada54abaa4316e8603f02410fe8ebc9ba2de1Russell King	const struct sa1100fb_mach_info *inf;
711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds};
721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
73b385a144ee790f00e8559bcb8024d042863f9be1Robert P. J. Day#define TO_INF(ptr,member)	container_of(ptr,struct sa1100fb_info,member)
741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA1100_PALETTE_MODE_VAL(bpp)    (((bpp) & 0x018) << 9)
761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*
781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * These are the actions for set_ctrlr_state
791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */
801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_DISABLE		(0)
811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_ENABLE		(1)
821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_DISABLE_CLKCHANGE	(2)
831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_ENABLE_CLKCHANGE	(3)
841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_REENABLE		(4)
851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_DISABLE_PM		(5)
861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_ENABLE_PM		(6)
871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define C_STARTUP		(7)
881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SA1100_NAME	"SA1100"
901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/*
921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Minimum X and Y resolutions
931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */
941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_XRES	64
951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIN_YRES	64
961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds
97