libata.h revision 082776e4be791736c32baf818e50f501a7f83819
1/* 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved. 3 * Copyright 2003-2005 Jeff Garzik 4 * 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2, or (at your option) 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; see the file COPYING. If not, write to 18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 19 * 20 * 21 * libata documentation is available via 'make {ps|pdf}docs', 22 * as Documentation/DocBook/libata.* 23 * 24 */ 25 26#ifndef __LINUX_LIBATA_H__ 27#define __LINUX_LIBATA_H__ 28 29#include <linux/delay.h> 30#include <linux/interrupt.h> 31#include <linux/pci.h> 32#include <linux/dma-mapping.h> 33#include <asm/io.h> 34#include <linux/ata.h> 35#include <linux/workqueue.h> 36 37/* 38 * compile-time options: to be removed as soon as all the drivers are 39 * converted to the new debugging mechanism 40 */ 41#undef ATA_DEBUG /* debugging output */ 42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */ 43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */ 44#undef ATA_NDEBUG /* define to disable quick runtime checks */ 45#undef ATA_ENABLE_PATA /* define to enable PATA support in some 46 * low-level drivers */ 47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */ 48 49 50/* note: prints function name for you */ 51#ifdef ATA_DEBUG 52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 53#ifdef ATA_VERBOSE_DEBUG 54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 55#else 56#define VPRINTK(fmt, args...) 57#endif /* ATA_VERBOSE_DEBUG */ 58#else 59#define DPRINTK(fmt, args...) 60#define VPRINTK(fmt, args...) 61#endif /* ATA_DEBUG */ 62 63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 64 65/* NEW: debug levels */ 66#define HAVE_LIBATA_MSG 1 67 68enum { 69 ATA_MSG_DRV = 0x0001, 70 ATA_MSG_INFO = 0x0002, 71 ATA_MSG_PROBE = 0x0004, 72 ATA_MSG_WARN = 0x0008, 73 ATA_MSG_MALLOC = 0x0010, 74 ATA_MSG_CTL = 0x0020, 75 ATA_MSG_INTR = 0x0040, 76 ATA_MSG_ERR = 0x0080, 77}; 78 79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV) 80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO) 81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE) 82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN) 83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC) 84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL) 85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR) 86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR) 87 88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits) 89{ 90 if (dval < 0 || dval >= (sizeof(u32) * 8)) 91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */ 92 if (!dval) 93 return 0; 94 return (1 << dval) - 1; 95} 96 97/* defines only for the constants which don't work well as enums */ 98#define ATA_TAG_POISON 0xfafbfcfdU 99 100/* move to PCI layer? */ 101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) 102{ 103 return &pdev->dev; 104} 105 106enum { 107 /* various global constants */ 108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2, 109 ATA_MAX_PORTS = 8, 110 ATA_DEF_QUEUE = 1, 111 ATA_MAX_QUEUE = 1, 112 ATA_MAX_SECTORS = 200, /* FIXME */ 113 ATA_MAX_BUS = 2, 114 ATA_DEF_BUSY_WAIT = 10000, 115 ATA_SHORT_PAUSE = (HZ >> 6) + 1, 116 117 ATA_SHT_EMULATED = 1, 118 ATA_SHT_CMD_PER_LUN = 1, 119 ATA_SHT_THIS_ID = -1, 120 ATA_SHT_USE_CLUSTERING = 1, 121 122 /* struct ata_device stuff */ 123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */ 124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */ 125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */ 126 127 ATA_DEV_UNKNOWN = 0, /* unknown device */ 128 ATA_DEV_ATA = 1, /* ATA device */ 129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */ 130 ATA_DEV_ATAPI = 3, /* ATAPI device */ 131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */ 132 ATA_DEV_NONE = 5, /* no device */ 133 134 /* struct ata_port flags */ 135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */ 136 /* (doesn't imply presence) */ 137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */ 138 ATA_FLAG_SATA = (1 << 3), 139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */ 140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */ 141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */ 142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */ 143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ 144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once 145 * proper HSM is in place. */ 146 ATA_FLAG_DEBUGMSG = (1 << 10), 147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */ 148 149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */ 150 151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */ 152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */ 153 154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */ 155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */ 156 157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ 158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ 159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */ 160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, 161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */ 162 163 /* various lengths of time */ 164 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */ 165 ATA_TMOUT_PIO = 30 * HZ, 166 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 167 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 168 ATA_TMOUT_CDB = 30 * HZ, 169 ATA_TMOUT_CDB_QUICK = 5 * HZ, 170 ATA_TMOUT_INTERNAL = 30 * HZ, 171 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, 172 173 /* ATA bus states */ 174 BUS_UNKNOWN = 0, 175 BUS_DMA = 1, 176 BUS_IDLE = 2, 177 BUS_NOINTR = 3, 178 BUS_NODATA = 4, 179 BUS_TIMER = 5, 180 BUS_PIO = 6, 181 BUS_EDD = 7, 182 BUS_IDENTIFY = 8, 183 BUS_PACKET = 9, 184 185 /* SATA port states */ 186 PORT_UNKNOWN = 0, 187 PORT_ENABLED = 1, 188 PORT_DISABLED = 2, 189 190 /* encoding various smaller bitmaps into a single 191 * unsigned int bitmap 192 */ 193 ATA_BITS_PIO = 5, 194 ATA_BITS_MWDMA = 3, 195 ATA_BITS_UDMA = 8, 196 197 ATA_SHIFT_PIO = 0, 198 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO, 199 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA, 200 201 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO, 202 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA, 203 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA, 204 205 /* size of buffer to pad xfers ending on unaligned boundaries */ 206 ATA_DMA_PAD_SZ = 4, 207 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, 208 209 /* Masks for port functions */ 210 ATA_PORT_PRIMARY = (1 << 0), 211 ATA_PORT_SECONDARY = (1 << 1), 212}; 213 214enum hsm_task_states { 215 HSM_ST_UNKNOWN, 216 HSM_ST_IDLE, 217 HSM_ST_POLL, 218 HSM_ST_TMOUT, 219 HSM_ST, 220 HSM_ST_LAST, 221 HSM_ST_LAST_POLL, 222 HSM_ST_ERR, 223}; 224 225enum ata_completion_errors { 226 AC_ERR_DEV = (1 << 0), /* device reported error */ 227 AC_ERR_HSM = (1 << 1), /* host state machine violation */ 228 AC_ERR_TIMEOUT = (1 << 2), /* timeout */ 229 AC_ERR_MEDIA = (1 << 3), /* media error */ 230 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */ 231 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */ 232 AC_ERR_SYSTEM = (1 << 6), /* system error */ 233 AC_ERR_INVALID = (1 << 7), /* invalid argument */ 234 AC_ERR_OTHER = (1 << 8), /* unknown */ 235}; 236 237/* forward declarations */ 238struct scsi_device; 239struct ata_port_operations; 240struct ata_port; 241struct ata_queued_cmd; 242 243/* typedefs */ 244typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); 245typedef void (*ata_probeinit_fn_t)(struct ata_port *); 246typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *); 247typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *); 248 249struct ata_ioports { 250 unsigned long cmd_addr; 251 unsigned long data_addr; 252 unsigned long error_addr; 253 unsigned long feature_addr; 254 unsigned long nsect_addr; 255 unsigned long lbal_addr; 256 unsigned long lbam_addr; 257 unsigned long lbah_addr; 258 unsigned long device_addr; 259 unsigned long status_addr; 260 unsigned long command_addr; 261 unsigned long altstatus_addr; 262 unsigned long ctl_addr; 263 unsigned long bmdma_addr; 264 unsigned long scr_addr; 265}; 266 267struct ata_probe_ent { 268 struct list_head node; 269 struct device *dev; 270 const struct ata_port_operations *port_ops; 271 struct scsi_host_template *sht; 272 struct ata_ioports port[ATA_MAX_PORTS]; 273 unsigned int n_ports; 274 unsigned int hard_port_no; 275 unsigned int pio_mask; 276 unsigned int mwdma_mask; 277 unsigned int udma_mask; 278 unsigned int legacy_mode; 279 unsigned long irq; 280 unsigned int irq_flags; 281 unsigned long host_flags; 282 void __iomem *mmio_base; 283 void *private_data; 284}; 285 286struct ata_host_set { 287 spinlock_t lock; 288 struct device *dev; 289 unsigned long irq; 290 void __iomem *mmio_base; 291 unsigned int n_ports; 292 void *private_data; 293 const struct ata_port_operations *ops; 294 struct ata_port * ports[0]; 295}; 296 297struct ata_queued_cmd { 298 struct ata_port *ap; 299 struct ata_device *dev; 300 301 struct scsi_cmnd *scsicmd; 302 void (*scsidone)(struct scsi_cmnd *); 303 304 struct ata_taskfile tf; 305 u8 cdb[ATAPI_CDB_LEN]; 306 307 unsigned long flags; /* ATA_QCFLAG_xxx */ 308 unsigned int tag; 309 unsigned int n_elem; 310 unsigned int orig_n_elem; 311 312 int dma_dir; 313 314 unsigned int pad_len; 315 316 unsigned int nsect; 317 unsigned int cursect; 318 319 unsigned int nbytes; 320 unsigned int curbytes; 321 322 unsigned int cursg; 323 unsigned int cursg_ofs; 324 325 struct scatterlist sgent; 326 struct scatterlist pad_sgent; 327 void *buf_virt; 328 329 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ 330 struct scatterlist *__sg; 331 332 unsigned int err_mask; 333 334 ata_qc_cb_t complete_fn; 335 336 void *private_data; 337}; 338 339struct ata_host_stats { 340 unsigned long unhandled_irq; 341 unsigned long idle_irq; 342 unsigned long rw_reqbuf; 343}; 344 345struct ata_device { 346 u64 n_sectors; /* size of device, if ATA */ 347 unsigned long flags; /* ATA_DFLAG_xxx */ 348 unsigned int class; /* ATA_DEV_xxx */ 349 unsigned int devno; /* 0 or 1 */ 350 u16 *id; /* IDENTIFY xxx DEVICE data */ 351 u8 pio_mode; 352 u8 dma_mode; 353 u8 xfer_mode; 354 unsigned int xfer_shift; /* ATA_SHIFT_xxx */ 355 356 unsigned int multi_count; /* sectors count for 357 READ/WRITE MULTIPLE */ 358 unsigned int max_sectors; /* per-device max sectors */ 359 unsigned int cdb_len; 360 361 /* per-dev xfer mask */ 362 unsigned int pio_mask; 363 unsigned int mwdma_mask; 364 unsigned int udma_mask; 365 366 /* for CHS addressing */ 367 u16 cylinders; /* Number of cylinders */ 368 u16 heads; /* Number of heads */ 369 u16 sectors; /* Number of sectors per track */ 370}; 371 372struct ata_port { 373 struct Scsi_Host *host; /* our co-allocated scsi host */ 374 const struct ata_port_operations *ops; 375 unsigned long flags; /* ATA_FLAG_xxx */ 376 unsigned int id; /* unique id req'd by scsi midlyr */ 377 unsigned int port_no; /* unique port #; from zero */ 378 unsigned int hard_port_no; /* hardware port #; from zero */ 379 380 struct ata_prd *prd; /* our SG list */ 381 dma_addr_t prd_dma; /* and its DMA mapping */ 382 383 void *pad; /* array of DMA pad buffers */ 384 dma_addr_t pad_dma; 385 386 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ 387 388 u8 ctl; /* cache of ATA control register */ 389 u8 last_ctl; /* Cache last written value */ 390 unsigned int pio_mask; 391 unsigned int mwdma_mask; 392 unsigned int udma_mask; 393 unsigned int cbl; /* cable type; ATA_CBL_xxx */ 394 395 struct ata_device device[ATA_MAX_DEVICES]; 396 397 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; 398 unsigned long qactive; 399 unsigned int active_tag; 400 401 struct ata_host_stats stats; 402 struct ata_host_set *host_set; 403 404 struct work_struct port_task; 405 406 unsigned int hsm_task_state; 407 unsigned long pio_task_timeout; 408 409 u32 msg_enable; 410 struct list_head eh_done_q; 411 412 void *private_data; 413}; 414 415struct ata_port_operations { 416 void (*port_disable) (struct ata_port *); 417 418 void (*dev_config) (struct ata_port *, struct ata_device *); 419 420 void (*set_piomode) (struct ata_port *, struct ata_device *); 421 void (*set_dmamode) (struct ata_port *, struct ata_device *); 422 423 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); 424 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); 425 426 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); 427 u8 (*check_status)(struct ata_port *ap); 428 u8 (*check_altstatus)(struct ata_port *ap); 429 void (*dev_select)(struct ata_port *ap, unsigned int device); 430 431 void (*phy_reset) (struct ata_port *ap); /* obsolete */ 432 int (*probe_reset) (struct ata_port *ap, unsigned int *classes); 433 434 void (*post_set_mode) (struct ata_port *ap); 435 436 int (*check_atapi_dma) (struct ata_queued_cmd *qc); 437 438 void (*bmdma_setup) (struct ata_queued_cmd *qc); 439 void (*bmdma_start) (struct ata_queued_cmd *qc); 440 441 void (*qc_prep) (struct ata_queued_cmd *qc); 442 unsigned int (*qc_issue) (struct ata_queued_cmd *qc); 443 444 void (*eng_timeout) (struct ata_port *ap); 445 446 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *); 447 void (*irq_clear) (struct ata_port *); 448 449 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg); 450 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg, 451 u32 val); 452 453 int (*port_start) (struct ata_port *ap); 454 void (*port_stop) (struct ata_port *ap); 455 456 void (*host_stop) (struct ata_host_set *host_set); 457 458 void (*bmdma_stop) (struct ata_queued_cmd *qc); 459 u8 (*bmdma_status) (struct ata_port *ap); 460}; 461 462struct ata_port_info { 463 struct scsi_host_template *sht; 464 unsigned long host_flags; 465 unsigned long pio_mask; 466 unsigned long mwdma_mask; 467 unsigned long udma_mask; 468 const struct ata_port_operations *port_ops; 469 void *private_data; 470}; 471 472struct ata_timing { 473 unsigned short mode; /* ATA mode */ 474 unsigned short setup; /* t1 */ 475 unsigned short act8b; /* t2 for 8-bit I/O */ 476 unsigned short rec8b; /* t2i for 8-bit I/O */ 477 unsigned short cyc8b; /* t0 for 8-bit I/O */ 478 unsigned short active; /* t2 or tD */ 479 unsigned short recover; /* t2i or tK */ 480 unsigned short cycle; /* t0 */ 481 unsigned short udma; /* t2CYCTYP/2 */ 482}; 483 484#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin) 485 486extern void ata_port_probe(struct ata_port *); 487extern void __sata_phy_reset(struct ata_port *ap); 488extern void sata_phy_reset(struct ata_port *ap); 489extern void ata_bus_reset(struct ata_port *ap); 490extern int ata_drive_probe_reset(struct ata_port *ap, 491 ata_probeinit_fn_t probeinit, 492 ata_reset_fn_t softreset, ata_reset_fn_t hardreset, 493 ata_postreset_fn_t postreset, unsigned int *classes); 494extern void ata_std_probeinit(struct ata_port *ap); 495extern int ata_std_softreset(struct ata_port *ap, int verbose, 496 unsigned int *classes); 497extern int sata_std_hardreset(struct ata_port *ap, int verbose, 498 unsigned int *class); 499extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes); 500extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev, 501 int post_reset); 502extern void ata_port_disable(struct ata_port *); 503extern void ata_std_ports(struct ata_ioports *ioaddr); 504#ifdef CONFIG_PCI 505extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, 506 unsigned int n_ports); 507extern void ata_pci_remove_one (struct pci_dev *pdev); 508extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state); 509extern int ata_pci_device_resume(struct pci_dev *pdev); 510extern int ata_pci_clear_simplex(struct pci_dev *pdev); 511#endif /* CONFIG_PCI */ 512extern int ata_device_add(const struct ata_probe_ent *ent); 513extern void ata_host_set_remove(struct ata_host_set *host_set); 514extern int ata_scsi_detect(struct scsi_host_template *sht); 515extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 516extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); 517extern int ata_scsi_error(struct Scsi_Host *host); 518extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); 519extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); 520extern int ata_scsi_release(struct Scsi_Host *host); 521extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); 522extern int ata_scsi_device_resume(struct scsi_device *); 523extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state); 524extern int ata_device_resume(struct ata_port *, struct ata_device *); 525extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state); 526extern int ata_ratelimit(void); 527extern unsigned int ata_busy_sleep(struct ata_port *ap, 528 unsigned long timeout_pat, 529 unsigned long timeout); 530extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), 531 void *data, unsigned long delay); 532 533/* 534 * Default driver ops implementations 535 */ 536extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 537extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); 538extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp); 539extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); 540extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device); 541extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); 542extern u8 ata_check_status(struct ata_port *ap); 543extern u8 ata_altstatus(struct ata_port *ap); 544extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); 545extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes); 546extern int ata_port_start (struct ata_port *ap); 547extern void ata_port_stop (struct ata_port *ap); 548extern void ata_host_stop (struct ata_host_set *host_set); 549extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs); 550extern void ata_qc_prep(struct ata_queued_cmd *qc); 551extern void ata_noop_qc_prep(struct ata_queued_cmd *qc); 552extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); 553extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, 554 unsigned int buflen); 555extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 556 unsigned int n_elem); 557extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); 558extern void ata_id_string(const u16 *id, unsigned char *s, 559 unsigned int ofs, unsigned int len); 560extern void ata_id_c_string(const u16 *id, unsigned char *s, 561 unsigned int ofs, unsigned int len); 562extern void ata_bmdma_setup (struct ata_queued_cmd *qc); 563extern void ata_bmdma_start (struct ata_queued_cmd *qc); 564extern void ata_bmdma_stop(struct ata_queued_cmd *qc); 565extern u8 ata_bmdma_status(struct ata_port *ap); 566extern void ata_bmdma_irq_clear(struct ata_port *ap); 567extern void __ata_qc_complete(struct ata_queued_cmd *qc); 568extern void ata_eng_timeout(struct ata_port *ap); 569extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev, 570 struct scsi_cmnd *cmd, 571 void (*done)(struct scsi_cmnd *)); 572extern int ata_std_bios_param(struct scsi_device *sdev, 573 struct block_device *bdev, 574 sector_t capacity, int geom[]); 575extern int ata_scsi_slave_config(struct scsi_device *sdev); 576 577/* 578 * Timing helpers 579 */ 580 581extern unsigned int ata_pio_need_iordy(const struct ata_device *); 582extern int ata_timing_compute(struct ata_device *, unsigned short, 583 struct ata_timing *, int, int); 584extern void ata_timing_merge(const struct ata_timing *, 585 const struct ata_timing *, struct ata_timing *, 586 unsigned int); 587 588enum { 589 ATA_TIMING_SETUP = (1 << 0), 590 ATA_TIMING_ACT8B = (1 << 1), 591 ATA_TIMING_REC8B = (1 << 2), 592 ATA_TIMING_CYC8B = (1 << 3), 593 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | 594 ATA_TIMING_CYC8B, 595 ATA_TIMING_ACTIVE = (1 << 4), 596 ATA_TIMING_RECOVER = (1 << 5), 597 ATA_TIMING_CYCLE = (1 << 6), 598 ATA_TIMING_UDMA = (1 << 7), 599 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | 600 ATA_TIMING_REC8B | ATA_TIMING_CYC8B | 601 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | 602 ATA_TIMING_CYCLE | ATA_TIMING_UDMA, 603}; 604 605 606#ifdef CONFIG_PCI 607struct pci_bits { 608 unsigned int reg; /* PCI config register to read */ 609 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ 610 unsigned long mask; 611 unsigned long val; 612}; 613 614extern void ata_pci_host_stop (struct ata_host_set *host_set); 615extern struct ata_probe_ent * 616ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); 617extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); 618extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long); 619#endif /* CONFIG_PCI */ 620 621 622static inline int 623ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc) 624{ 625 if (sg == &qc->pad_sgent) 626 return 1; 627 if (qc->pad_len) 628 return 0; 629 if (((sg - qc->__sg) + 1) == qc->n_elem) 630 return 1; 631 return 0; 632} 633 634static inline struct scatterlist * 635ata_qc_first_sg(struct ata_queued_cmd *qc) 636{ 637 if (qc->n_elem) 638 return qc->__sg; 639 if (qc->pad_len) 640 return &qc->pad_sgent; 641 return NULL; 642} 643 644static inline struct scatterlist * 645ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc) 646{ 647 if (sg == &qc->pad_sgent) 648 return NULL; 649 if (++sg - qc->__sg < qc->n_elem) 650 return sg; 651 if (qc->pad_len) 652 return &qc->pad_sgent; 653 return NULL; 654} 655 656#define ata_for_each_sg(sg, qc) \ 657 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc)) 658 659static inline unsigned int ata_tag_valid(unsigned int tag) 660{ 661 return (tag < ATA_MAX_QUEUE) ? 1 : 0; 662} 663 664static inline unsigned int ata_class_present(unsigned int class) 665{ 666 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI; 667} 668 669static inline unsigned int ata_dev_present(const struct ata_device *dev) 670{ 671 return ata_class_present(dev->class); 672} 673 674static inline u8 ata_chk_status(struct ata_port *ap) 675{ 676 return ap->ops->check_status(ap); 677} 678 679 680/** 681 * ata_pause - Flush writes and pause 400 nanoseconds. 682 * @ap: Port to wait for. 683 * 684 * LOCKING: 685 * Inherited from caller. 686 */ 687 688static inline void ata_pause(struct ata_port *ap) 689{ 690 ata_altstatus(ap); 691 ndelay(400); 692} 693 694 695/** 696 * ata_busy_wait - Wait for a port status register 697 * @ap: Port to wait for. 698 * 699 * Waits up to max*10 microseconds for the selected bits in the port's 700 * status register to be cleared. 701 * Returns final value of status register. 702 * 703 * LOCKING: 704 * Inherited from caller. 705 */ 706 707static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, 708 unsigned int max) 709{ 710 u8 status; 711 712 do { 713 udelay(10); 714 status = ata_chk_status(ap); 715 max--; 716 } while ((status & bits) && (max > 0)); 717 718 return status; 719} 720 721 722/** 723 * ata_wait_idle - Wait for a port to be idle. 724 * @ap: Port to wait for. 725 * 726 * Waits up to 10ms for port's BUSY and DRQ signals to clear. 727 * Returns final value of status register. 728 * 729 * LOCKING: 730 * Inherited from caller. 731 */ 732 733static inline u8 ata_wait_idle(struct ata_port *ap) 734{ 735 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); 736 737 if (status & (ATA_BUSY | ATA_DRQ)) { 738 unsigned long l = ap->ioaddr.status_addr; 739 if (ata_msg_warn(ap)) 740 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n", 741 status, l); 742 } 743 744 return status; 745} 746 747static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) 748{ 749 qc->tf.ctl |= ATA_NIEN; 750} 751 752static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap, 753 unsigned int tag) 754{ 755 if (likely(ata_tag_valid(tag))) 756 return &ap->qcmd[tag]; 757 return NULL; 758} 759 760static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device) 761{ 762 memset(tf, 0, sizeof(*tf)); 763 764 tf->ctl = ap->ctl; 765 if (device == 0) 766 tf->device = ATA_DEVICE_OBS; 767 else 768 tf->device = ATA_DEVICE_OBS | ATA_DEV1; 769} 770 771static inline void ata_qc_reinit(struct ata_queued_cmd *qc) 772{ 773 qc->__sg = NULL; 774 qc->flags = 0; 775 qc->cursect = qc->cursg = qc->cursg_ofs = 0; 776 qc->nsect = 0; 777 qc->nbytes = qc->curbytes = 0; 778 qc->err_mask = 0; 779 780 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno); 781} 782 783/** 784 * ata_qc_complete - Complete an active ATA command 785 * @qc: Command to complete 786 * @err_mask: ATA Status register contents 787 * 788 * Indicate to the mid and upper layers that an ATA 789 * command has completed, with either an ok or not-ok status. 790 * 791 * LOCKING: 792 * spin_lock_irqsave(host_set lock) 793 */ 794static inline void ata_qc_complete(struct ata_queued_cmd *qc) 795{ 796 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED)) 797 return; 798 799 __ata_qc_complete(qc); 800} 801 802/** 803 * ata_irq_on - Enable interrupts on a port. 804 * @ap: Port on which interrupts are enabled. 805 * 806 * Enable interrupts on a legacy IDE device using MMIO or PIO, 807 * wait for idle, clear any pending interrupts. 808 * 809 * LOCKING: 810 * Inherited from caller. 811 */ 812 813static inline u8 ata_irq_on(struct ata_port *ap) 814{ 815 struct ata_ioports *ioaddr = &ap->ioaddr; 816 u8 tmp; 817 818 ap->ctl &= ~ATA_NIEN; 819 ap->last_ctl = ap->ctl; 820 821 if (ap->flags & ATA_FLAG_MMIO) 822 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 823 else 824 outb(ap->ctl, ioaddr->ctl_addr); 825 tmp = ata_wait_idle(ap); 826 827 ap->ops->irq_clear(ap); 828 829 return tmp; 830} 831 832 833/** 834 * ata_irq_ack - Acknowledge a device interrupt. 835 * @ap: Port on which interrupts are enabled. 836 * 837 * Wait up to 10 ms for legacy IDE device to become idle (BUSY 838 * or BUSY+DRQ clear). Obtain dma status and port status from 839 * device. Clear the interrupt. Return port status. 840 * 841 * LOCKING: 842 */ 843 844static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq) 845{ 846 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY; 847 u8 host_stat, post_stat, status; 848 849 status = ata_busy_wait(ap, bits, 1000); 850 if (status & bits) 851 if (ata_msg_err(ap)) 852 printk(KERN_ERR "abnormal status 0x%X\n", status); 853 854 /* get controller status; clear intr, err bits */ 855 if (ap->flags & ATA_FLAG_MMIO) { 856 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; 857 host_stat = readb(mmio + ATA_DMA_STATUS); 858 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 859 mmio + ATA_DMA_STATUS); 860 861 post_stat = readb(mmio + ATA_DMA_STATUS); 862 } else { 863 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 864 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 865 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 866 867 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 868 } 869 870 if (ata_msg_intr(ap)) 871 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n", 872 __FUNCTION__, 873 host_stat, post_stat, status); 874 875 return status; 876} 877 878static inline u32 scr_read(struct ata_port *ap, unsigned int reg) 879{ 880 return ap->ops->scr_read(ap, reg); 881} 882 883static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val) 884{ 885 ap->ops->scr_write(ap, reg, val); 886} 887 888static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, 889 u32 val) 890{ 891 ap->ops->scr_write(ap, reg, val); 892 (void) ap->ops->scr_read(ap, reg); 893} 894 895static inline unsigned int sata_dev_present(struct ata_port *ap) 896{ 897 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; 898} 899 900static inline int ata_try_flush_cache(const struct ata_device *dev) 901{ 902 return ata_id_wcache_enabled(dev->id) || 903 ata_id_has_flush(dev->id) || 904 ata_id_has_flush_ext(dev->id); 905} 906 907static inline unsigned int ac_err_mask(u8 status) 908{ 909 if (status & ATA_BUSY) 910 return AC_ERR_HSM; 911 if (status & (ATA_ERR | ATA_DF)) 912 return AC_ERR_DEV; 913 return 0; 914} 915 916static inline unsigned int __ac_err_mask(u8 status) 917{ 918 unsigned int mask = ac_err_mask(status); 919 if (mask == 0) 920 return AC_ERR_OTHER; 921 return mask; 922} 923 924static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev) 925{ 926 ap->pad_dma = 0; 927 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, 928 &ap->pad_dma, GFP_KERNEL); 929 return (ap->pad == NULL) ? -ENOMEM : 0; 930} 931 932static inline void ata_pad_free(struct ata_port *ap, struct device *dev) 933{ 934 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma); 935} 936 937#endif /* __LINUX_LIBATA_H__ */ 938