libata.h revision 0e949ff304a7ca07db38c17fbbf3ead1085d7bbf
1/* 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved. 3 * Copyright 2003-2005 Jeff Garzik 4 * 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2, or (at your option) 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; see the file COPYING. If not, write to 18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 19 * 20 * 21 * libata documentation is available via 'make {ps|pdf}docs', 22 * as Documentation/DocBook/libata.* 23 * 24 */ 25 26#ifndef __LINUX_LIBATA_H__ 27#define __LINUX_LIBATA_H__ 28 29#include <linux/delay.h> 30#include <linux/interrupt.h> 31#include <linux/pci.h> 32#include <linux/dma-mapping.h> 33#include <asm/io.h> 34#include <linux/ata.h> 35#include <linux/workqueue.h> 36 37/* 38 * compile-time options: to be removed as soon as all the drivers are 39 * converted to the new debugging mechanism 40 */ 41#undef ATA_DEBUG /* debugging output */ 42#undef ATA_VERBOSE_DEBUG /* yet more debugging output */ 43#undef ATA_IRQ_TRAP /* define to ack screaming irqs */ 44#undef ATA_NDEBUG /* define to disable quick runtime checks */ 45#undef ATA_ENABLE_PATA /* define to enable PATA support in some 46 * low-level drivers */ 47#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */ 48 49 50/* note: prints function name for you */ 51#ifdef ATA_DEBUG 52#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 53#ifdef ATA_VERBOSE_DEBUG 54#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 55#else 56#define VPRINTK(fmt, args...) 57#endif /* ATA_VERBOSE_DEBUG */ 58#else 59#define DPRINTK(fmt, args...) 60#define VPRINTK(fmt, args...) 61#endif /* ATA_DEBUG */ 62 63#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 64 65/* NEW: debug levels */ 66#define HAVE_LIBATA_MSG 1 67 68enum { 69 ATA_MSG_DRV = 0x0001, 70 ATA_MSG_INFO = 0x0002, 71 ATA_MSG_PROBE = 0x0004, 72 ATA_MSG_WARN = 0x0008, 73 ATA_MSG_MALLOC = 0x0010, 74 ATA_MSG_CTL = 0x0020, 75 ATA_MSG_INTR = 0x0040, 76 ATA_MSG_ERR = 0x0080, 77}; 78 79#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV) 80#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO) 81#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE) 82#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN) 83#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC) 84#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL) 85#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR) 86#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR) 87 88static inline u32 ata_msg_init(int dval, int default_msg_enable_bits) 89{ 90 if (dval < 0 || dval >= (sizeof(u32) * 8)) 91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */ 92 if (!dval) 93 return 0; 94 return (1 << dval) - 1; 95} 96 97/* defines only for the constants which don't work well as enums */ 98#define ATA_TAG_POISON 0xfafbfcfdU 99 100/* move to PCI layer? */ 101static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) 102{ 103 return &pdev->dev; 104} 105 106enum { 107 /* various global constants */ 108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2, 109 ATA_MAX_PORTS = 8, 110 ATA_DEF_QUEUE = 1, 111 ATA_MAX_QUEUE = 1, 112 ATA_MAX_SECTORS = 200, /* FIXME */ 113 ATA_MAX_BUS = 2, 114 ATA_DEF_BUSY_WAIT = 10000, 115 ATA_SHORT_PAUSE = (HZ >> 6) + 1, 116 117 ATA_SHT_EMULATED = 1, 118 ATA_SHT_CMD_PER_LUN = 1, 119 ATA_SHT_THIS_ID = -1, 120 ATA_SHT_USE_CLUSTERING = 1, 121 122 /* struct ata_device stuff */ 123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */ 124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */ 125 ATA_DFLAG_LOCK_SECTORS = (1 << 2), /* don't adjust max_sectors */ 126 ATA_DFLAG_LBA = (1 << 3), /* device supports LBA */ 127 128 ATA_DEV_UNKNOWN = 0, /* unknown device */ 129 ATA_DEV_ATA = 1, /* ATA device */ 130 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */ 131 ATA_DEV_ATAPI = 3, /* ATAPI device */ 132 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */ 133 ATA_DEV_NONE = 5, /* no device */ 134 135 /* struct ata_port flags */ 136 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */ 137 /* (doesn't imply presence) */ 138 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */ 139 ATA_FLAG_SATA = (1 << 3), 140 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */ 141 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */ 142 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */ 143 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */ 144 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ 145 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once 146 * proper HSM is in place. */ 147 ATA_FLAG_DEBUGMSG = (1 << 10), 148 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */ 149 150 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */ 151 152 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */ 153 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */ 154 155 ATA_FLAG_FLUSH_PIO_TASK = (1 << 15), /* Flush PIO task */ 156 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */ 157 158 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ 159 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ 160 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */ 161 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, 162 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */ 163 164 /* various lengths of time */ 165 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */ 166 ATA_TMOUT_PIO = 30 * HZ, 167 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 168 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 169 ATA_TMOUT_CDB = 30 * HZ, 170 ATA_TMOUT_CDB_QUICK = 5 * HZ, 171 ATA_TMOUT_INTERNAL = 30 * HZ, 172 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, 173 174 /* ATA bus states */ 175 BUS_UNKNOWN = 0, 176 BUS_DMA = 1, 177 BUS_IDLE = 2, 178 BUS_NOINTR = 3, 179 BUS_NODATA = 4, 180 BUS_TIMER = 5, 181 BUS_PIO = 6, 182 BUS_EDD = 7, 183 BUS_IDENTIFY = 8, 184 BUS_PACKET = 9, 185 186 /* SATA port states */ 187 PORT_UNKNOWN = 0, 188 PORT_ENABLED = 1, 189 PORT_DISABLED = 2, 190 191 /* encoding various smaller bitmaps into a single 192 * unsigned long bitmap 193 */ 194 ATA_SHIFT_UDMA = 0, 195 ATA_SHIFT_MWDMA = 8, 196 ATA_SHIFT_PIO = 11, 197 198 /* size of buffer to pad xfers ending on unaligned boundaries */ 199 ATA_DMA_PAD_SZ = 4, 200 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, 201 202 /* Masks for port functions */ 203 ATA_PORT_PRIMARY = (1 << 0), 204 ATA_PORT_SECONDARY = (1 << 1), 205}; 206 207enum hsm_task_states { 208 HSM_ST_UNKNOWN, 209 HSM_ST_IDLE, 210 HSM_ST_POLL, 211 HSM_ST_TMOUT, 212 HSM_ST, 213 HSM_ST_LAST, 214 HSM_ST_LAST_POLL, 215 HSM_ST_ERR, 216}; 217 218enum ata_completion_errors { 219 AC_ERR_DEV = (1 << 0), /* device reported error */ 220 AC_ERR_HSM = (1 << 1), /* host state machine violation */ 221 AC_ERR_TIMEOUT = (1 << 2), /* timeout */ 222 AC_ERR_MEDIA = (1 << 3), /* media error */ 223 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */ 224 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */ 225 AC_ERR_SYSTEM = (1 << 6), /* system error */ 226 AC_ERR_INVALID = (1 << 7), /* invalid argument */ 227 AC_ERR_OTHER = (1 << 8), /* unknown */ 228}; 229 230/* forward declarations */ 231struct scsi_device; 232struct ata_port_operations; 233struct ata_port; 234struct ata_queued_cmd; 235 236/* typedefs */ 237typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); 238typedef void (*ata_probeinit_fn_t)(struct ata_port *); 239typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *); 240typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *); 241 242struct ata_ioports { 243 unsigned long cmd_addr; 244 unsigned long data_addr; 245 unsigned long error_addr; 246 unsigned long feature_addr; 247 unsigned long nsect_addr; 248 unsigned long lbal_addr; 249 unsigned long lbam_addr; 250 unsigned long lbah_addr; 251 unsigned long device_addr; 252 unsigned long status_addr; 253 unsigned long command_addr; 254 unsigned long altstatus_addr; 255 unsigned long ctl_addr; 256 unsigned long bmdma_addr; 257 unsigned long scr_addr; 258}; 259 260struct ata_probe_ent { 261 struct list_head node; 262 struct device *dev; 263 const struct ata_port_operations *port_ops; 264 struct scsi_host_template *sht; 265 struct ata_ioports port[ATA_MAX_PORTS]; 266 unsigned int n_ports; 267 unsigned int hard_port_no; 268 unsigned int pio_mask; 269 unsigned int mwdma_mask; 270 unsigned int udma_mask; 271 unsigned int legacy_mode; 272 unsigned long irq; 273 unsigned int irq_flags; 274 unsigned long host_flags; 275 void __iomem *mmio_base; 276 void *private_data; 277}; 278 279struct ata_host_set { 280 spinlock_t lock; 281 struct device *dev; 282 unsigned long irq; 283 void __iomem *mmio_base; 284 unsigned int n_ports; 285 void *private_data; 286 const struct ata_port_operations *ops; 287 struct ata_port * ports[0]; 288}; 289 290struct ata_queued_cmd { 291 struct ata_port *ap; 292 struct ata_device *dev; 293 294 struct scsi_cmnd *scsicmd; 295 void (*scsidone)(struct scsi_cmnd *); 296 297 struct ata_taskfile tf; 298 u8 cdb[ATAPI_CDB_LEN]; 299 300 unsigned long flags; /* ATA_QCFLAG_xxx */ 301 unsigned int tag; 302 unsigned int n_elem; 303 unsigned int orig_n_elem; 304 305 int dma_dir; 306 307 unsigned int pad_len; 308 309 unsigned int nsect; 310 unsigned int cursect; 311 312 unsigned int nbytes; 313 unsigned int curbytes; 314 315 unsigned int cursg; 316 unsigned int cursg_ofs; 317 318 struct scatterlist sgent; 319 struct scatterlist pad_sgent; 320 void *buf_virt; 321 322 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ 323 struct scatterlist *__sg; 324 325 unsigned int err_mask; 326 327 ata_qc_cb_t complete_fn; 328 329 void *private_data; 330}; 331 332struct ata_host_stats { 333 unsigned long unhandled_irq; 334 unsigned long idle_irq; 335 unsigned long rw_reqbuf; 336}; 337 338struct ata_device { 339 u64 n_sectors; /* size of device, if ATA */ 340 unsigned long flags; /* ATA_DFLAG_xxx */ 341 unsigned int class; /* ATA_DEV_xxx */ 342 unsigned int devno; /* 0 or 1 */ 343 u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */ 344 u8 pio_mode; 345 u8 dma_mode; 346 u8 xfer_mode; 347 unsigned int xfer_shift; /* ATA_SHIFT_xxx */ 348 349 unsigned int multi_count; /* sectors count for 350 READ/WRITE MULTIPLE */ 351 352 /* for CHS addressing */ 353 u16 cylinders; /* Number of cylinders */ 354 u16 heads; /* Number of heads */ 355 u16 sectors; /* Number of sectors per track */ 356}; 357 358struct ata_port { 359 struct Scsi_Host *host; /* our co-allocated scsi host */ 360 const struct ata_port_operations *ops; 361 unsigned long flags; /* ATA_FLAG_xxx */ 362 unsigned int id; /* unique id req'd by scsi midlyr */ 363 unsigned int port_no; /* unique port #; from zero */ 364 unsigned int hard_port_no; /* hardware port #; from zero */ 365 366 struct ata_prd *prd; /* our SG list */ 367 dma_addr_t prd_dma; /* and its DMA mapping */ 368 369 void *pad; /* array of DMA pad buffers */ 370 dma_addr_t pad_dma; 371 372 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ 373 374 u8 ctl; /* cache of ATA control register */ 375 u8 last_ctl; /* Cache last written value */ 376 unsigned int pio_mask; 377 unsigned int mwdma_mask; 378 unsigned int udma_mask; 379 unsigned int cbl; /* cable type; ATA_CBL_xxx */ 380 unsigned int cdb_len; 381 382 struct ata_device device[ATA_MAX_DEVICES]; 383 384 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; 385 unsigned long qactive; 386 unsigned int active_tag; 387 388 struct ata_host_stats stats; 389 struct ata_host_set *host_set; 390 391 struct work_struct packet_task; 392 393 struct work_struct pio_task; 394 unsigned int hsm_task_state; 395 unsigned long pio_task_timeout; 396 397 u32 msg_enable; 398 struct list_head eh_done_q; 399 400 void *private_data; 401}; 402 403struct ata_port_operations { 404 void (*port_disable) (struct ata_port *); 405 406 void (*dev_config) (struct ata_port *, struct ata_device *); 407 408 void (*set_piomode) (struct ata_port *, struct ata_device *); 409 void (*set_dmamode) (struct ata_port *, struct ata_device *); 410 411 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); 412 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); 413 414 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); 415 u8 (*check_status)(struct ata_port *ap); 416 u8 (*check_altstatus)(struct ata_port *ap); 417 void (*dev_select)(struct ata_port *ap, unsigned int device); 418 419 void (*phy_reset) (struct ata_port *ap); /* obsolete */ 420 int (*probe_reset) (struct ata_port *ap, unsigned int *classes); 421 422 void (*post_set_mode) (struct ata_port *ap); 423 424 int (*check_atapi_dma) (struct ata_queued_cmd *qc); 425 426 void (*bmdma_setup) (struct ata_queued_cmd *qc); 427 void (*bmdma_start) (struct ata_queued_cmd *qc); 428 429 void (*qc_prep) (struct ata_queued_cmd *qc); 430 unsigned int (*qc_issue) (struct ata_queued_cmd *qc); 431 432 void (*eng_timeout) (struct ata_port *ap); 433 434 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *); 435 void (*irq_clear) (struct ata_port *); 436 437 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg); 438 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg, 439 u32 val); 440 441 int (*port_start) (struct ata_port *ap); 442 void (*port_stop) (struct ata_port *ap); 443 444 void (*host_stop) (struct ata_host_set *host_set); 445 446 void (*bmdma_stop) (struct ata_queued_cmd *qc); 447 u8 (*bmdma_status) (struct ata_port *ap); 448}; 449 450struct ata_port_info { 451 struct scsi_host_template *sht; 452 unsigned long host_flags; 453 unsigned long pio_mask; 454 unsigned long mwdma_mask; 455 unsigned long udma_mask; 456 const struct ata_port_operations *port_ops; 457 void *private_data; 458}; 459 460struct ata_timing { 461 unsigned short mode; /* ATA mode */ 462 unsigned short setup; /* t1 */ 463 unsigned short act8b; /* t2 for 8-bit I/O */ 464 unsigned short rec8b; /* t2i for 8-bit I/O */ 465 unsigned short cyc8b; /* t0 for 8-bit I/O */ 466 unsigned short active; /* t2 or tD */ 467 unsigned short recover; /* t2i or tK */ 468 unsigned short cycle; /* t0 */ 469 unsigned short udma; /* t2CYCTYP/2 */ 470}; 471 472#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin) 473 474extern void ata_port_probe(struct ata_port *); 475extern void __sata_phy_reset(struct ata_port *ap); 476extern void sata_phy_reset(struct ata_port *ap); 477extern void ata_bus_reset(struct ata_port *ap); 478extern int ata_drive_probe_reset(struct ata_port *ap, 479 ata_probeinit_fn_t probeinit, 480 ata_reset_fn_t softreset, ata_reset_fn_t hardreset, 481 ata_postreset_fn_t postreset, unsigned int *classes); 482extern void ata_std_probeinit(struct ata_port *ap); 483extern int ata_std_softreset(struct ata_port *ap, int verbose, 484 unsigned int *classes); 485extern int sata_std_hardreset(struct ata_port *ap, int verbose, 486 unsigned int *class); 487extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes); 488extern void ata_port_disable(struct ata_port *); 489extern void ata_std_ports(struct ata_ioports *ioaddr); 490#ifdef CONFIG_PCI 491extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, 492 unsigned int n_ports); 493extern void ata_pci_remove_one (struct pci_dev *pdev); 494extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state); 495extern int ata_pci_device_resume(struct pci_dev *pdev); 496#endif /* CONFIG_PCI */ 497extern int ata_device_add(const struct ata_probe_ent *ent); 498extern void ata_host_set_remove(struct ata_host_set *host_set); 499extern int ata_scsi_detect(struct scsi_host_template *sht); 500extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 501extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); 502extern enum scsi_eh_timer_return ata_scsi_timed_out(struct scsi_cmnd *cmd); 503extern int ata_scsi_error(struct Scsi_Host *host); 504extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); 505extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); 506extern int ata_scsi_release(struct Scsi_Host *host); 507extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); 508extern int ata_scsi_device_resume(struct scsi_device *); 509extern int ata_scsi_device_suspend(struct scsi_device *); 510extern int ata_device_resume(struct ata_port *, struct ata_device *); 511extern int ata_device_suspend(struct ata_port *, struct ata_device *); 512extern int ata_ratelimit(void); 513extern unsigned int ata_busy_sleep(struct ata_port *ap, 514 unsigned long timeout_pat, 515 unsigned long timeout); 516 517/* 518 * Default driver ops implementations 519 */ 520extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 521extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); 522extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp); 523extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); 524extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device); 525extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); 526extern u8 ata_check_status(struct ata_port *ap); 527extern u8 ata_altstatus(struct ata_port *ap); 528extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); 529extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes); 530extern int ata_port_start (struct ata_port *ap); 531extern void ata_port_stop (struct ata_port *ap); 532extern void ata_host_stop (struct ata_host_set *host_set); 533extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs); 534extern void ata_qc_prep(struct ata_queued_cmd *qc); 535extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); 536extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, 537 unsigned int buflen); 538extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 539 unsigned int n_elem); 540extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); 541extern void ata_dev_id_string(const u16 *id, unsigned char *s, 542 unsigned int ofs, unsigned int len); 543extern void ata_dev_id_c_string(const u16 *id, unsigned char *s, 544 unsigned int ofs, unsigned int len); 545extern void ata_dev_config(struct ata_port *ap, unsigned int i); 546extern void ata_bmdma_setup (struct ata_queued_cmd *qc); 547extern void ata_bmdma_start (struct ata_queued_cmd *qc); 548extern void ata_bmdma_stop(struct ata_queued_cmd *qc); 549extern u8 ata_bmdma_status(struct ata_port *ap); 550extern void ata_bmdma_irq_clear(struct ata_port *ap); 551extern void __ata_qc_complete(struct ata_queued_cmd *qc); 552extern void ata_eng_timeout(struct ata_port *ap); 553extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev, 554 struct scsi_cmnd *cmd, 555 void (*done)(struct scsi_cmnd *)); 556extern int ata_std_bios_param(struct scsi_device *sdev, 557 struct block_device *bdev, 558 sector_t capacity, int geom[]); 559extern int ata_scsi_slave_config(struct scsi_device *sdev); 560 561/* 562 * Timing helpers 563 */ 564 565extern unsigned int ata_pio_need_iordy(const struct ata_device *); 566extern int ata_timing_compute(struct ata_device *, unsigned short, 567 struct ata_timing *, int, int); 568extern void ata_timing_merge(const struct ata_timing *, 569 const struct ata_timing *, struct ata_timing *, 570 unsigned int); 571 572enum { 573 ATA_TIMING_SETUP = (1 << 0), 574 ATA_TIMING_ACT8B = (1 << 1), 575 ATA_TIMING_REC8B = (1 << 2), 576 ATA_TIMING_CYC8B = (1 << 3), 577 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | 578 ATA_TIMING_CYC8B, 579 ATA_TIMING_ACTIVE = (1 << 4), 580 ATA_TIMING_RECOVER = (1 << 5), 581 ATA_TIMING_CYCLE = (1 << 6), 582 ATA_TIMING_UDMA = (1 << 7), 583 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | 584 ATA_TIMING_REC8B | ATA_TIMING_CYC8B | 585 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | 586 ATA_TIMING_CYCLE | ATA_TIMING_UDMA, 587}; 588 589 590#ifdef CONFIG_PCI 591struct pci_bits { 592 unsigned int reg; /* PCI config register to read */ 593 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ 594 unsigned long mask; 595 unsigned long val; 596}; 597 598extern void ata_pci_host_stop (struct ata_host_set *host_set); 599extern struct ata_probe_ent * 600ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); 601extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); 602 603#endif /* CONFIG_PCI */ 604 605 606static inline int 607ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc) 608{ 609 if (sg == &qc->pad_sgent) 610 return 1; 611 if (qc->pad_len) 612 return 0; 613 if (((sg - qc->__sg) + 1) == qc->n_elem) 614 return 1; 615 return 0; 616} 617 618static inline struct scatterlist * 619ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc) 620{ 621 if (sg == &qc->pad_sgent) 622 return NULL; 623 if (++sg - qc->__sg < qc->n_elem) 624 return sg; 625 return qc->pad_len ? &qc->pad_sgent : NULL; 626} 627 628#define ata_for_each_sg(sg, qc) \ 629 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc)) 630 631static inline unsigned int ata_tag_valid(unsigned int tag) 632{ 633 return (tag < ATA_MAX_QUEUE) ? 1 : 0; 634} 635 636static inline unsigned int ata_dev_present(const struct ata_device *dev) 637{ 638 return ((dev->class == ATA_DEV_ATA) || 639 (dev->class == ATA_DEV_ATAPI)); 640} 641 642static inline u8 ata_chk_status(struct ata_port *ap) 643{ 644 return ap->ops->check_status(ap); 645} 646 647 648/** 649 * ata_pause - Flush writes and pause 400 nanoseconds. 650 * @ap: Port to wait for. 651 * 652 * LOCKING: 653 * Inherited from caller. 654 */ 655 656static inline void ata_pause(struct ata_port *ap) 657{ 658 ata_altstatus(ap); 659 ndelay(400); 660} 661 662 663/** 664 * ata_busy_wait - Wait for a port status register 665 * @ap: Port to wait for. 666 * 667 * Waits up to max*10 microseconds for the selected bits in the port's 668 * status register to be cleared. 669 * Returns final value of status register. 670 * 671 * LOCKING: 672 * Inherited from caller. 673 */ 674 675static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, 676 unsigned int max) 677{ 678 u8 status; 679 680 do { 681 udelay(10); 682 status = ata_chk_status(ap); 683 max--; 684 } while ((status & bits) && (max > 0)); 685 686 return status; 687} 688 689 690/** 691 * ata_wait_idle - Wait for a port to be idle. 692 * @ap: Port to wait for. 693 * 694 * Waits up to 10ms for port's BUSY and DRQ signals to clear. 695 * Returns final value of status register. 696 * 697 * LOCKING: 698 * Inherited from caller. 699 */ 700 701static inline u8 ata_wait_idle(struct ata_port *ap) 702{ 703 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); 704 705 if (status & (ATA_BUSY | ATA_DRQ)) { 706 unsigned long l = ap->ioaddr.status_addr; 707 if (ata_msg_warn(ap)) 708 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n", 709 status, l); 710 } 711 712 return status; 713} 714 715static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) 716{ 717 qc->tf.ctl |= ATA_NIEN; 718} 719 720static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap, 721 unsigned int tag) 722{ 723 if (likely(ata_tag_valid(tag))) 724 return &ap->qcmd[tag]; 725 return NULL; 726} 727 728static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device) 729{ 730 memset(tf, 0, sizeof(*tf)); 731 732 tf->ctl = ap->ctl; 733 if (device == 0) 734 tf->device = ATA_DEVICE_OBS; 735 else 736 tf->device = ATA_DEVICE_OBS | ATA_DEV1; 737} 738 739static inline void ata_qc_reinit(struct ata_queued_cmd *qc) 740{ 741 qc->__sg = NULL; 742 qc->flags = 0; 743 qc->cursect = qc->cursg = qc->cursg_ofs = 0; 744 qc->nsect = 0; 745 qc->nbytes = qc->curbytes = 0; 746 qc->err_mask = 0; 747 748 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno); 749} 750 751/** 752 * ata_qc_complete - Complete an active ATA command 753 * @qc: Command to complete 754 * @err_mask: ATA Status register contents 755 * 756 * Indicate to the mid and upper layers that an ATA 757 * command has completed, with either an ok or not-ok status. 758 * 759 * LOCKING: 760 * spin_lock_irqsave(host_set lock) 761 */ 762static inline void ata_qc_complete(struct ata_queued_cmd *qc) 763{ 764 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED)) 765 return; 766 767 __ata_qc_complete(qc); 768} 769 770/** 771 * ata_irq_on - Enable interrupts on a port. 772 * @ap: Port on which interrupts are enabled. 773 * 774 * Enable interrupts on a legacy IDE device using MMIO or PIO, 775 * wait for idle, clear any pending interrupts. 776 * 777 * LOCKING: 778 * Inherited from caller. 779 */ 780 781static inline u8 ata_irq_on(struct ata_port *ap) 782{ 783 struct ata_ioports *ioaddr = &ap->ioaddr; 784 u8 tmp; 785 786 ap->ctl &= ~ATA_NIEN; 787 ap->last_ctl = ap->ctl; 788 789 if (ap->flags & ATA_FLAG_MMIO) 790 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 791 else 792 outb(ap->ctl, ioaddr->ctl_addr); 793 tmp = ata_wait_idle(ap); 794 795 ap->ops->irq_clear(ap); 796 797 return tmp; 798} 799 800 801/** 802 * ata_irq_ack - Acknowledge a device interrupt. 803 * @ap: Port on which interrupts are enabled. 804 * 805 * Wait up to 10 ms for legacy IDE device to become idle (BUSY 806 * or BUSY+DRQ clear). Obtain dma status and port status from 807 * device. Clear the interrupt. Return port status. 808 * 809 * LOCKING: 810 */ 811 812static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq) 813{ 814 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY; 815 u8 host_stat, post_stat, status; 816 817 status = ata_busy_wait(ap, bits, 1000); 818 if (status & bits) 819 if (ata_msg_err(ap)) 820 printk(KERN_ERR "abnormal status 0x%X\n", status); 821 822 /* get controller status; clear intr, err bits */ 823 if (ap->flags & ATA_FLAG_MMIO) { 824 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; 825 host_stat = readb(mmio + ATA_DMA_STATUS); 826 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 827 mmio + ATA_DMA_STATUS); 828 829 post_stat = readb(mmio + ATA_DMA_STATUS); 830 } else { 831 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 832 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 833 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 834 835 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 836 } 837 838 if (ata_msg_intr(ap)) 839 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n", 840 __FUNCTION__, 841 host_stat, post_stat, status); 842 843 return status; 844} 845 846static inline u32 scr_read(struct ata_port *ap, unsigned int reg) 847{ 848 return ap->ops->scr_read(ap, reg); 849} 850 851static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val) 852{ 853 ap->ops->scr_write(ap, reg, val); 854} 855 856static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, 857 u32 val) 858{ 859 ap->ops->scr_write(ap, reg, val); 860 (void) ap->ops->scr_read(ap, reg); 861} 862 863static inline unsigned int sata_dev_present(struct ata_port *ap) 864{ 865 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; 866} 867 868static inline int ata_try_flush_cache(const struct ata_device *dev) 869{ 870 return ata_id_wcache_enabled(dev->id) || 871 ata_id_has_flush(dev->id) || 872 ata_id_has_flush_ext(dev->id); 873} 874 875static inline unsigned int ac_err_mask(u8 status) 876{ 877 if (status & ATA_BUSY) 878 return AC_ERR_HSM; 879 if (status & (ATA_ERR | ATA_DF)) 880 return AC_ERR_DEV; 881 return 0; 882} 883 884static inline unsigned int __ac_err_mask(u8 status) 885{ 886 unsigned int mask = ac_err_mask(status); 887 if (mask == 0) 888 return AC_ERR_OTHER; 889 return mask; 890} 891 892static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev) 893{ 894 ap->pad_dma = 0; 895 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, 896 &ap->pad_dma, GFP_KERNEL); 897 return (ap->pad == NULL) ? -ENOMEM : 0; 898} 899 900static inline void ata_pad_free(struct ata_port *ap, struct device *dev) 901{ 902 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma); 903} 904 905#endif /* __LINUX_LIBATA_H__ */ 906