samsung_fimd.h revision fe6863cc5b8e8b9b0e0b998e6de9be4e441f5b98
1/* include/video/samsung_fimd.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 *      http://armlinux.simtec.co.uk/
6 *      Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C Platform - new-style fimd and framebuffer register definitions
9 *
10 * This is the register set for the fimd and new style framebuffer interface
11 * found from the S3C2443 onwards into the S3C2416, S3C2450, the
12 * S3C64XX series such as the S3C6400 and S3C6410, and EXYNOS series.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
19/* VIDCON0 */
20
21#define VIDCON0					0x00
22#define VIDCON0_INTERLACE			(1 << 29)
23#define VIDCON0_VIDOUT_MASK			(0x7 << 26)
24#define VIDCON0_VIDOUT_SHIFT			26
25#define VIDCON0_VIDOUT_RGB			(0x0 << 26)
26#define VIDCON0_VIDOUT_TV			(0x1 << 26)
27#define VIDCON0_VIDOUT_I80_LDI0			(0x2 << 26)
28#define VIDCON0_VIDOUT_I80_LDI1			(0x3 << 26)
29#define VIDCON0_VIDOUT_WB_RGB			(0x4 << 26)
30#define VIDCON0_VIDOUT_WB_I80_LDI0		(0x6 << 26)
31#define VIDCON0_VIDOUT_WB_I80_LDI1		(0x7 << 26)
32
33#define VIDCON0_L1_DATA_MASK			(0x7 << 23)
34#define VIDCON0_L1_DATA_SHIFT			23
35#define VIDCON0_L1_DATA_16BPP			(0x0 << 23)
36#define VIDCON0_L1_DATA_18BPP16			(0x1 << 23)
37#define VIDCON0_L1_DATA_18BPP9			(0x2 << 23)
38#define VIDCON0_L1_DATA_24BPP			(0x3 << 23)
39#define VIDCON0_L1_DATA_18BPP			(0x4 << 23)
40#define VIDCON0_L1_DATA_16BPP8			(0x5 << 23)
41
42#define VIDCON0_L0_DATA_MASK			(0x7 << 20)
43#define VIDCON0_L0_DATA_SHIFT			20
44#define VIDCON0_L0_DATA_16BPP			(0x0 << 20)
45#define VIDCON0_L0_DATA_18BPP16			(0x1 << 20)
46#define VIDCON0_L0_DATA_18BPP9			(0x2 << 20)
47#define VIDCON0_L0_DATA_24BPP			(0x3 << 20)
48#define VIDCON0_L0_DATA_18BPP			(0x4 << 20)
49#define VIDCON0_L0_DATA_16BPP8			(0x5 << 20)
50
51#define VIDCON0_PNRMODE_MASK			(0x3 << 17)
52#define VIDCON0_PNRMODE_SHIFT			17
53#define VIDCON0_PNRMODE_RGB			(0x0 << 17)
54#define VIDCON0_PNRMODE_BGR			(0x1 << 17)
55#define VIDCON0_PNRMODE_SERIAL_RGB		(0x2 << 17)
56#define VIDCON0_PNRMODE_SERIAL_BGR		(0x3 << 17)
57
58#define VIDCON0_CLKVALUP			(1 << 16)
59#define VIDCON0_CLKVAL_F_MASK			(0xff << 6)
60#define VIDCON0_CLKVAL_F_SHIFT			6
61#define VIDCON0_CLKVAL_F_LIMIT			0xff
62#define VIDCON0_CLKVAL_F(_x)			((_x) << 6)
63#define VIDCON0_VLCKFREE			(1 << 5)
64#define VIDCON0_CLKDIR				(1 << 4)
65
66#define VIDCON0_CLKSEL_MASK			(0x3 << 2)
67#define VIDCON0_CLKSEL_SHIFT			2
68#define VIDCON0_CLKSEL_HCLK			(0x0 << 2)
69#define VIDCON0_CLKSEL_LCD			(0x1 << 2)
70#define VIDCON0_CLKSEL_27M			(0x3 << 2)
71
72#define VIDCON0_ENVID				(1 << 1)
73#define VIDCON0_ENVID_F				(1 << 0)
74
75#define VIDCON1					0x04
76#define VIDCON1_LINECNT_MASK			(0x7ff << 16)
77#define VIDCON1_LINECNT_SHIFT			16
78#define VIDCON1_LINECNT_GET(_v)			(((_v) >> 16) & 0x7ff)
79#define VIDCON1_FSTATUS_EVEN			(1 << 15)
80#define VIDCON1_VSTATUS_MASK			(0x3 << 13)
81#define VIDCON1_VSTATUS_SHIFT			13
82#define VIDCON1_VSTATUS_VSYNC			(0x0 << 13)
83#define VIDCON1_VSTATUS_BACKPORCH		(0x1 << 13)
84#define VIDCON1_VSTATUS_ACTIVE			(0x2 << 13)
85#define VIDCON1_VSTATUS_FRONTPORCH		(0x0 << 13)
86#define VIDCON1_VCLK_MASK			(0x3 << 9)
87#define VIDCON1_VCLK_HOLD			(0x0 << 9)
88#define VIDCON1_VCLK_RUN			(0x1 << 9)
89
90#define VIDCON1_INV_VCLK			(1 << 7)
91#define VIDCON1_INV_HSYNC			(1 << 6)
92#define VIDCON1_INV_VSYNC			(1 << 5)
93#define VIDCON1_INV_VDEN			(1 << 4)
94
95/* VIDCON2 */
96
97#define VIDCON2					0x08
98#define VIDCON2_EN601				(1 << 23)
99#define VIDCON2_TVFMTSEL_SW			(1 << 14)
100
101#define VIDCON2_TVFMTSEL1_MASK			(0x3 << 12)
102#define VIDCON2_TVFMTSEL1_SHIFT			12
103#define VIDCON2_TVFMTSEL1_RGB			(0x0 << 12)
104#define VIDCON2_TVFMTSEL1_YUV422		(0x1 << 12)
105#define VIDCON2_TVFMTSEL1_YUV444		(0x2 << 12)
106
107#define VIDCON2_ORGYCbCr			(1 << 8)
108#define VIDCON2_YUVORDCrCb			(1 << 7)
109
110/* PRTCON (S3C6410, S5PC100)
111 * Might not be present in the S3C6410 documentation,
112 * but tests prove it's there almost for sure; shouldn't hurt in any case.
113 */
114#define PRTCON					0x0c
115#define PRTCON_PROTECT				(1 << 11)
116
117/* VIDTCON0 */
118
119#define VIDTCON0				0x10
120#define VIDTCON0_VBPDE_MASK			(0xff << 24)
121#define VIDTCON0_VBPDE_SHIFT			24
122#define VIDTCON0_VBPDE_LIMIT			0xff
123#define VIDTCON0_VBPDE(_x)			((_x) << 24)
124
125#define VIDTCON0_VBPD_MASK			(0xff << 16)
126#define VIDTCON0_VBPD_SHIFT			16
127#define VIDTCON0_VBPD_LIMIT			0xff
128#define VIDTCON0_VBPD(_x)			((_x) << 16)
129
130#define VIDTCON0_VFPD_MASK			(0xff << 8)
131#define VIDTCON0_VFPD_SHIFT			8
132#define VIDTCON0_VFPD_LIMIT			0xff
133#define VIDTCON0_VFPD(_x)			((_x) << 8)
134
135#define VIDTCON0_VSPW_MASK			(0xff << 0)
136#define VIDTCON0_VSPW_SHIFT			0
137#define VIDTCON0_VSPW_LIMIT			0xff
138#define VIDTCON0_VSPW(_x)			((_x) << 0)
139
140/* VIDTCON1 */
141
142#define VIDTCON1				0x14
143#define VIDTCON1_VFPDE_MASK			(0xff << 24)
144#define VIDTCON1_VFPDE_SHIFT			24
145#define VIDTCON1_VFPDE_LIMIT			0xff
146#define VIDTCON1_VFPDE(_x)			((_x) << 24)
147
148#define VIDTCON1_HBPD_MASK			(0xff << 16)
149#define VIDTCON1_HBPD_SHIFT			16
150#define VIDTCON1_HBPD_LIMIT			0xff
151#define VIDTCON1_HBPD(_x)			((_x) << 16)
152
153#define VIDTCON1_HFPD_MASK			(0xff << 8)
154#define VIDTCON1_HFPD_SHIFT			8
155#define VIDTCON1_HFPD_LIMIT			0xff
156#define VIDTCON1_HFPD(_x)			((_x) << 8)
157
158#define VIDTCON1_HSPW_MASK			(0xff << 0)
159#define VIDTCON1_HSPW_SHIFT			0
160#define VIDTCON1_HSPW_LIMIT			0xff
161#define VIDTCON1_HSPW(_x)			((_x) << 0)
162
163#define VIDTCON2				0x18
164#define VIDTCON2_LINEVAL_E(_x)			((((_x) & 0x800) >> 11) << 23)
165#define VIDTCON2_LINEVAL_MASK			(0x7ff << 11)
166#define VIDTCON2_LINEVAL_SHIFT			11
167#define VIDTCON2_LINEVAL_LIMIT			0x7ff
168#define VIDTCON2_LINEVAL(_x)			(((_x) & 0x7ff) << 11)
169
170#define VIDTCON2_HOZVAL_E(_x)			((((_x) & 0x800) >> 11) << 22)
171#define VIDTCON2_HOZVAL_MASK			(0x7ff << 0)
172#define VIDTCON2_HOZVAL_SHIFT			0
173#define VIDTCON2_HOZVAL_LIMIT			0x7ff
174#define VIDTCON2_HOZVAL(_x)			(((_x) & 0x7ff) << 0)
175
176/* WINCONx */
177
178#define WINCON(_win)				(0x20 + ((_win) * 4))
179#define WINCONx_CSCWIDTH_MASK			(0x3 << 26)
180#define WINCONx_CSCWIDTH_SHIFT			26
181#define WINCONx_CSCWIDTH_WIDE			(0x0 << 26)
182#define WINCONx_CSCWIDTH_NARROW			(0x3 << 26)
183#define WINCONx_ENLOCAL				(1 << 22)
184#define WINCONx_BUFSTATUS			(1 << 21)
185#define WINCONx_BUFSEL				(1 << 20)
186#define WINCONx_BUFAUTOEN			(1 << 19)
187#define WINCONx_BITSWP				(1 << 18)
188#define WINCONx_BYTSWP				(1 << 17)
189#define WINCONx_HAWSWP				(1 << 16)
190#define WINCONx_WSWP				(1 << 15)
191#define WINCONx_YCbCr				(1 << 13)
192#define WINCONx_BURSTLEN_MASK			(0x3 << 9)
193#define WINCONx_BURSTLEN_SHIFT			9
194#define WINCONx_BURSTLEN_16WORD			(0x0 << 9)
195#define WINCONx_BURSTLEN_8WORD			(0x1 << 9)
196#define WINCONx_BURSTLEN_4WORD			(0x2 << 9)
197#define WINCONx_ENWIN				(1 << 0)
198
199#define WINCON0_BPPMODE_MASK			(0xf << 2)
200#define WINCON0_BPPMODE_SHIFT			2
201#define WINCON0_BPPMODE_1BPP			(0x0 << 2)
202#define WINCON0_BPPMODE_2BPP			(0x1 << 2)
203#define WINCON0_BPPMODE_4BPP			(0x2 << 2)
204#define WINCON0_BPPMODE_8BPP_PALETTE		(0x3 << 2)
205#define WINCON0_BPPMODE_16BPP_565		(0x5 << 2)
206#define WINCON0_BPPMODE_16BPP_1555		(0x7 << 2)
207#define WINCON0_BPPMODE_18BPP_666		(0x8 << 2)
208#define WINCON0_BPPMODE_24BPP_888		(0xb << 2)
209
210#define WINCON1_LOCALSEL_CAMIF			(1 << 23)
211#define WINCON1_BLD_PIX				(1 << 6)
212#define WINCON1_BPPMODE_MASK			(0xf << 2)
213#define WINCON1_BPPMODE_SHIFT			2
214#define WINCON1_BPPMODE_1BPP			(0x0 << 2)
215#define WINCON1_BPPMODE_2BPP			(0x1 << 2)
216#define WINCON1_BPPMODE_4BPP			(0x2 << 2)
217#define WINCON1_BPPMODE_8BPP_PALETTE		(0x3 << 2)
218#define WINCON1_BPPMODE_8BPP_1232		(0x4 << 2)
219#define WINCON1_BPPMODE_16BPP_565		(0x5 << 2)
220#define WINCON1_BPPMODE_16BPP_A1555		(0x6 << 2)
221#define WINCON1_BPPMODE_16BPP_I1555		(0x7 << 2)
222#define WINCON1_BPPMODE_18BPP_666		(0x8 << 2)
223#define WINCON1_BPPMODE_18BPP_A1665		(0x9 << 2)
224#define WINCON1_BPPMODE_19BPP_A1666		(0xa << 2)
225#define WINCON1_BPPMODE_24BPP_888		(0xb << 2)
226#define WINCON1_BPPMODE_24BPP_A1887		(0xc << 2)
227#define WINCON1_BPPMODE_25BPP_A1888		(0xd << 2)
228#define WINCON1_BPPMODE_28BPP_A4888		(0xd << 2)
229#define WINCON1_ALPHA_SEL			(1 << 1)
230
231/* S5PV210 */
232#define SHADOWCON				0x34
233#define SHADOWCON_WINx_PROTECT(_win)		(1 << (10 + (_win)))
234/* DMA channels (all windows) */
235#define SHADOWCON_CHx_ENABLE(_win)		(1 << (_win))
236/* Local input channels (windows 0-2) */
237#define SHADOWCON_CHx_LOCAL_ENABLE(_win)	(1 << (5 + (_win)))
238
239/* VIDOSDx */
240
241#define VIDOSD_BASE				0x40
242#define VIDOSDxA_TOPLEFT_X_E(_x)		((((_x) & 0x800) >> 11) << 23)
243#define VIDOSDxA_TOPLEFT_X_MASK			(0x7ff << 11)
244#define VIDOSDxA_TOPLEFT_X_SHIFT		11
245#define VIDOSDxA_TOPLEFT_X_LIMIT		0x7ff
246#define VIDOSDxA_TOPLEFT_X(_x)			(((_x) & 0x7ff) << 11)
247
248#define VIDOSDxA_TOPLEFT_Y_E(_x)		((((_x) & 0x800) >> 11) << 22)
249#define VIDOSDxA_TOPLEFT_Y_MASK			(0x7ff << 0)
250#define VIDOSDxA_TOPLEFT_Y_SHIFT		0
251#define VIDOSDxA_TOPLEFT_Y_LIMIT		0x7ff
252#define VIDOSDxA_TOPLEFT_Y(_x)			(((_x) & 0x7ff) << 0)
253
254#define VIDOSDxB_BOTRIGHT_X_E(_x)		((((_x) & 0x800) >> 11) << 23)
255#define VIDOSDxB_BOTRIGHT_X_MASK		(0x7ff << 11)
256#define VIDOSDxB_BOTRIGHT_X_SHIFT		11
257#define VIDOSDxB_BOTRIGHT_X_LIMIT		0x7ff
258#define VIDOSDxB_BOTRIGHT_X(_x)			(((_x) & 0x7ff) << 11)
259
260#define VIDOSDxB_BOTRIGHT_Y_E(_x)		((((_x) & 0x800) >> 11) << 22)
261#define VIDOSDxB_BOTRIGHT_Y_MASK		(0x7ff << 0)
262#define VIDOSDxB_BOTRIGHT_Y_SHIFT		0
263#define VIDOSDxB_BOTRIGHT_Y_LIMIT		0x7ff
264#define VIDOSDxB_BOTRIGHT_Y(_x)			(((_x) & 0x7ff) << 0)
265
266/* For VIDOSD[1..4]C */
267#define VIDISD14C_ALPHA0_R(_x)			((_x) << 20)
268#define VIDISD14C_ALPHA0_G_MASK			(0xf << 16)
269#define VIDISD14C_ALPHA0_G_SHIFT		16
270#define VIDISD14C_ALPHA0_G_LIMIT		0xf
271#define VIDISD14C_ALPHA0_G(_x)			((_x) << 16)
272#define VIDISD14C_ALPHA0_B_MASK			(0xf << 12)
273#define VIDISD14C_ALPHA0_B_SHIFT		12
274#define VIDISD14C_ALPHA0_B_LIMIT		0xf
275#define VIDISD14C_ALPHA0_B(_x)			((_x) << 12)
276#define VIDISD14C_ALPHA1_R_MASK			(0xf << 8)
277#define VIDISD14C_ALPHA1_R_SHIFT		8
278#define VIDISD14C_ALPHA1_R_LIMIT		0xf
279#define VIDISD14C_ALPHA1_R(_x)			((_x) << 8)
280#define VIDISD14C_ALPHA1_G_MASK			(0xf << 4)
281#define VIDISD14C_ALPHA1_G_SHIFT		4
282#define VIDISD14C_ALPHA1_G_LIMIT		0xf
283#define VIDISD14C_ALPHA1_G(_x)			((_x) << 4)
284#define VIDISD14C_ALPHA1_B_MASK			(0xf << 0)
285#define VIDISD14C_ALPHA1_B_SHIFT		0
286#define VIDISD14C_ALPHA1_B_LIMIT		0xf
287#define VIDISD14C_ALPHA1_B(_x)			((_x) << 0)
288
289/* Video buffer addresses */
290#define VIDW_BUF_START(_buff)			(0xA0 + ((_buff) * 8))
291#define VIDW_BUF_START1(_buff)			(0xA4 + ((_buff) * 8))
292#define VIDW_BUF_END(_buff)			(0xD0 + ((_buff) * 8))
293#define VIDW_BUF_END1(_buff)			(0xD4 + ((_buff) * 8))
294#define VIDW_BUF_SIZE(_buff)			(0x100 + ((_buff) * 4))
295
296#define VIDW_BUF_SIZE_OFFSET_E(_x)		((((_x) & 0x2000) >> 13) << 27)
297#define VIDW_BUF_SIZE_OFFSET_MASK		(0x1fff << 13)
298#define VIDW_BUF_SIZE_OFFSET_SHIFT		13
299#define VIDW_BUF_SIZE_OFFSET_LIMIT		0x1fff
300#define VIDW_BUF_SIZE_OFFSET(_x)		(((_x) & 0x1fff) << 13)
301
302#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x)		((((_x) & 0x2000) >> 13) << 26)
303#define VIDW_BUF_SIZE_PAGEWIDTH_MASK		(0x1fff << 0)
304#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT		0
305#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT		0x1fff
306#define VIDW_BUF_SIZE_PAGEWIDTH(_x)		(((_x) & 0x1fff) << 0)
307
308/* Interrupt controls and status */
309
310#define VIDINTCON0				0x130
311#define VIDINTCON0_FIFOINTERVAL_MASK		(0x3f << 20)
312#define VIDINTCON0_FIFOINTERVAL_SHIFT		20
313#define VIDINTCON0_FIFOINTERVAL_LIMIT		0x3f
314#define VIDINTCON0_FIFOINTERVAL(_x)		((_x) << 20)
315
316#define VIDINTCON0_INT_SYSMAINCON		(1 << 19)
317#define VIDINTCON0_INT_SYSSUBCON		(1 << 18)
318#define VIDINTCON0_INT_I80IFDONE		(1 << 17)
319
320#define VIDINTCON0_FRAMESEL0_MASK		(0x3 << 15)
321#define VIDINTCON0_FRAMESEL0_SHIFT		15
322#define VIDINTCON0_FRAMESEL0_BACKPORCH		(0x0 << 15)
323#define VIDINTCON0_FRAMESEL0_VSYNC		(0x1 << 15)
324#define VIDINTCON0_FRAMESEL0_ACTIVE		(0x2 << 15)
325#define VIDINTCON0_FRAMESEL0_FRONTPORCH		(0x3 << 15)
326
327#define VIDINTCON0_FRAMESEL1			(1 << 13)
328#define VIDINTCON0_FRAMESEL1_MASK		(0x3 << 13)
329#define VIDINTCON0_FRAMESEL1_NONE		(0x0 << 13)
330#define VIDINTCON0_FRAMESEL1_BACKPORCH		(0x1 << 13)
331#define VIDINTCON0_FRAMESEL1_VSYNC		(0x2 << 13)
332#define VIDINTCON0_FRAMESEL1_FRONTPORCH		(0x3 << 13)
333
334#define VIDINTCON0_INT_FRAME			(1 << 12)
335#define VIDINTCON0_FIFIOSEL_MASK		(0x7f << 5)
336#define VIDINTCON0_FIFIOSEL_SHIFT		5
337#define VIDINTCON0_FIFIOSEL_WINDOW0		(0x1 << 5)
338#define VIDINTCON0_FIFIOSEL_WINDOW1		(0x2 << 5)
339#define VIDINTCON0_FIFIOSEL_WINDOW2		(0x10 << 5)
340#define VIDINTCON0_FIFIOSEL_WINDOW3		(0x20 << 5)
341#define VIDINTCON0_FIFIOSEL_WINDOW4		(0x40 << 5)
342
343#define VIDINTCON0_FIFOLEVEL_MASK		(0x7 << 2)
344#define VIDINTCON0_FIFOLEVEL_SHIFT		2
345#define VIDINTCON0_FIFOLEVEL_TO25PC		(0x0 << 2)
346#define VIDINTCON0_FIFOLEVEL_TO50PC		(0x1 << 2)
347#define VIDINTCON0_FIFOLEVEL_TO75PC		(0x2 << 2)
348#define VIDINTCON0_FIFOLEVEL_EMPTY		(0x3 << 2)
349#define VIDINTCON0_FIFOLEVEL_FULL		(0x4 << 2)
350
351#define VIDINTCON0_INT_FIFO_MASK		(0x3 << 0)
352#define VIDINTCON0_INT_FIFO_SHIFT		0
353#define VIDINTCON0_INT_ENABLE			(1 << 0)
354
355#define VIDINTCON1				0x134
356#define VIDINTCON1_INT_I180			(1 << 2)
357#define VIDINTCON1_INT_FRAME			(1 << 1)
358#define VIDINTCON1_INT_FIFO			(1 << 0)
359
360/* Window colour-key control registers */
361#define WKEYCON					0x140
362
363#define WKEYCON0				0x00
364#define WKEYCON1				0x04
365
366#define WxKEYCON0_KEYBL_EN			(1 << 26)
367#define WxKEYCON0_KEYEN_F			(1 << 25)
368#define WxKEYCON0_DIRCON			(1 << 24)
369#define WxKEYCON0_COMPKEY_MASK			(0xffffff << 0)
370#define WxKEYCON0_COMPKEY_SHIFT			0
371#define WxKEYCON0_COMPKEY_LIMIT			0xffffff
372#define WxKEYCON0_COMPKEY(_x)			((_x) << 0)
373#define WxKEYCON1_COLVAL_MASK			(0xffffff << 0)
374#define WxKEYCON1_COLVAL_SHIFT			0
375#define WxKEYCON1_COLVAL_LIMIT			0xffffff
376#define WxKEYCON1_COLVAL(_x)			((_x) << 0)
377
378/* Dithering control */
379#define DITHMODE				0x170
380#define DITHMODE_R_POS_MASK			(0x3 << 5)
381#define DITHMODE_R_POS_SHIFT			5
382#define DITHMODE_R_POS_8BIT			(0x0 << 5)
383#define DITHMODE_R_POS_6BIT			(0x1 << 5)
384#define DITHMODE_R_POS_5BIT			(0x2 << 5)
385#define DITHMODE_G_POS_MASK			(0x3 << 3)
386#define DITHMODE_G_POS_SHIFT			3
387#define DITHMODE_G_POS_8BIT			(0x0 << 3)
388#define DITHMODE_G_POS_6BIT			(0x1 << 3)
389#define DITHMODE_G_POS_5BIT			(0x2 << 3)
390#define DITHMODE_B_POS_MASK			(0x3 << 1)
391#define DITHMODE_B_POS_SHIFT			1
392#define DITHMODE_B_POS_8BIT			(0x0 << 1)
393#define DITHMODE_B_POS_6BIT			(0x1 << 1)
394#define DITHMODE_B_POS_5BIT			(0x2 << 1)
395#define DITHMODE_DITH_EN			(1 << 0)
396
397/* Window blanking (MAP) */
398#define WINxMAP(_win)				(0x180 + ((_win) * 4))
399#define WINxMAP_MAP				(1 << 24)
400#define WINxMAP_MAP_COLOUR_MASK			(0xffffff << 0)
401#define WINxMAP_MAP_COLOUR_SHIFT		0
402#define WINxMAP_MAP_COLOUR_LIMIT		0xffffff
403#define WINxMAP_MAP_COLOUR(_x)			((_x) << 0)
404
405/* Winodw palette control */
406#define WPALCON					0x1A0
407#define WPALCON_PAL_UPDATE			(1 << 9)
408#define WPALCON_W4PAL_16BPP_A555		(1 << 8)
409#define WPALCON_W3PAL_16BPP_A555		(1 << 7)
410#define WPALCON_W2PAL_16BPP_A555		(1 << 6)
411#define WPALCON_W1PAL_MASK			(0x7 << 3)
412#define WPALCON_W1PAL_SHIFT			3
413#define WPALCON_W1PAL_25BPP_A888		(0x0 << 3)
414#define WPALCON_W1PAL_24BPP			(0x1 << 3)
415#define WPALCON_W1PAL_19BPP_A666		(0x2 << 3)
416#define WPALCON_W1PAL_18BPP_A665		(0x3 << 3)
417#define WPALCON_W1PAL_18BPP			(0x4 << 3)
418#define WPALCON_W1PAL_16BPP_A555		(0x5 << 3)
419#define WPALCON_W1PAL_16BPP_565			(0x6 << 3)
420#define WPALCON_W0PAL_MASK			(0x7 << 0)
421#define WPALCON_W0PAL_SHIFT			0
422#define WPALCON_W0PAL_25BPP_A888		(0x0 << 0)
423#define WPALCON_W0PAL_24BPP			(0x1 << 0)
424#define WPALCON_W0PAL_19BPP_A666		(0x2 << 0)
425#define WPALCON_W0PAL_18BPP_A665		(0x3 << 0)
426#define WPALCON_W0PAL_18BPP			(0x4 << 0)
427#define WPALCON_W0PAL_16BPP_A555		(0x5 << 0)
428#define WPALCON_W0PAL_16BPP_565			(0x6 << 0)
429
430/* Blending equation control */
431#define BLENDCON				0x260
432#define BLENDCON_NEW_MASK			(1 << 0)
433#define BLENDCON_NEW_8BIT_ALPHA_VALUE		(1 << 0)
434#define BLENDCON_NEW_4BIT_ALPHA_VALUE		(0 << 0)
435
436/* Notes on per-window bpp settings
437 *
438 * Value	Win0	 Win1	  Win2	   Win3	    Win 4
439 * 0000		1(P)	 1(P)	  1(P)	   1(P)	    1(P)
440 * 0001		2(P)	 2(P)     2(P)	   2(P)	    2(P)
441 * 0010		4(P)	 4(P)     4(P)	   4(P)     -none-
442 * 0011		8(P)	 8(P)     -none-   -none-   -none-
443 * 0100		-none-	 8(A232)  8(A232)  -none-   -none-
444 * 0101		16(565)	 16(565)  16(565)  16(565)   16(565)
445 * 0110		-none-	 16(A555) 16(A555) 16(A555)  16(A555)
446 * 0111		16(I555) 16(I565) 16(I555) 16(I555)  16(I555)
447 * 1000		18(666)	 18(666)  18(666)  18(666)   18(666)
448 * 1001		-none-	 18(A665) 18(A665) 18(A665)  16(A665)
449 * 1010		-none-	 19(A666) 19(A666) 19(A666)  19(A666)
450 * 1011		24(888)	 24(888)  24(888)  24(888)   24(888)
451 * 1100		-none-	 24(A887) 24(A887) 24(A887)  24(A887)
452 * 1101		-none-	 25(A888) 25(A888) 25(A888)  25(A888)
453 * 1110		-none-	 -none-	  -none-   -none-    -none-
454 * 1111		-none-	 -none-   -none-   -none-    -none-
455*/
456
457/* FIMD Version 8 register offset definitions */
458#define FIMD_V8_VIDTCON0	0x20010
459#define FIMD_V8_VIDTCON1	0x20014
460#define FIMD_V8_VIDTCON2	0x20018
461#define FIMD_V8_VIDTCON3	0x2001C
462#define FIMD_V8_VIDCON1		0x20004
463