11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * linux/include/video/vga.h -- standard VGA chipset interaction 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright 1999 Jeff Garzik <jgarzik@pobox.com> 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright history from vga16fb.c: 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright 1999 Ben Pfaff and Petr Vandrovec 8c84e032e145775032fa9078b55e6333dd866603bJustin P. Mattock * Based on VGA info at http://www.osdever.net/FreeVGA/home.htm 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Based on VESA framebuffer (c) 1998 Gerd Knorr 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This file is subject to the terms and conditions of the GNU General 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Public License. See the file COPYING in the main directory of this 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * archive for more details. 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef __linux_video_vga_h__ 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define __linux_video_vga_h__ 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <linux/types.h> 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/io.h> 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/vga.h> 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include <asm/byteorder.h> 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Some of the code below is taken from SVGAlib. The original, 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unmodified copyright notice for that code is below. */ 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGAlib version 1.2 - (c) 1993 Tommy Frandsen */ 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* */ 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* This library is free software; you can redistribute it and/or */ 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* modify it without any restrictions. This library is distributed */ 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* in the hope that it will be useful, but without any warranty. */ 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* Multi-chipset support Copyright 1993 Harm Hanemaayer */ 351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* partially copyrighted (C) 1993 by Hartmut Schirmer */ 361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA data register ports */ 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRT_DC 0x3D5 /* CRT Controller Data Register - color emulation */ 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRT_DM 0x3B5 /* CRT Controller Data Register - mono emulation */ 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATT_R 0x3C1 /* Attribute Controller Data Read Register */ 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATT_W 0x3C0 /* Attribute Controller Data Write Register */ 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_D 0x3CF /* Graphics Controller Data Register */ 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_D 0x3C5 /* Sequencer Data Register */ 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_R 0x3CC /* Misc Output Read Register */ 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_FTC_R 0x3CA /* Feature Control Read Register */ 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PEL_D 0x3C9 /* PEL Data Register */ 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PEL_MSK 0x3C6 /* PEL mask register */ 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* EGA-specific registers */ 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EGA_GFX_E0 0x3CC /* Graphics enable processor 0 */ 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EGA_GFX_E1 0x3CA /* Graphics enable processor 1 */ 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA index register ports */ 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRT_IC 0x3D4 /* CRT Controller Index - color emulation */ 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRT_IM 0x3B4 /* CRT Controller Index - mono emulation */ 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATT_IW 0x3C0 /* Attribute Controller Index & Data Write Register */ 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_I 0x3CE /* Graphics Controller Index */ 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_I 0x3C4 /* Sequencer Index */ 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PEL_IW 0x3C8 /* PEL Write Index */ 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_PEL_IR 0x3C7 /* PEL Read Index */ 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* standard VGA indexes max counts */ 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRT_C 0x19 /* Number of CRT Controller Registers */ 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATT_C 0x15 /* Number of Attribute Controller Registers */ 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_C 0x09 /* Number of Graphics Controller Registers */ 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_C 0x05 /* Number of Sequencer Registers */ 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_C 0x01 /* Number of Misc Output Register */ 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA misc register bit masks */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_COLOR 0x01 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_ENB_MEM_ACCESS 0x02 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_DCLK_28322_720 0x04 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_ENB_PLL_LOAD (0x04 | 0x08) 771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_MIS_SEL_HIGH_PAGE 0x20 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA CRT controller register indices */ 801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_TOTAL 0 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_DISP 1 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_BLANK_START 2 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_BLANK_END 3 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_SYNC_START 4 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_H_SYNC_END 5 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_TOTAL 6 871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_OVERFLOW 7 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_PRESET_ROW 8 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_MAX_SCAN 9 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_CURSOR_START 0x0A 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_CURSOR_END 0x0B 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_START_HI 0x0C 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_START_LO 0x0D 941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_CURSOR_HI 0x0E 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_CURSOR_LO 0x0F 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_SYNC_START 0x10 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_SYNC_END 0x11 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_DISP_END 0x12 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_OFFSET 0x13 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_UNDERLINE 0x14 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_BLANK_START 0x15 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_V_BLANK_END 0x16 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_MODE 0x17 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_LINE_COMPARE 0x18 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CRTC_REGS VGA_CRT_C 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA CRT controller bit masks */ 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CR11_LOCK_CR0_CR7 0x80 /* lock writes to CR0 - CR7 */ 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_CR17_H_V_SIGNALS_ENABLED 0x80 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA attribute controller register indices */ 1121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE0 0x00 1131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE1 0x01 1141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE2 0x02 1151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE3 0x03 1161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE4 0x04 1171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE5 0x05 1181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE6 0x06 1191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE7 0x07 1201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE8 0x08 1211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTE9 0x09 1221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTEA 0x0A 1231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTEB 0x0B 1241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTEC 0x0C 1251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTED 0x0D 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTEE 0x0E 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PALETTEF 0x0F 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_MODE 0x10 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_OVERSCAN 0x11 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PLANE_ENABLE 0x12 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_PEL 0x13 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_ATC_COLOR_PAGE 0x14 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_AR_ENABLE_DISPLAY 0x20 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA sequencer register indices */ 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_RESET 0x00 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_CLOCK_MODE 0x01 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_PLANE_WRITE 0x02 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_CHARACTER_MAP 0x03 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SEQ_MEMORY_MODE 0x04 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA sequencer register bit masks */ 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR01_CHAR_CLK_8DOTS 0x01 /* bit 0: character clocks 8 dots wide are generated */ 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR01_SCREEN_OFF 0x20 /* bit 5: Screen is off */ 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR02_ALL_PLANES 0x0F /* bits 3-0: enable access to all planes */ 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR04_EXT_MEM 0x02 /* bit 1: allows complete mem access to 256K */ 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR04_SEQ_MODE 0x04 /* bit 2: directs system to use a sequential addressing mode */ 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SR04_CHN_4M 0x08 /* bit 3: selects modulo 4 addressing for CPU access to display memory */ 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA graphics controller register indices */ 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_SR_VALUE 0x00 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_SR_ENABLE 0x01 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_COMPARE_VALUE 0x02 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_DATA_ROTATE 0x03 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_PLANE_READ 0x04 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_MODE 0x05 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_MISC 0x06 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_COMPARE_MASK 0x07 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GFX_BIT_MASK 0x08 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA graphics controller bit masks */ 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_GR06_GRAPHICS_MODE 0x01 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* macro for composing an 8-bit VGA register index and value 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * into a single 16-bit quantity */ 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_OUT16VAL(v, r) (((v) << 8) | (r)) 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* decide whether we should enable the faster 16-bit VGA register writes */ 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef __LITTLE_ENDIAN 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_OUTW_WRITE 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* VGA State Save and Restore */ 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_FONT0 1 /* save/restore plane 2 fonts */ 1761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_FONT1 2 /* save/restore plane 3 fonts */ 1771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_TEXT 4 /* save/restore plane 0/1 fonts */ 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_FONTS 7 /* save/restore all fonts */ 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_MODE 8 /* save/restore video mode */ 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VGA_SAVE_CMAP 16 /* save/restore color map/DAC */ 1811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct vgastate { 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void __iomem *vgabase; /* mmio base, if supported */ 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long membase; /* VGA window base, 0 for default - 0xA000 */ 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 memsize; /* VGA window size, 0 for default 64K */ 1861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 flags; /* what state[s] to save (see VGA_SAVE_*) */ 1871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 depth; /* current fb depth, not important */ 1881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 num_attr; /* number of att registers, 0 for default */ 1891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 num_crtc; /* number of crt registers, 0 for default */ 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 num_gfx; /* number of gfx registers, 0 for default */ 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds __u32 num_seq; /* number of seq registers, 0 for default */ 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds void *vidstate; 1931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int save_vga(struct vgastate *state); 1961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int restore_vga(struct vgastate *state); 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * generic VGA port read/write 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_io_r (unsigned short port) 2031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return inb_p(port); 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_w (unsigned short port, unsigned char val) 2081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds outb_p(val, port); 2101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_w_fast (unsigned short port, unsigned char reg, 2131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char val) 2141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds outw(VGA_OUT16VAL (val, reg), port); 2161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_mm_r (void __iomem *regbase, unsigned short port) 2191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return readb (regbase + port); 2211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_w (void __iomem *regbase, unsigned short port, unsigned char val) 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writeb (val, regbase + port); 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_w_fast (void __iomem *regbase, unsigned short port, 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char reg, unsigned char val) 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writew (VGA_OUT16VAL (val, reg), regbase + port); 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_r (void __iomem *regbase, unsigned short port) 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (regbase) 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_mm_r (regbase, port); 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_io_r (port); 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_w (void __iomem *regbase, unsigned short port, unsigned char val) 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (regbase) 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, port, val); 2461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (port, val); 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_w_fast (void __iomem *regbase, unsigned short port, 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char reg, unsigned char val) 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (regbase) 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w_fast (regbase, port, reg, val); 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w_fast (port, reg, val); 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * VGA CRTC register read/write 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_rcrt (void __iomem *regbase, unsigned char reg) 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_CRT_IC, reg); 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_r (regbase, VGA_CRT_DC); 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w_fast (regbase, VGA_CRT_IC, reg, val); 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_CRT_IC, reg); 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_CRT_DC, val); 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_io_rcrt (unsigned char reg) 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_CRT_IC, reg); 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_io_r (VGA_CRT_DC); 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_wcrt (unsigned char reg, unsigned char val) 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w_fast (VGA_CRT_IC, reg, val); 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_CRT_IC, reg); 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_CRT_DC, val); 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_mm_rcrt (void __iomem *regbase, unsigned char reg) 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_CRT_IC, reg); 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_mm_r (regbase, VGA_CRT_DC); 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_wcrt (void __iomem *regbase, unsigned char reg, unsigned char val) 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w_fast (regbase, VGA_CRT_IC, reg, val); 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_CRT_IC, reg); 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_CRT_DC, val); 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * VGA sequencer register read/write 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_rseq (void __iomem *regbase, unsigned char reg) 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_SEQ_I, reg); 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_r (regbase, VGA_SEQ_D); 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w_fast (regbase, VGA_SEQ_I, reg, val); 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_SEQ_I, reg); 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_SEQ_D, val); 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_io_rseq (unsigned char reg) 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_SEQ_I, reg); 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_io_r (VGA_SEQ_D); 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_wseq (unsigned char reg, unsigned char val) 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w_fast (VGA_SEQ_I, reg, val); 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_SEQ_I, reg); 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_SEQ_D, val); 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_mm_rseq (void __iomem *regbase, unsigned char reg) 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_SEQ_I, reg); 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_mm_r (regbase, VGA_SEQ_D); 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_wseq (void __iomem *regbase, unsigned char reg, unsigned char val) 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w_fast (regbase, VGA_SEQ_I, reg, val); 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_SEQ_I, reg); 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_SEQ_D, val); 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 3641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * VGA graphics controller register read/write 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_rgfx (void __iomem *regbase, unsigned char reg) 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_GFX_I, reg); 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_r (regbase, VGA_GFX_D); 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w_fast (regbase, VGA_GFX_I, reg, val); 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_GFX_I, reg); 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_GFX_D, val); 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_io_rgfx (unsigned char reg) 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_GFX_I, reg); 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_io_r (VGA_GFX_D); 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_wgfx (unsigned char reg, unsigned char val) 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w_fast (VGA_GFX_I, reg, val); 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_GFX_I, reg); 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_GFX_D, val); 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_mm_rgfx (void __iomem *regbase, unsigned char reg) 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_GFX_I, reg); 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_mm_r (regbase, VGA_GFX_D); 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_wgfx (void __iomem *regbase, unsigned char reg, unsigned char val) 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VGA_OUTW_WRITE 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w_fast (regbase, VGA_GFX_I, reg, val); 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_GFX_I, reg); 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_GFX_D, val); 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* VGA_OUTW_WRITE */ 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * VGA attribute controller register read/write 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_rattr (void __iomem *regbase, unsigned char reg) 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_ATT_IW, reg); 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_r (regbase, VGA_ATT_R); 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_ATT_IW, reg); 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_w (regbase, VGA_ATT_W, val); 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_io_rattr (unsigned char reg) 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_ATT_IW, reg); 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_io_r (VGA_ATT_R); 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_io_wattr (unsigned char reg, unsigned char val) 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_ATT_IW, reg); 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_io_w (VGA_ATT_W, val); 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline unsigned char vga_mm_rattr (void __iomem *regbase, unsigned char reg) 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_ATT_IW, reg); 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds return vga_mm_r (regbase, VGA_ATT_R); 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void vga_mm_wattr (void __iomem *regbase, unsigned char reg, unsigned char val) 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_ATT_IW, reg); 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vga_mm_w (regbase, VGA_ATT_W, val); 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* __linux_video_vga_h__ */ 460