Lines Matching refs:map
26 static int regcache_hw_init(struct regmap *map)
34 if (!map->num_reg_defaults_raw)
37 if (!map->reg_defaults_raw) {
38 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
39 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
42 ret = regmap_bulk_read(map, 0, tmp_buf,
43 map->num_reg_defaults_raw);
48 map->reg_defaults_raw = tmp_buf;
49 map->cache_free = 1;
53 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
54 val = regcache_get_val(map->reg_defaults_raw,
55 i, map->cache_word_size);
56 if (regmap_volatile(map, i))
61 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
63 if (!map->reg_defaults) {
69 map->num_reg_defaults = count;
70 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
71 val = regcache_get_val(map->reg_defaults_raw,
72 i, map->cache_word_size);
73 if (regmap_volatile(map, i))
75 map->reg_defaults[j].reg = i;
76 map->reg_defaults[j].def = val;
83 if (map->cache_free)
84 kfree(map->reg_defaults_raw);
89 int regcache_init(struct regmap *map, const struct regmap_config *config)
95 if (map->cache_type == REGCACHE_NONE) {
96 map->cache_bypass = true;
101 if (cache_types[i]->type == map->cache_type)
105 dev_err(map->dev, "Could not match compress type: %d\n",
106 map->cache_type);
110 map->num_reg_defaults = config->num_reg_defaults;
111 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
112 map->reg_defaults_raw = config->reg_defaults_raw;
113 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
114 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
116 map->cache = NULL;
117 map->cache_ops = cache_types[i];
119 if (!map->cache_ops->read ||
120 !map->cache_ops->write ||
121 !map->cache_ops->name)
129 if (!map->num_reg_defaults)
131 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
135 map->reg_defaults = tmp_buf;
136 } else if (map->num_reg_defaults_raw) {
141 ret = regcache_hw_init(map);
146 if (!map->max_register)
147 map->max_register = map->num_reg_defaults_raw;
149 if (map->cache_ops->init) {
150 dev_dbg(map->dev, "Initializing %s cache\n",
151 map->cache_ops->name);
152 ret = map->cache_ops->init(map);
159 kfree(map->reg_defaults);
160 if (map->cache_free)
161 kfree(map->reg_defaults_raw);
166 void regcache_exit(struct regmap *map)
168 if (map->cache_type == REGCACHE_NONE)
171 BUG_ON(!map->cache_ops);
173 kfree(map->reg_defaults);
174 if (map->cache_free)
175 kfree(map->reg_defaults_raw);
177 if (map->cache_ops->exit) {
178 dev_dbg(map->dev, "Destroying %s cache\n",
179 map->cache_ops->name);
180 map->cache_ops->exit(map);
187 * @map: map to configure.
193 int regcache_read(struct regmap *map,
198 if (map->cache_type == REGCACHE_NONE)
201 BUG_ON(!map->cache_ops);
203 if (!regmap_volatile(map, reg)) {
204 ret = map->cache_ops->read(map, reg, value);
207 trace_regmap_reg_read_cache(map->dev, reg, *value);
219 * @map: map to configure.
225 int regcache_write(struct regmap *map,
228 if (map->cache_type == REGCACHE_NONE)
231 BUG_ON(!map->cache_ops);
233 if (!regmap_writeable(map, reg))
236 if (!regmap_volatile(map, reg))
237 return map->cache_ops->write(map, reg, value);
246 * @map: map to configure.
254 int regcache_sync(struct regmap *map)
262 BUG_ON(!map->cache_ops);
264 mutex_lock(&map->lock);
266 bypass = map->cache_bypass;
267 dev_dbg(map->dev, "Syncing %s cache\n",
268 map->cache_ops->name);
269 name = map->cache_ops->name;
270 trace_regcache_sync(map->dev, name, "start");
271 if (!map->cache_dirty)
273 if (map->cache_ops->sync) {
274 ret = map->cache_ops->sync(map);
276 for (i = 0; i < map->num_reg_defaults; i++) {
277 ret = regcache_read(map, i, &val);
280 map->cache_bypass = 1;
281 ret = _regmap_write(map, i, val);
282 map->cache_bypass = 0;
285 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
286 map->reg_defaults[i].reg,
287 map->reg_defaults[i].def);
292 trace_regcache_sync(map->dev, name, "stop");
294 map->cache_bypass = bypass;
295 mutex_unlock(&map->lock);
302 * regcache_cache_only: Put a register map into cache only mode
304 * @map: map to configure
307 * When a register map is marked as cache only writes to the register
308 * map API will only update the register cache, they will not cause
313 void regcache_cache_only(struct regmap *map, bool enable)
315 mutex_lock(&map->lock);
316 WARN_ON(map->cache_bypass && enable);
317 map->cache_only = enable;
318 mutex_unlock(&map->lock);
325 * @map: map to mark
331 void regcache_mark_dirty(struct regmap *map)
333 mutex_lock(&map->lock);
334 map->cache_dirty = true;
335 mutex_unlock(&map->lock);
340 * regcache_cache_bypass: Put a register map into cache bypass mode
342 * @map: map to configure
345 * When a register map is marked with the cache bypass option, writes
346 * to the register map API will only update the hardware and not the
350 void regcache_cache_bypass(struct regmap *map, bool enable)
352 mutex_lock(&map->lock);
353 WARN_ON(map->cache_only && enable);
354 map->cache_bypass = enable;
355 mutex_unlock(&map->lock);
414 int regcache_lookup_reg(struct regmap *map, unsigned int reg)
422 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
426 return r - map->reg_defaults;