Cross Reference: /drivers/media/video/mt9v022.c

Lines Matching defs:reg_write
136 static int reg_write(struct i2c_client *client, const u8 reg,
150 	return reg_write(client, reg, ret | data);
161 	return reg_write(client, reg, ret & ~data);
175 	ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
177 		ret = reg_write(client, MT9V022_READ_MODE, 0x300);
184 		ret = reg_write(client, MT9V022_ANALOG_GAIN, 16);
186 		ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480);
188 		ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH, 480);
193 		ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0);
212 	if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0)
241 			ret = reg_write(client, MT9V022_MAX_TOTAL_SHUTTER_WIDTH,
244 			ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
249 		ret = reg_write(client, MT9V022_COLUMN_START, rect.left);
251 		ret = reg_write(client, MT9V022_ROW_START, rect.top);
257 		ret = reg_write(client, MT9V022_HORIZONTAL_BLANKING,
261 		ret = reg_write(client, MT9V022_VERTICAL_BLANKING, 45);
263 		ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
265 		ret = reg_write(client, MT9V022_WINDOW_HEIGHT,
441 	if (reg_write(client, reg->reg, reg->val) < 0)
529 			if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0)
552 			if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
585 	ret = reg_write(client, MT9V022_RESET, 1);
600 		ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11);
604 		ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11);
731 	ret = reg_write(client, MT9V022_PIXCLK_FV_LV, pixclk);
738 	ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);