Lines Matching refs:regs
520 * Remap the regs into kernel space - this is abuse of
525 ap->regs = ioremap(dev->base_addr, 0x4000);
526 if (!ap->regs) {
567 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
614 struct ace_regs __iomem *regs = ap->regs;
619 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
621 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
626 writel(1, ®s->Mb0Lo);
627 readl(®s->CpuCtrl); /* flush */
858 iounmap(ap->regs);
865 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
869 idx = readl(®s->CmdPrd);
871 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
874 writel(idx, ®s->CmdPrd);
881 struct ace_regs __iomem *regs;
892 regs = ap->regs;
901 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
902 readl(®s->HostCtrl); /* PCI write posting */
914 ®s->HostCtrl);
917 ®s->HostCtrl);
919 readl(®s->HostCtrl); /* PCI write posting */
924 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
925 readl(®s->CpuCtrl); /* PCI write posting */
926 writel(0, ®s->Mb0Lo);
928 tig_ver = readl(®s->HostCtrl) >> 28;
937 writel(0, ®s->LocalCtrl);
946 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
947 readl(®s->CpuBCtrl); /* PCI write posting */
953 writel(SRAM_BANK_512K, ®s->LocalCtrl);
954 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
974 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
977 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
979 readl(®s->ModeStat); /* PCI write posting */
1006 writel(mac1, ®s->MacAddrHi);
1007 writel(mac2, ®s->MacAddrLo);
1039 pci_state = readl(®s->PciState);
1125 writel(tmp, ®s->PciState);
1204 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1205 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1215 writel(0, ®s->EvtCsm);
1222 writel(0, ®s->CmdRng[i]);
1224 writel(0, ®s->CmdPrd);
1225 writel(0, ®s->CmdCsm);
1301 writel(TX_RING_BASE, ®s->WinBase);
1304 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1336 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1337 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1339 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1340 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1343 writel(0, ®s->MaskInt);
1344 writel(1, ®s->IfIdx);
1350 writel(1, ®s->AssistState);
1353 writel(DEF_STAT, ®s->TuneStatTicks);
1354 writel(DEF_TRACE, ®s->TuneTrace);
1365 ®s->TuneTxCoalTicks);
1367 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1371 ®s->TuneRxCoalTicks);
1373 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1376 writel(trace[board_idx], ®s->TuneTrace);
1379 writel(tx_ratio[board_idx], ®s->TxBufRat);
1432 writel(tmp, ®s->TuneLink);
1434 writel(tmp, ®s->TuneFastLink);
1436 writel(ap->firmware_start, ®s->Pc);
1438 writel(0, ®s->Mb0Lo);
1450 ace_set_txprd(regs, ap, 0);
1451 writel(0, ®s->RxRetCsm);
1459 writel(1, ®s->AssistState); /* enable DMA */
1464 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1465 readl(®s->CpuCtrl);
1478 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1479 readl(®s->CpuCtrl);
1491 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1492 ®s->CpuBCtrl);
1493 writel(0, ®s->Mb0Lo);
1494 readl(®s->Mb0Lo);
1527 struct ace_regs __iomem *regs = ap->regs;
1533 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1535 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1537 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1539 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1541 writel(DEF_TX_RATIO, ®s->TxBufRat);
1545 ®s->TuneTxCoalTicks);
1548 ®s->TuneMaxTxDesc);
1551 ®s->TuneRxCoalTicks);
1554 ®s->TuneMaxRxDesc);
1556 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1566 struct ace_regs __iomem *regs = ap->regs;
1575 dev->name, (unsigned int)readl(®s->HostCtrl));
1649 struct ace_regs __iomem *regs = ap->regs;
1692 ace_issue_cmd(regs, &cmd);
1694 writel(idx, ®s->RxStdPrd);
1712 struct ace_regs __iomem *regs = ap->regs;
1749 writel(idx, ®s->RxMiniPrd);
1769 struct ace_regs __iomem *regs = ap->regs;
1809 ace_issue_cmd(regs, &cmd);
1811 writel(idx, ®s->RxJumboPrd);
1853 u32 state = readl(&ap->regs->GigLnkState);
1912 ace_issue_cmd(ap->regs, &cmd);
1914 writel(0, &((ap->regs)->RxJumboPrd));
2045 writel(idx, &ap->regs->RxRetCsm);
2125 struct ace_regs __iomem *regs = ap->regs;
2135 if (!(readl(®s->HostCtrl) & IN_INT))
2141 * writel(0, ®s->Mb0Lo).
2146 writel(0, ®s->Mb0Lo);
2147 readl(®s->Mb0Lo);
2177 evtcsm = readl(®s->EvtCsm);
2182 writel(evtcsm, ®s->EvtCsm);
2251 struct ace_regs __iomem *regs = ap->regs;
2259 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2264 ace_issue_cmd(regs, &cmd);
2269 ace_issue_cmd(regs, &cmd);
2279 ace_issue_cmd(regs, &cmd);
2290 ace_issue_cmd(regs, &cmd);
2306 struct ace_regs __iomem *regs = ap->regs;
2323 ace_issue_cmd(regs, &cmd);
2330 ace_issue_cmd(regs, &cmd);
2375 ace_issue_cmd(regs, &cmd);
2431 struct ace_regs __iomem *regs = ap->regs;
2518 ace_set_txprd(regs, ap, idx);
2567 struct ace_regs __iomem *regs = ap->regs;
2572 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2594 ace_issue_cmd(regs, &cmd);
2604 struct ace_regs __iomem *regs = ap->regs;
2617 link = readl(®s->GigLnkState);
2621 link = readl(®s->FastLnkState);
2643 ecmd->trace = readl(®s->TuneTrace);
2645 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2646 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2648 ecmd->maxtxpkt = readl(®s->TuneMaxTxDesc);
2649 ecmd->maxrxpkt = readl(®s->TuneMaxRxDesc);
2657 struct ace_regs __iomem *regs = ap->regs;
2660 link = readl(®s->GigLnkState);
2664 link = readl(®s->FastLnkState);
2703 writel(link, ®s->TuneLink);
2705 writel(link, ®s->TuneFastLink);
2711 ace_issue_cmd(regs, &cmd);
2738 struct ace_regs __iomem *regs = ap->regs;
2750 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2752 ®s->MacAddrLo);
2757 ace_issue_cmd(regs, &cmd);
2766 struct ace_regs __iomem *regs = ap->regs;
2773 ace_issue_cmd(regs, &cmd);
2779 ace_issue_cmd(regs, &cmd);
2787 ace_issue_cmd(regs, &cmd);
2793 ace_issue_cmd(regs, &cmd);
2807 ace_issue_cmd(regs, &cmd);
2812 ace_issue_cmd(regs, &cmd);
2821 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2831 static void __devinit ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2843 tdest = (void __iomem *) ®s->Window +
2845 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2858 static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2869 tdest = (void __iomem *) ®s->Window +
2871 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2894 struct ace_regs __iomem *regs = ap->regs;
2899 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2946 ace_clear(regs, 0x2000, 0x80000-0x2000);
2947 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2969 static void __devinit eeprom_start(struct ace_regs __iomem *regs)
2973 readl(®s->LocalCtrl);
2975 local = readl(®s->LocalCtrl);
2977 writel(local, ®s->LocalCtrl);
2978 readl(®s->LocalCtrl);
2982 writel(local, ®s->LocalCtrl);
2983 readl(®s->LocalCtrl);
2987 writel(local, ®s->LocalCtrl);
2988 readl(®s->LocalCtrl);
2992 writel(local, ®s->LocalCtrl);
2993 readl(®s->LocalCtrl);
2998 static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3004 local = readl(®s->LocalCtrl);
3007 writel(local, ®s->LocalCtrl);
3008 readl(®s->LocalCtrl);
3017 writel(local, ®s->LocalCtrl);
3018 readl(®s->LocalCtrl);
3023 writel(local, ®s->LocalCtrl);
3024 readl(®s->LocalCtrl);
3028 writel(local, ®s->LocalCtrl);
3029 readl(®s->LocalCtrl);
3035 static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3040 local = readl(®s->LocalCtrl);
3042 writel(local, ®s->LocalCtrl);
3043 readl(®s->LocalCtrl);
3047 writel(local, ®s->LocalCtrl);
3048 readl(®s->LocalCtrl);
3052 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3055 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3056 readl(®s->LocalCtrl);
3063 static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3068 local = readl(®s->LocalCtrl);
3070 writel(local, ®s->LocalCtrl);
3071 readl(®s->LocalCtrl);
3075 writel(local, ®s->LocalCtrl);
3076 readl(®s->LocalCtrl);
3080 writel(local, ®s->LocalCtrl);
3081 readl(®s->LocalCtrl);
3085 writel(local, ®s->LocalCtrl);
3086 readl(®s->LocalCtrl);
3090 writel(local, ®s->LocalCtrl);
3102 struct ace_regs __iomem *regs = ap->regs;
3114 eeprom_start(regs);
3116 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3117 if (eeprom_check_ack(regs)) {
3124 eeprom_prep(regs, (offset >> 8) & 0xff);
3125 if (eeprom_check_ack(regs)) {
3133 eeprom_prep(regs, offset & 0xff);
3134 if (eeprom_check_ack(regs)) {
3142 eeprom_start(regs);
3143 eeprom_prep(regs, EEPROM_READ_SELECT);
3144 if (eeprom_check_ack(regs)) {
3153 local = readl(®s->LocalCtrl);
3155 writel(local, ®s->LocalCtrl);
3156 readl(®s->LocalCtrl);
3160 writel(local, ®s->LocalCtrl);
3161 readl(®s->LocalCtrl);
3166 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3169 local = readl(®s->LocalCtrl);
3171 writel(local, ®s->LocalCtrl);
3172 readl(®s->LocalCtrl);
3177 writel(local, ®s->LocalCtrl);
3178 readl(®s->LocalCtrl);
3185 writel(local, ®s->LocalCtrl);
3186 readl(®s->LocalCtrl);
3189 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3190 readl(®s->LocalCtrl);
3192 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3193 readl(®s->LocalCtrl);
3196 eeprom_stop(regs);