Lines Matching refs:bp
48 static inline void bnx2x_exe_queue_init(struct bnx2x *bp,
79 static inline void bnx2x_exe_queue_free_elem(struct bnx2x *bp,
104 * @bp: driver handle
111 static inline int bnx2x_exe_queue_add(struct bnx2x *bp,
122 rc = o->optimize(bp, o->owner, elem);
127 rc = o->validate(bp, o->owner, elem);
142 bnx2x_exe_queue_free_elem(bp, elem);
151 struct bnx2x *bp,
161 bnx2x_exe_queue_free_elem(bp, elem);
165 static inline void bnx2x_exe_queue_reset_pending(struct bnx2x *bp,
171 __bnx2x_exe_queue_reset_pending(bp, o);
180 * @bp: driver handle
186 static inline int bnx2x_exe_queue_step(struct bnx2x *bp,
208 __bnx2x_exe_queue_reset_pending(bp, o);
246 rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags);
258 __bnx2x_exe_queue_reset_pending(bp, o);
275 struct bnx2x *bp)
304 * @bp: device handle
309 static inline int bnx2x_state_wait(struct bnx2x *bp, int state,
316 if (CHIP_REV_IS_EMUL(bp))
332 if (bp->panic)
345 static int bnx2x_raw_wait(struct bnx2x *bp, struct bnx2x_raw_obj *raw)
347 return bnx2x_state_wait(bp, raw->state, raw->pstate);
448 static int bnx2x_get_n_elements(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *o,
621 static inline void bnx2x_set_mac_in_nig(struct bnx2x *bp,
625 u32 reg_offset = BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM :
628 if (!IS_MF_SI(bp) || index > LLH_CAM_MAX_PF_LINE)
642 REG_WR_DMAE(bp, reg_offset, wb_data, 2);
645 REG_WR(bp, (BP_PORT(bp) ? NIG_REG_LLH1_FUNC_MEM_ENABLE :
652 * @bp: device handle
659 static inline void bnx2x_vlan_mac_set_cmd_hdr_e2(struct bnx2x *bp,
699 static void bnx2x_set_one_mac_e2(struct bnx2x *bp,
733 bnx2x_set_mac_in_nig(bp, add, mac,
736 bnx2x_set_mac_in_nig(bp, add, mac, LLH_CAM_ETH_LINE);
744 bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_MAC,
761 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
782 * @bp: device handle
790 static inline void bnx2x_vlan_mac_set_rdata_hdr_e1x(struct bnx2x *bp,
802 static inline void bnx2x_vlan_mac_set_cfg_entry_e1x(struct bnx2x *bp,
828 static inline void bnx2x_vlan_mac_set_rdata_e1x(struct bnx2x *bp,
835 bnx2x_vlan_mac_set_rdata_hdr_e1x(bp, o, type, cam_offset,
837 bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id,
848 * @bp: device handle
854 static void bnx2x_set_one_mac_e1x(struct bnx2x *bp,
872 bnx2x_vlan_mac_set_rdata_e1x(bp, o, BNX2X_FILTER_MAC_PENDING,
878 static void bnx2x_set_one_vlan_e2(struct bnx2x *bp,
897 bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_VLAN,
912 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
928 static void bnx2x_set_one_vlan_mac_e2(struct bnx2x *bp,
949 bnx2x_vlan_mac_set_cmd_hdr_e2(bp, o, add, CLASSIFY_RULE_OPCODE_PAIR,
964 bnx2x_vlan_mac_set_cmd_hdr_e2(bp,
986 * @bp: device handle
992 static void bnx2x_set_one_vlan_mac_e1h(struct bnx2x *bp,
1010 bnx2x_vlan_mac_set_rdata_e1x(bp, o, BNX2X_FILTER_VLAN_MAC_PENDING,
1023 * @bp: device handle
1039 static int bnx2x_vlan_mac_restore(struct bnx2x *bp,
1078 return bnx2x_config_vlan_mac(bp, p);
1141 * @bp: device handle
1151 static inline int bnx2x_validate_vlan_mac_add(struct bnx2x *bp,
1193 * @bp: device handle
1202 static inline int bnx2x_validate_vlan_mac_del(struct bnx2x *bp,
1254 * @bp: device handle
1263 static inline int bnx2x_validate_vlan_mac_move(struct bnx2x *bp,
1329 static int bnx2x_validate_vlan_mac(struct bnx2x *bp,
1335 return bnx2x_validate_vlan_mac_add(bp, qo, elem);
1337 return bnx2x_validate_vlan_mac_del(bp, qo, elem);
1339 return bnx2x_validate_vlan_mac_move(bp, qo, elem);
1345 static int bnx2x_remove_vlan_mac(struct bnx2x *bp,
1377 * @bp: device handle
1381 static int bnx2x_wait_vlan_mac(struct bnx2x *bp,
1390 rc = raw->wait_comp(bp, raw);
1407 * @bp: device handle
1413 static int bnx2x_complete_vlan_mac(struct bnx2x *bp,
1422 bnx2x_exe_queue_reset_pending(bp, &o->exe_queue);
1433 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags);
1448 * @bp: device handle
1452 static int bnx2x_optimize_vlan_mac(struct bnx2x *bp,
1498 bnx2x_exe_queue_free_elem(bp, pos);
1508 * @bp: device handle
1517 struct bnx2x *bp,
1563 * @bp: device handle
1570 static int bnx2x_execute_vlan_mac(struct bnx2x *bp,
1606 rc = bnx2x_vlan_mac_get_registry_elem(bp, cam_obj,
1621 o->set_one_rule(bp, o, elem, idx,
1639 rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid,
1696 struct bnx2x *bp,
1704 elem = bnx2x_exe_queue_alloc_elem(bp);
1721 return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore);
1727 * @bp: device handle
1732 struct bnx2x *bp,
1745 rc = bnx2x_vlan_mac_push_new_cmd(bp, p);
1766 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags);
1786 rc = raw->wait_comp(bp, raw);
1791 rc = bnx2x_exe_queue_step(bp, &o->exe_queue,
1808 * @bp: device handle
1818 static int bnx2x_vlan_mac_del_all(struct bnx2x *bp,
1836 rc = exeq->remove(bp, exeq->owner, exeq_pos);
1865 rc = bnx2x_config_vlan_mac(bp, &p);
1876 return bnx2x_config_vlan_mac(bp, &p);
1918 void bnx2x_init_mac_obj(struct bnx2x *bp,
1937 if (CHIP_IS_E1x(bp)) {
1945 bnx2x_exe_queue_init(bp,
1962 bnx2x_exe_queue_init(bp,
1972 void bnx2x_init_vlan_obj(struct bnx2x *bp,
1990 if (CHIP_IS_E1x(bp)) {
2002 bnx2x_exe_queue_init(bp,
2012 void bnx2x_init_vlan_mac_obj(struct bnx2x *bp,
2038 if (CHIP_IS_E1(bp)) {
2041 } else if (CHIP_IS_E1H(bp)) {
2049 bnx2x_exe_queue_init(bp,
2065 bnx2x_exe_queue_init(bp,
2078 static inline void __storm_memset_mac_filters(struct bnx2x *bp,
2087 __storm_memset_struct(bp, addr, size, (u32 *)mac_filters);
2090 static int bnx2x_set_rx_mode_e1x(struct bnx2x *bp,
2093 /* update the bp MAC filter structure */
2164 __storm_memset_mac_filters(bp, mac_filters, p->func_id);
2182 static inline void bnx2x_rx_mode_set_cmd_state_e2(struct bnx2x *bp,
2232 static int bnx2x_set_rx_mode_e2(struct bnx2x *bp,
2252 bnx2x_rx_mode_set_cmd_state_e2(bp, p->tx_accept_flags,
2264 bnx2x_rx_mode_set_cmd_state_e2(bp, p->rx_accept_flags,
2279 data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2285 bnx2x_rx_mode_set_cmd_state_e2(bp, p->tx_accept_flags,
2292 data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id);
2298 bnx2x_rx_mode_set_cmd_state_e2(bp, p->rx_accept_flags,
2324 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid,
2335 static int bnx2x_wait_rx_mode_comp_e2(struct bnx2x *bp,
2338 return bnx2x_state_wait(bp, p->state, p->pstate);
2341 static int bnx2x_empty_rx_mode_wait(struct bnx2x *bp,
2348 int bnx2x_config_rx_mode(struct bnx2x *bp,
2354 rc = p->rx_mode_obj->config_rx_mode(bp, p);
2360 rc = p->rx_mode_obj->wait_comp(bp, p);
2368 void bnx2x_init_rx_mode_obj(struct bnx2x *bp,
2371 if (CHIP_IS_E1x(bp)) {
2409 static int bnx2x_mcast_wait(struct bnx2x *bp,
2412 if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) ||
2413 o->raw.wait_comp(bp, &o->raw))
2419 static int bnx2x_mcast_enqueue_cmd(struct bnx2x *bp,
2550 static void bnx2x_mcast_set_one_rule_e2(struct bnx2x *bp,
2605 * @bp: device handle
2613 struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_bin,
2624 o->set_one_rule(bp, o, cnt, &cfg_data,
2643 static inline void bnx2x_mcast_hdl_pending_add_e2(struct bnx2x *bp,
2655 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
2678 static inline void bnx2x_mcast_hdl_pending_del_e2(struct bnx2x *bp,
2685 o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type);
2708 static inline void bnx2x_mcast_hdl_pending_restore_e2(struct bnx2x *bp,
2712 cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin,
2723 static inline int bnx2x_mcast_handle_pending_cmds_e2(struct bnx2x *bp,
2734 bnx2x_mcast_hdl_pending_add_e2(bp, o, cmd_pos, &cnt);
2738 bnx2x_mcast_hdl_pending_del_e2(bp, o, cmd_pos, &cnt);
2742 bnx2x_mcast_hdl_pending_restore_e2(bp, o, cmd_pos,
2767 static inline void bnx2x_mcast_hdl_add(struct bnx2x *bp,
2777 o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD);
2788 static inline void bnx2x_mcast_hdl_del(struct bnx2x *bp,
2795 o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL);
2809 * @bp: device handle
2818 static inline int bnx2x_mcast_handle_current_cmd(struct bnx2x *bp,
2829 bnx2x_mcast_hdl_add(bp, o, p, &cnt);
2833 bnx2x_mcast_hdl_del(bp, o, p, &cnt);
2837 o->hdl_restore(bp, o, 0, &cnt);
2851 static int bnx2x_mcast_validate_e2(struct bnx2x *bp,
2897 static void bnx2x_mcast_revert_e2(struct bnx2x *bp,
2910 * @bp: device handle
2914 static inline void bnx2x_mcast_set_rdata_hdr_e2(struct bnx2x *bp,
2930 * @bp: device handle
2938 static inline int bnx2x_mcast_refresh_registry_e2(struct bnx2x *bp,
2955 static int bnx2x_mcast_setup_e2(struct bnx2x *bp,
2968 cnt = bnx2x_mcast_handle_pending_cmds_e2(bp, p);
2981 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, cnt);
2992 bnx2x_mcast_set_rdata_hdr_e2(bp, p, (u8)cnt);
3010 bnx2x_mcast_refresh_registry_e2(bp, o);
3029 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_MULTICAST_RULES,
3041 static int bnx2x_mcast_validate_e1h(struct bnx2x *bp,
3052 static void bnx2x_mcast_revert_e1h(struct bnx2x *bp,
3064 static inline void bnx2x_mcast_hdl_add_e1h(struct bnx2x *bp,
3085 static inline void bnx2x_mcast_hdl_restore_e1h(struct bnx2x *bp,
3103 static int bnx2x_mcast_setup_e1h(struct bnx2x *bp,
3122 bnx2x_mcast_hdl_add_e1h(bp, o, p, mc_filter);
3135 bnx2x_mcast_hdl_restore_e1h(bp, o, p, mc_filter);
3145 REG_WR(bp, MC_HASH_OFFSET(bp, i), mc_filter[i]);
3157 static int bnx2x_mcast_validate_e1(struct bnx2x *bp,
3213 static void bnx2x_mcast_revert_e1(struct bnx2x *bp,
3229 static void bnx2x_mcast_set_one_rule_e1(struct bnx2x *bp,
3259 * @bp: device handle
3263 static inline void bnx2x_mcast_set_rdata_hdr_e1(struct bnx2x *bp,
3271 u8 offset = (CHIP_REV_IS_SLOW(bp) ?
3285 * @bp: device handle
3296 struct bnx2x *bp, struct bnx2x_mcast_obj *o , int start_idx,
3306 o->set_one_rule(bp, o, i, &cfg_data, BNX2X_MCAST_CMD_RESTORE);
3321 struct bnx2x *bp, struct bnx2x_mcast_ramrod_params *p)
3342 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type);
3357 o->hdl_restore(bp, o, 0, &cnt);
3393 * @bp: device handle
3401 static inline int bnx2x_mcast_refresh_registry_e1(struct bnx2x *bp,
3448 static int bnx2x_mcast_setup_e1(struct bnx2x *bp,
3468 cnt = bnx2x_mcast_handle_pending_cmds_e1(bp, p);
3476 cnt = bnx2x_mcast_handle_current_cmd(bp, p, cmd, 0);
3488 bnx2x_mcast_set_rdata_hdr_e1(bp, p, (u8)cnt);
3496 rc = bnx2x_mcast_refresh_registry_e1(bp, o);
3517 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, raw->cid,
3552 int bnx2x_config_mcast(struct bnx2x *bp,
3566 rc = o->validate(bp, p, cmd);
3583 rc = o->enqueue_cmd(bp, p->mcast_obj, p, cmd);
3599 rc = o->config_mcast(bp, p, cmd);
3605 rc = o->wait_comp(bp, o);
3614 o->revert(bp, p, old_reg_size);
3643 void bnx2x_init_mcast_obj(struct bnx2x *bp,
3663 if (CHIP_IS_E1(bp)) {
3670 if (CHIP_REV_IS_SLOW(bp))
3689 } else if (CHIP_IS_E1H(bp)) {
3942 void bnx2x_init_mac_credit_pool(struct bnx2x *bp,
3951 if (CHIP_IS_E1(bp)) {
3953 if (!CHIP_REV_IS_SLOW(bp))
3960 } else if (CHIP_IS_E1H(bp)) {
3965 if (!CHIP_REV_IS_SLOW(bp))
3982 if (!CHIP_REV_IS_SLOW(bp))
4000 void bnx2x_init_vlan_credit_pool(struct bnx2x *bp,
4005 if (CHIP_IS_E1x(bp)) {
4029 * @bp: driver hanlde
4034 static inline void bnx2x_debug_print_ind_table(struct bnx2x *bp,
4058 * @bp: device handle
4063 static int bnx2x_setup_rss(struct bnx2x *bp,
4130 if (netif_msg_ifup(bp))
4131 bnx2x_debug_print_ind_table(bp, p);
4149 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_RSS_UPDATE, r->cid,
4166 int bnx2x_config_rss(struct bnx2x *bp,
4179 rc = o->config_rss(bp, p);
4186 rc = r->wait_comp(bp, r);
4192 void bnx2x_init_rss_config_obj(struct bnx2x *bp,
4211 * @bp: device handle
4220 int bnx2x_queue_state_change(struct bnx2x *bp,
4228 if (o->check_transition(bp, o, params))
4236 o->complete_cmd(bp, o, pending_bit);
4239 rc = o->send_cmd(bp, params);
4248 rc = o->wait_comp(bp, o, pending_bit);
4278 static int bnx2x_queue_wait_comp(struct bnx2x *bp,
4282 return bnx2x_state_wait(bp, cmd, &o->pending);
4288 * @bp: device handle
4294 static int bnx2x_queue_comp_cmd(struct bnx2x *bp,
4338 static void bnx2x_q_fill_setup_data_e2(struct bnx2x *bp,
4351 static void bnx2x_q_fill_init_general_data(struct bnx2x *bp,
4496 static void bnx2x_q_fill_setup_data_cmn(struct bnx2x *bp,
4500 bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj,
4521 static void bnx2x_q_fill_setup_tx_only(struct bnx2x *bp,
4525 bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj,
4542 * @bp: device handle
4550 static inline int bnx2x_q_init(struct bnx2x *bp,
4563 bnx2x_update_coalesce_sb_index(bp, init->tx.fw_sb_id,
4574 bnx2x_update_coalesce_sb_index(bp, init->rx.fw_sb_id,
4585 bnx2x_set_ctx_validation(bp, init->cxts[cos], o->cids[cos]);
4589 o->complete_cmd(bp, o, BNX2X_Q_CMD_INIT);
4597 static inline int bnx2x_q_send_setup_e1x(struct bnx2x *bp,
4610 bnx2x_q_fill_setup_data_cmn(bp, params, rdata);
4620 return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX],
4625 static inline int bnx2x_q_send_setup_e2(struct bnx2x *bp,
4638 bnx2x_q_fill_setup_data_cmn(bp, params, rdata);
4639 bnx2x_q_fill_setup_data_e2(bp, params, rdata);
4649 return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX],
4654 static inline int bnx2x_q_send_setup_tx_only(struct bnx2x *bp,
4681 bnx2x_q_fill_setup_tx_only(bp, params, rdata);
4697 return bnx2x_sp_post(bp, ramrod, o->cids[cid_index],
4702 static void bnx2x_q_fill_update_data(struct bnx2x *bp,
4761 static inline int bnx2x_q_send_update(struct bnx2x *bp,
4783 bnx2x_q_fill_update_data(bp, o, update_params, rdata);
4793 return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_CLIENT_UPDATE,
4801 * @bp: device handle
4806 static inline int bnx2x_q_send_deactivate(struct bnx2x *bp,
4815 return bnx2x_q_send_update(bp, params);
4821 * @bp: device handle
4826 static inline int bnx2x_q_send_activate(struct bnx2x *bp,
4836 return bnx2x_q_send_update(bp, params);
4839 static inline int bnx2x_q_send_update_tpa(struct bnx2x *bp,
4846 static inline int bnx2x_q_send_halt(struct bnx2x *bp,
4851 return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_HALT,
4856 static inline int bnx2x_q_send_cfc_del(struct bnx2x *bp,
4868 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_CFC_DEL,
4872 static inline int bnx2x_q_send_terminate(struct bnx2x *bp,
4884 return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_TERMINATE,
4888 static inline int bnx2x_q_send_empty(struct bnx2x *bp,
4893 return bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_EMPTY,
4898 static inline int bnx2x_queue_send_cmd_cmn(struct bnx2x *bp,
4903 return bnx2x_q_init(bp, params);
4905 return bnx2x_q_send_setup_tx_only(bp, params);
4907 return bnx2x_q_send_deactivate(bp, params);
4909 return bnx2x_q_send_activate(bp, params);
4911 return bnx2x_q_send_update(bp, params);
4913 return bnx2x_q_send_update_tpa(bp, params);
4915 return bnx2x_q_send_halt(bp, params);
4917 return bnx2x_q_send_cfc_del(bp, params);
4919 return bnx2x_q_send_terminate(bp, params);
4921 return bnx2x_q_send_empty(bp, params);
4928 static int bnx2x_queue_send_cmd_e1x(struct bnx2x *bp,
4933 return bnx2x_q_send_setup_e1x(bp, params);
4944 return bnx2x_queue_send_cmd_cmn(bp, params);
4951 static int bnx2x_queue_send_cmd_e2(struct bnx2x *bp,
4956 return bnx2x_q_send_setup_e2(bp, params);
4967 return bnx2x_queue_send_cmd_cmn(bp, params);
4977 * @bp: device handle
4990 static int bnx2x_queue_chk_transition(struct bnx2x *bp,
5155 void bnx2x_init_queue_obj(struct bnx2x *bp,
5175 if (CHIP_IS_E1x(bp))
5187 void bnx2x_queue_set_cos_cid(struct bnx2x *bp,
5195 enum bnx2x_func_state bnx2x_func_get_state(struct bnx2x *bp,
5211 static int bnx2x_func_wait_comp(struct bnx2x *bp,
5215 return bnx2x_state_wait(bp, cmd, &o->pending);
5221 * @bp: device handle
5228 static inline int bnx2x_func_state_change_comp(struct bnx2x *bp,
5236 "pending 0x%lx, next_state %d\n", cmd, BP_FUNC(bp),
5243 cmd, BP_FUNC(bp), o->next_state);
5262 * @bp: device handle
5268 static int bnx2x_func_comp_cmd(struct bnx2x *bp,
5275 int rc = bnx2x_func_state_change_comp(bp, o, cmd);
5282 * @bp: device handle
5294 static int bnx2x_func_chk_transition(struct bnx2x *bp,
5364 * @bp: device handle
5371 static inline int bnx2x_func_init_func(struct bnx2x *bp,
5374 return drv->init_hw_func(bp);
5380 * @bp: device handle
5388 static inline int bnx2x_func_init_port(struct bnx2x *bp,
5391 int rc = drv->init_hw_port(bp);
5395 return bnx2x_func_init_func(bp, drv);
5401 * @bp: device handle
5408 static inline int bnx2x_func_init_cmn_chip(struct bnx2x *bp,
5411 int rc = drv->init_hw_cmn_chip(bp);
5415 return bnx2x_func_init_port(bp, drv);
5421 * @bp: device handle
5428 static inline int bnx2x_func_init_cmn(struct bnx2x *bp,
5431 int rc = drv->init_hw_cmn(bp);
5435 return bnx2x_func_init_port(bp, drv);
5438 static int bnx2x_func_hw_init(struct bnx2x *bp,
5447 BP_ABS_FUNC(bp), load_code);
5450 rc = drv->gunzip_init(bp);
5455 rc = drv->init_fw(bp);
5464 rc = bnx2x_func_init_cmn_chip(bp, drv);
5470 rc = bnx2x_func_init_cmn(bp, drv);
5476 rc = bnx2x_func_init_port(bp, drv);
5482 rc = bnx2x_func_init_func(bp, drv);
5493 drv->gunzip_end(bp);
5499 o->complete_cmd(bp, o, BNX2X_F_CMD_HW_INIT);
5507 * @bp: device handle
5513 static inline void bnx2x_func_reset_func(struct bnx2x *bp,
5516 drv->reset_hw_func(bp);
5522 * @bp: device handle
5534 static inline void bnx2x_func_reset_port(struct bnx2x *bp,
5537 drv->reset_hw_port(bp);
5538 bnx2x_func_reset_func(bp, drv);
5544 * @bp: device handle
5551 static inline void bnx2x_func_reset_cmn(struct bnx2x *bp,
5554 bnx2x_func_reset_port(bp, drv);
5555 drv->reset_hw_cmn(bp);
5559 static inline int bnx2x_func_hw_reset(struct bnx2x *bp,
5566 DP(BNX2X_MSG_SP, "function %d reset_phase %x\n", BP_ABS_FUNC(bp),
5571 bnx2x_func_reset_cmn(bp, drv);
5574 bnx2x_func_reset_port(bp, drv);
5577 bnx2x_func_reset_func(bp, drv);
5586 o->complete_cmd(bp, o, BNX2X_F_CMD_HW_RESET);
5591 static inline int bnx2x_func_send_start(struct bnx2x *bp,
5605 rdata->path_id = BP_PATH(bp);
5616 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_START, 0,
5621 static inline int bnx2x_func_send_stop(struct bnx2x *bp,
5624 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_STOP, 0, 0, 0,
5628 static inline int bnx2x_func_send_tx_stop(struct bnx2x *bp,
5631 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC, 0, 0, 0,
5634 static inline int bnx2x_func_send_tx_start(struct bnx2x *bp,
5655 return bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC, 0,
5660 static int bnx2x_func_send_cmd(struct bnx2x *bp,
5665 return bnx2x_func_hw_init(bp, params);
5667 return bnx2x_func_send_start(bp, params);
5669 return bnx2x_func_send_stop(bp, params);
5671 return bnx2x_func_hw_reset(bp, params);
5673 return bnx2x_func_send_tx_stop(bp, params);
5675 return bnx2x_func_send_tx_start(bp, params);
5682 void bnx2x_init_func_obj(struct bnx2x *bp,
5705 * @bp: device handle
5715 int bnx2x_func_state_change(struct bnx2x *bp,
5726 if (o->check_transition(bp, o, params)) {
5736 bnx2x_func_state_change_comp(bp, o, cmd);
5740 rc = o->send_cmd(bp, params);
5752 rc = o->wait_comp(bp, o, cmd);