Lines Matching defs:REGISTERS_BASE
28 #define REGISTERS_BASE 0x00300000
44 #define SOR_CFG (REGISTERS_BASE + 0x0800)
45 #define ECPU_CTRL (REGISTERS_BASE + 0x0804)
46 #define HI_CFG (REGISTERS_BASE + 0x0808)
49 #define EE_START (REGISTERS_BASE + 0x080C)
50 #define EE_CTL (REGISTERS_BASE + 0x2000)
51 #define EE_DATA (REGISTERS_BASE + 0x2004)
52 #define EE_ADDR (REGISTERS_BASE + 0x2008)
56 #define CHIP_ID_B (REGISTERS_BASE + 0x5674)
62 #define ENABLE (REGISTERS_BASE + 0x5450)
65 #define ELP_CFG_MODE (REGISTERS_BASE + 0x5804)
66 #define ELP_CMD (REGISTERS_BASE + 0x5808)
67 #define PLL_CAL_TIME (REGISTERS_BASE + 0x5810)
68 #define CLK_REQ_TIME (REGISTERS_BASE + 0x5814)
69 #define CLK_BUF_TIME (REGISTERS_BASE + 0x5818)
71 #define CFG_PLL_SYNC_CNT (REGISTERS_BASE + 0x5820)
74 #define SCR_PAD0 (REGISTERS_BASE + 0x5608)
75 #define SCR_PAD1 (REGISTERS_BASE + 0x560C)
76 #define SCR_PAD2 (REGISTERS_BASE + 0x5610)
77 #define SCR_PAD3 (REGISTERS_BASE + 0x5614)
78 #define SCR_PAD4 (REGISTERS_BASE + 0x5618)
79 #define SCR_PAD4_SET (REGISTERS_BASE + 0x561C)
80 #define SCR_PAD4_CLR (REGISTERS_BASE + 0x5620)
81 #define SCR_PAD5 (REGISTERS_BASE + 0x5624)
82 #define SCR_PAD5_SET (REGISTERS_BASE + 0x5628)
83 #define SCR_PAD5_CLR (REGISTERS_BASE + 0x562C)
84 #define SCR_PAD6 (REGISTERS_BASE + 0x5630)
85 #define SCR_PAD7 (REGISTERS_BASE + 0x5634)
86 #define SCR_PAD8 (REGISTERS_BASE + 0x5638)
87 #define SCR_PAD9 (REGISTERS_BASE + 0x563C)
90 #define SPARE_A1 (REGISTERS_BASE + 0x0994)
91 #define SPARE_A2 (REGISTERS_BASE + 0x0998)
92 #define SPARE_A3 (REGISTERS_BASE + 0x099C)
93 #define SPARE_A4 (REGISTERS_BASE + 0x09A0)
94 #define SPARE_A5 (REGISTERS_BASE + 0x09A4)
95 #define SPARE_A6 (REGISTERS_BASE + 0x09A8)
96 #define SPARE_A7 (REGISTERS_BASE + 0x09AC)
97 #define SPARE_A8 (REGISTERS_BASE + 0x09B0)
98 #define SPARE_B1 (REGISTERS_BASE + 0x5420)
99 #define SPARE_B2 (REGISTERS_BASE + 0x5424)
100 #define SPARE_B3 (REGISTERS_BASE + 0x5428)
101 #define SPARE_B4 (REGISTERS_BASE + 0x542C)
102 #define SPARE_B5 (REGISTERS_BASE + 0x5430)
103 #define SPARE_B6 (REGISTERS_BASE + 0x5434)
104 #define SPARE_B7 (REGISTERS_BASE + 0x5438)
105 #define SPARE_B8 (REGISTERS_BASE + 0x543C)
378 #define EE_CTL (REGISTERS_BASE + 0x2000)
389 #define EE_ADDR (REGISTERS_BASE + 0x2008)
399 #define EE_DATA (REGISTERS_BASE + 0x2004)