Cross Reference: /drivers/scsi/atari

Lines Matching refs:NCR5380_read
222  * NCR5380_read(register)  - read from the specified register
571 	data = NCR5380_read(CURRENT_SCSI_DATA_REG);
572 	status = NCR5380_read(STATUS_REG);
573 	mr = NCR5380_read(MODE_REG);
574 	icr = NCR5380_read(INITIATOR_COMMAND_REG);
575 	basr = NCR5380_read(BUS_AND_STATUS_REG);
618 	status = NCR5380_read(STATUS_REG);
1227 			if ((NCR5380_read(BUS_AND_STATUS_REG) &
1230 				saved_data = NCR5380_read(INPUT_DATA_REG);
1238 		   HOSTNO, NCR5380_read(BUS_AND_STATUS_REG),
1239 		   NCR5380_read(STATUS_REG));
1241 	(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1254 		if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
1292 	basr = NCR5380_read(BUS_AND_STATUS_REG);
1297 		if ((NCR5380_read(STATUS_REG) & (SR_SEL|SR_IO)) == (SR_SEL|SR_IO)) {
1302 			(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1305 			(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1306 		} else if ((NCR5380_read(STATUS_REG) & SR_RST) == SR_RST) {
1308 			(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1322 			if ((NCR5380_read(MODE_REG) & MR_DMA_MODE) &&
1337 					       HOSTNO, basr, NCR5380_read(MODE_REG),
1338 					       NCR5380_read(STATUS_REG));
1339 				(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1346 		       NCR5380_read(MODE_REG), NCR5380_read(STATUS_REG));
1347 		(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1454 		while (!(NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_PROGRESS) &&
1465 	while (!(NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_PROGRESS) &&
1486 	if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1487 	    (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1488 	    (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1502 	if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1613 	       !(NCR5380_read(STATUS_REG) & (SR_BSY | SR_IO)))
1616 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1625 	while (time_before(jiffies, timeout) && !(NCR5380_read(STATUS_REG) & SR_BSY))
1639 	if (!(NCR5380_read(STATUS_REG) & SR_BSY)) {
1681 	while (!(NCR5380_read(STATUS_REG) & SR_REQ))
1762 		while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ))
1778 			*d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1807 		while (NCR5380_read(STATUS_REG) & SR_REQ)
1835 	tmp = NCR5380_read(STATUS_REG);
1878 	while (!((tmp = NCR5380_read(STATUS_REG)) & SR_REQ))
1886 		while (NCR5380_read(STATUS_REG) & SR_REQ)
1937 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
2019 		tmp = NCR5380_read(STATUS_REG);
2033 				while (NCR5380_read(STATUS_REG) & SR_REQ)
2277 					while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2335 					while ((NCR5380_read(STATUS_REG) & SR_BSY) && !hostdata->connected)
2519 	target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2534 	while (NCR5380_read(STATUS_REG) & SR_SEL)
2542 	while (!(NCR5380_read(STATUS_REG) & SR_REQ))
2669 		    NCR5380_read(BUS_AND_STATUS_REG),
2670 		    NCR5380_read(STATUS_REG));
2874 		      PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG)));
2885 	(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);