Lines Matching refs:regs
30 #define mr32(reg) readl(regs + reg)
31 #define mw32(reg, val) writel((val), regs + reg)
37 #define iow32(reg, val) outl(val, (unsigned long)(regs + reg))
38 #define ior32(reg) inl((unsigned long)(regs + reg))
39 #define iow16(reg, val) outw((unsigned long)(val, regs + reg))
40 #define ior16(reg) inw((unsigned long)(regs + reg))
41 #define iow8(reg, val) outb((unsigned long)(val, regs + reg))
42 #define ior8(reg) inb((unsigned long)(regs + reg))
46 void __iomem *regs = mvi->regs;
53 void __iomem *regs = mvi->regs;
60 void __iomem *regs = mvi->regs;
67 void __iomem *regs = mvi->regs;
77 void __iomem *regs = mvi->regs + off;
78 void __iomem *regs2 = mvi->regs + off2;
79 return (port < 4) ? readl(regs + port * 8) :
86 void __iomem *regs = mvi->regs + off;
87 void __iomem *regs2 = mvi->regs + off2;
89 writel(val, regs + port * 8);
190 void __iomem *regs = mvi->regs;
199 void __iomem *regs = mvi->regs;
223 void __iomem *regs = mvi->regs;
229 void __iomem *regs = mvi->regs;