Searched defs:LVDS (Results 1 - 4 of 4) sorted by relevance

/drivers/video/nvidia/
H A Dnv_type.h134 int LVDS; member in struct:nvidia_par
/drivers/video/intelfb/
H A Dintelfbhw.h18 /* Information about DVO/LVDS Ports */
268 #define LVDS 0x61180 macro
/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h166 * - LVDS/DVOB/DVOC on
225 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
403 * This register controls the LVDS output enable, pipe selection, and data
408 #define LVDS 0x61180 macro
410 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
411 * the DPLL semantics change when the LVDS is assigned to that pipe.
414 /* Selects pipe B for LVDS data. Must be set on pre-965. */
772 /* #define LVDS 0x61180 */
1295 #define SB_P2_14 2 /* LVDS single */
1296 #define SB_P2_7 3 /* LVDS doubl
[all...]
/drivers/gpu/drm/i915/
H A Di915_reg.h779 #define LVDS 0x61180 macro
786 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
1478 /* LVDS port control */
1479 #define LVDS 0x61180 macro
1481 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
1482 * the DPLL semantics change when the LVDS is assigned to that pipe.
1485 /* Selects pipe B for LVDS data. Must be set on pre-965. */
1489 /* LVDS dithering flag on 965/g4x platform */
1491 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
1553 * - LVDS/DVO
[all...]

Completed in 123 milliseconds