Searched defs:mii_control (Results 1 - 4 of 4) sorted by relevance

/drivers/net/ethernet/amd/
H A Dau1000_eth.h80 u32 mii_control; member in struct:mac_reg
H A Dau1000_eth.c174 u32 *const mii_control_reg = &aup->mac->mii_control;
177 u32 mii_control; local
187 mii_control = MAC_SET_MII_SELECT_REG(reg) |
190 writel(mii_control, mii_control_reg);
207 u32 *const mii_control_reg = &aup->mac->mii_control;
210 u32 mii_control; local
220 mii_control = MAC_SET_MII_SELECT_REG(reg) |
224 writel(mii_control, mii_control_reg);
/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c4738 u16 mii_control; local
4742 MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control);
4748 (mii_control |
4761 &mii_control);
4763 if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) {
5075 u16 mii_control; local
5084 &mii_control);
5089 (mii_control |
5097 &mii_control);
5099 "bnx2x_restart_autoneg mii_control befor
5136 u16 mii_control; local
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/drivers/net/ethernet/nvidia/
H A Dforcedeth.c1392 u32 mii_status, mii_control, mii_control_1000, reg; local
1462 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1463 mii_control |= BMCR_ANENABLE;
1469 mii_control |= BMCR_ANRESTART;
1470 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
1479 if (phy_reset(dev, mii_control)) {
1522 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1523 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
1525 mii_control |= BMCR_PDOWN;
1526 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))
5956 u16 phy_reserved, mii_control; local
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