Searched refs:CSR11 (Results 1 - 10 of 10) sorted by relevance
/drivers/net/ethernet/dec/tulip/ |
H A D | interrupt.c | 295 iowrite32(mit_table[MIT_TABLE], tp->base_addr + CSR11); 301 iowrite32(0, tp->base_addr + CSR11); 735 iowrite32(0x8b240000, ioaddr + CSR11); 744 iowrite32(0x0012, ioaddr + CSR11); 784 if (tp->ttimer == 0 || (ioread32(ioaddr + CSR11) & 0xffff) == 0) { 792 iowrite32(12, ioaddr + CSR11);
|
H A D | tulip.h | 117 CSR11 = 0x58, enumerator in enum:tulip_offsets
|
H A D | xircom_cb.c | 58 #define CSR11 0x58 macro
|
H A D | de2104x.c | 136 /* This is a mysterious value that can be written to CSR11 in the 21040 (only) 154 CSR11 = 0x58, enumerator in enum:__anon2120 927 dw32(CSR11, FULL_DUPLEX_MAGIC);
|
/drivers/net/ethernet/amd/ |
H A D | ariadne.h | 71 #define CSR11 0x0b00 /* - Logical Address Filter, LADRF[63:48] */ macro
|
H A D | ariadne.c | 439 lance->RAP = CSR11; /* Logical Address Filter, LADRF[63:48] */
|
/drivers/net/wireless/rt2x00/ |
H A D | rt2400pci.c | 374 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 376 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 512 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 517 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 570 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 573 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
|
H A D | rt2500pci.c | 380 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 382 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 561 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 566 rt2x00pci_register_write(rt2x00dev, CSR11, reg); 928 rt2x00pci_register_read(rt2x00dev, CSR11, ®); 930 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
|
H A D | rt2400pci.h | 166 * CSR11: Back-off control register. 173 #define CSR11 0x002c macro
|
H A D | rt2500pci.h | 241 * CSR11: Back-off control register. 249 #define CSR11 0x002c macro
|
Completed in 140 milliseconds