Searched refs:MIR1 (Results 1 - 3 of 3) sorted by relevance
| /drivers/edac/ |
| H A D | i5000_edac.c | 67 #define MIR1 0x84 macro
1151 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
1162 debugf2("MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0);
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| H A D | i5400_edac.c | 75 #define MIR1 0x84 macro
1048 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
1058 debugf2("MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0);
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| H A D | i7300_edac.c | 148 #define MIR1 0x84 macro
903 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR1,
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