Searched refs:R4 (Results 1 - 16 of 16) sorted by relevance

/drivers/edac/
H A Dmce_amd.h31 #define R4(x) (((x) >> 4) & 0xf) macro
32 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
H A Dmce_amd.c151 if (R4(ec) == R4_GEN && LL(ec) == LL_L1) {
170 u8 r4 = R4(ec);
300 switch (R4(ec)) {
325 u8 r4 = R4(ec);
409 u8 r4 = R4(ec);
484 u8 r4 = R4(ec);
/drivers/tty/serial/
H A Dsunzilog.c202 write_zsreg(channel, R4, regs[R4]);
875 up->curregs[R4] &= ~XCLK_MASK;
876 up->curregs[R4] |= X16CLK;
907 up->curregs[R4] &= ~0x0c;
909 up->curregs[R4] |= SB2;
911 up->curregs[R4] |= SB1;
913 up->curregs[R4] |= PAR_ENAB;
915 up->curregs[R4] &= ~PAR_ENAB;
917 up->curregs[R4] |
[all...]
H A Dzs.h63 #define R4 4 macro
H A Dip22zilog.c184 write_zsreg(channel, R4, regs[R4]);
810 up->curregs[R4] &= ~XCLK_MASK;
811 up->curregs[R4] |= X16CLK;
1139 up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
H A Dip22zilog.h42 #define R4 4 macro
H A Dsunzilog.h34 #define R4 4 macro
H A Dpmac_zilog.c150 write_zsreg(uap, R4, regs[R4]);
870 uap->curregs[R4] = X16CLK | SB1;
1020 uap->curregs[R4] = X1CLK;
1029 uap->curregs[R4] = X16CLK;
1034 uap->curregs[R4] = X32CLK;
1039 uap->curregs[R4] = X16CLK;
H A Dpmac_zilog.h130 #define R4 4 macro
H A Dzs.c274 write_zsreg(zport, R4, regs[4]);
/drivers/net/hamradio/
H A Dz8530.h10 #define R4 4 macro
H A Ddmascc.c762 write_scc(priv, R4, SDLC | X1CLK);
H A Dscc.c800 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
/drivers/net/wan/
H A Dz85230.h29 #define R4 4 macro
/drivers/net/wireless/iwlegacy/
H A D4965.c1665 u32 R4; local
1673 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1679 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1686 * with an updated temperature, use R4 provided to us in the
1690 vt = sign_extend32(R4, 23);
1696 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
/drivers/zorro/
H A Dzorro.ids141 0b60 Combo 030 R4 [Accelerator]
142 0b70 Combo 030 R4 [Accelerator and SCSI Host Adapter]

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