Searched refs:RADEON_TV_PLL_CNTL1 (Results 1 - 2 of 2) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| H A D | radeon_legacy_tv.c | 770 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL);
772 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET);
776 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET);
781 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf);
782 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL);
784 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK);
785 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);
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| H A D | radeon_reg.h | 3637 #define RADEON_TV_PLL_CNTL1 0x0022 /* PLL */ macro
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