Searched refs:X1CLK (Results 1 - 11 of 11) sorted by relevance
/drivers/net/hamradio/ |
H A D | z8530.h | 81 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | dmascc.c | 762 write_scc(priv, R4, SDLC | X1CLK);
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H A D | scc.c | 800 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
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/drivers/tty/serial/ |
H A D | zs.h | 134 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | ip22zilog.h | 115 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | sunzilog.h | 107 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | pmac_zilog.h | 205 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | pmac_zilog.c | 806 write_zsreg(uap, 4, X1CLK | MONSYNC); 1020 uap->curregs[R4] = X1CLK;
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H A D | zs.c | 908 zport->regs[4] |= X1CLK;
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/drivers/net/wan/ |
H A D | z85230.h | 102 #define X1CLK 0x0 /* x1 clock mode */ macro
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H A D | z85230.c | 218 4, SYNC_ENAB|SDLC|X1CLK, 243 4, SYNC_ENAB|SDLC|X1CLK,
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