Searched refs:X1CLK (Results 1 - 11 of 11) sorted by relevance

/drivers/net/hamradio/
H A Dz8530.h81 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Ddmascc.c762 write_scc(priv, R4, SDLC | X1CLK);
H A Dscc.c800 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */
/drivers/tty/serial/
H A Dzs.h134 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Dip22zilog.h115 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Dsunzilog.h107 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Dpmac_zilog.h205 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Dpmac_zilog.c806 write_zsreg(uap, 4, X1CLK | MONSYNC);
1020 uap->curregs[R4] = X1CLK;
H A Dzs.c908 zport->regs[4] |= X1CLK;
/drivers/net/wan/
H A Dz85230.h102 #define X1CLK 0x0 /* x1 clock mode */ macro
H A Dz85230.c218 4, SYNC_ENAB|SDLC|X1CLK,
243 4, SYNC_ENAB|SDLC|X1CLK,

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