Searched refs:channel_offset (Results 1 - 7 of 7) sorted by relevance
/drivers/staging/comedi/drivers/ |
H A D | unioxx5.c | 227 int channel_offset, flags, channel = CR_CHAN(insn->chanspec), type; local 240 channel_offset = __unioxx5_define_chan_offset(channel); 241 if (channel_offset < 0) { 249 flags = usp->usp_prev_cn_val[channel_offset - 1]; 269 outb(flags, usp->usp_iobase + channel_offset); 273 usp->usp_prev_cn_val[channel_offset - 1] = flags; 368 int channel_offset, val; local 371 channel_offset = __unioxx5_define_chan_offset(channel); 372 if (channel_offset < 0) { 380 val = usp->usp_prev_wr_val[channel_offset 398 int channel_offset, mask = 1 << (channel & 0x07); local 515 int chan_a, chan_b, conf, channel_offset; local [all...] |
/drivers/ide/ |
H A D | triflex.c | 42 u8 channel_offset = hwif->channel ? 0x74 : 0x70, unit = drive->dn & 1; local 44 pci_read_config_dword(dev, channel_offset, &triflex_timings); 81 pci_write_config_dword(dev, channel_offset, triflex_timings);
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/drivers/ata/ |
H A D | pata_triflex.c | 91 int channel_offset = ap->port_no ? 0x74: 0x70; local 95 pci_read_config_dword(pdev, channel_offset, &old_triflex_timing); 127 pci_write_config_dword(pdev, channel_offset, triflex_timing);
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/drivers/clocksource/ |
H A D | sh_mtu2.c | 73 return ioread8(base + cfg->channel_offset); 91 iowrite8(value, base + cfg->channel_offset);
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H A D | sh_tmu.c | 61 return ioread8(base - cfg->channel_offset); 79 iowrite8(value, base - cfg->channel_offset);
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H A D | sh_cmt.c | 71 base -= cfg->channel_offset; 95 base -= cfg->channel_offset;
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/drivers/leds/ |
H A D | leds-renesas-tpu.c | 73 return ioread16(base - cfg->channel_offset); 86 iowrite16(value, base - cfg->channel_offset);
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