Searched refs:ctl (Results 1 - 25 of 193) sorted by relevance

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/drivers/ide/
H A Dide-legacy.c9 unsigned long base, ctl; local
14 ctl = 0x3f6;
18 ctl = 0x376;
28 if (!request_region(ctl, 1, d->name)) {
30 d->name, ctl);
35 ide_std_init_ports(hw, base, ctl);
H A Dide-pnp.c39 unsigned long base, ctl; local
49 ctl = pnp_port_start(dev, 1);
57 if (!request_region(ctl, 1, DRV_NAME)) {
59 DRV_NAME, ctl);
65 ide_std_init_ports(&hw, base, ctl);
76 release_region(ctl, 1);
H A Dide-4drives.c33 unsigned long base = 0x1f0, ctl = 0x3f6; local
45 if (!request_region(ctl, 1, DRV_NAME)) {
47 DRV_NAME, ctl);
54 ide_std_init_ports(&hw, base, ctl);
H A Dbuddha.c122 unsigned long ctl, unsigned long irq_port)
133 hw->io_ports.ctl_addr = ctl;
212 unsigned long base, ctl, irq_port; local
216 ctl = base + BUDDHA_CONTROL;
221 ctl = 0;
225 buddha_setup_ports(&hw[i], base, ctl, irq_port);
121 buddha_setup_ports(struct ide_hw *hw, unsigned long base, unsigned long ctl, unsigned long irq_port) argument
H A Dtx4939ide.c152 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); local
154 if (ctl & TX4939IDE_INT_BUSERR) {
164 if (ctl & (TX4939IDE_INT_ADDRERR |
167 hwif->name, ctl,
168 ctl & TX4939IDE_INT_ADDRERR ? " Address-Error" : "",
169 ctl & TX4939IDE_INT_DEVTIMING ? " DEV-Timing" : "",
170 ctl & TX4939IDE_INT_BUSERR ? " Bus-Error" : "");
171 return ctl;
178 u16 ctl; local
188 ctl
320 u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); local
347 u16 ctl, ide_int; local
[all...]
/drivers/net/ethernet/chelsio/cxgb/
H A Dmv88e1xxx.c49 u32 ctl; local
55 (void) simple_mdio_read(cphy, MII_BMCR, &ctl);
56 ctl &= BMCR_RESET;
57 if (ctl)
59 } while (ctl && --time_out);
61 return ctl ? -1 : 0;
126 u32 ctl; local
128 (void) simple_mdio_read(phy, MII_BMCR, &ctl);
130 ctl &= ~(BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE);
132 ctl |
162 u32 ctl; local
175 u32 ctl; local
[all...]
/drivers/char/hw_random/
H A Docteon-rng.c31 union cvmx_rnm_ctl_status ctl; local
34 ctl.u64 = 0;
35 ctl.s.ent_en = 1; /* Enable the entropy source. */
36 ctl.s.rng_en = 1; /* Enable the RNG hardware. */
37 cvmx_write_csr((u64)p->control_status, ctl.u64);
43 union cvmx_rnm_ctl_status ctl; local
46 ctl.u64 = 0;
48 cvmx_write_csr((u64)p->control_status, ctl.u64);
H A Dpasemi-rng.c70 u32 ctl; local
72 ctl = SDCRNG_CTL_DR | SDCRNG_CTL_SELECT_RRG_RNG | SDCRNG_CTL_KSZ;
73 out_le32(rng_regs + SDCRNG_CTL_REG, ctl);
74 out_le32(rng_regs + SDCRNG_CTL_REG, ctl & ~SDCRNG_CTL_DR);
82 u32 ctl; local
84 ctl = SDCRNG_CTL_RE | SDCRNG_CTL_CE;
86 in_le32(rng_regs + SDCRNG_CTL_REG) & ~ctl);
/drivers/video/
H A Dn411.c46 static unsigned char ctl; variable
54 ctl &= ~(HCB_CD_BIT);
56 ctl |= HCB_CD_BIT;
60 ctl &= ~(HCB_DS_BIT);
62 ctl |= HCB_DS_BIT;
65 outb(ctl, cio_addr);
107 ctl = HCB_WUP_BIT | HCB_RW_BIT | HCB_CD_BIT ;
/drivers/crypto/caam/
H A Dctrl.c151 ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
157 ctrlpriv->ctl, &perfmon->req_dequeued);
161 ctrlpriv->ctl, &perfmon->ob_enc_req);
165 ctrlpriv->ctl, &perfmon->ib_dec_req);
169 ctrlpriv->ctl, &perfmon->ob_enc_bytes);
173 ctrlpriv->ctl, &perfmon->ob_prot_bytes);
177 ctrlpriv->ctl, &perfmon->ib_dec_bytes);
181 ctrlpriv->ctl, &perfmon->ib_valid_bytes);
187 ctrlpriv->ctl,
[all...]
/drivers/net/phy/
H A Det1011c.c54 int ctl = 0; local
55 ctl = phy_read(phydev, MII_BMCR);
56 if (ctl < 0)
57 return ctl;
58 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
61 phy_write(phydev, MII_BMCR, ctl | BMCR_RESET);
H A Dphy_device.c612 int ctl = 0; local
617 ctl |= BMCR_SPEED1000;
619 ctl |= BMCR_SPEED100;
622 ctl |= BMCR_FULLDPLX;
624 err = phy_write(phydev, MII_BMCR, ctl);
636 int ctl; local
638 ctl = phy_read(phydev, MII_BMCR);
640 if (ctl < 0)
641 return ctl;
643 ctl |
678 int ctl = phy_read(phydev, MII_BMCR); local
[all...]
/drivers/net/wireless/b43/
H A Dpio.c331 u16 ctl,
339 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
340 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
350 ctl &= ~B43_PIO_TXCTL_WRITEHI;
351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
359 return ctl;
368 u16 ctl; local
370 ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
371 ctl |= B43_PIO_TXCTL_FREADY;
372 ctl
330 tx_write_2byte_queue(struct b43_pio_txqueue *q, u16 ctl, const void *_data, unsigned int data_len) argument
383 tx_write_4byte_queue(struct b43_pio_txqueue *q, u32 ctl, const void *_data, unsigned int data_len) argument
438 u32 ctl; local
636 u32 ctl; local
650 u16 ctl; local
[all...]
H A Dleds.c37 u16 ctl; local
39 ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
41 ctl &= ~(1 << led_index);
43 ctl |= (1 << led_index);
44 b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
50 u16 ctl; local
52 ctl = b43_read16(dev, B43_MMIO_GPIO_CONTROL);
54 ctl |= (1 << led_index);
56 ctl &= ~(1 << led_index);
57 b43_write16(dev, B43_MMIO_GPIO_CONTROL, ctl);
[all...]
/drivers/isdn/mISDN/
H A Dclock.c18 * ctl = callback function to enable/disable clock source
22 * Note: Callback 'ctl' can be called before mISDN_register_clock returns!
78 lastclock->ctl(lastclock->priv, 0);
85 bestclock->ctl(bestclock->priv, 1);
95 *mISDN_register_clock(char *name, int pri, clockctl_func_t *ctl, void *priv) argument
110 iclock->ctl = ctl;
133 iclock->ctl(iclock->priv, 0);
155 iclock->ctl(iclock->priv, 0);
/drivers/net/ethernet/ibm/emac/
H A Dphy.c111 int ctl, adv; local
119 ctl = phy_read(phy, MII_BMCR);
120 if (ctl < 0)
121 return ctl;
122 ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE);
125 phy_write(phy, MII_BMCR, ctl);
161 ctl = phy_read(phy, MII_BMCR);
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163 phy_write(phy, MII_BMCR, ctl);
170 int ctl; local
[all...]
/drivers/net/wireless/b43legacy/
H A Dleds.c39 u16 ctl; local
42 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
44 ctl &= ~(1 << led_index);
46 ctl |= (1 << led_index);
47 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl);
56 u16 ctl; local
59 ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
61 ctl |= (1 << led_index);
63 ctl &= ~(1 << led_index);
64 b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl);
[all...]
/drivers/mmc/host/
H A Dtmio_mmc.h44 void __iomem *ctl; member in struct:tmio_mmc_host
163 return readw(host->ctl + (addr << host->bus_shift));
169 readsw(host->ctl + (addr << host->bus_shift), buf, count);
174 return readw(host->ctl + (addr << host->bus_shift)) |
175 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
185 writew(val, host->ctl + (addr << host->bus_shift));
191 writesw(host->ctl + (addr << host->bus_shift), buf, count);
196 writew(val, host->ctl + (addr << host->bus_shift));
197 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
/drivers/net/
H A Dsungem_phy.c315 u16 ctl, adv; local
337 ctl = phy_read(phy, MII_BMCR);
338 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
339 phy_write(phy, MII_BMCR, ctl);
346 u16 ctl; local
353 ctl = phy_read(phy, MII_BMCR);
354 ctl &= ~(BMCR_FULLDPLX|BMCR_SPEED100|BMCR_ANENABLE);
357 phy_write(phy, MII_BMCR, ctl | BMCR_RESET);
364 ctl |= BMCR_SPEED100;
371 ctl |
470 u16 ctl, adv; local
514 u16 ctl; local
746 u16 ctl, adv; local
797 u16 ctl, ctl2; local
[all...]
/drivers/rtc/
H A Drtc-tx4939.c34 __raw_writel(cmd, &rtcreg->ctl);
36 while (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_BUSY) {
64 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
80 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
133 u32 ctl; local
138 (__raw_readl(&rtcreg->ctl) & TX4939_RTCCTL_ALME));
146 ctl = __raw_readl(&rtcreg->ctl);
147 alrm->enabled = (ctl & TX4939_RTCCTL_ALME) ? 1 : 0;
148 alrm->pending = (ctl
[all...]
/drivers/i2c/busses/
H A Di2c-pnx.c238 u32 ctl = 0; local
259 ctl = ioread32(I2C_REG_CTL(alg_data));
260 ctl |= mcntrl_rffie | mcntrl_daie;
261 ctl &= ~mcntrl_drmie;
262 iowrite32(ctl, I2C_REG_CTL(alg_data));
291 ctl = ioread32(I2C_REG_CTL(alg_data));
292 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
294 iowrite32(ctl, I2C_REG_CTL(alg_data));
311 u32 stat, ctl; local
327 ctl
388 u32 ctl; local
[all...]
/drivers/media/dvb/ngene/
H A Dngene-cards.c58 struct stv6110x_devctl *ctl; local
66 ctl = dvb_attach(stv6110x_attach, chan->fe, tunerconf, i2c);
67 if (ctl == NULL) {
72 feconf->tuner_init = ctl->tuner_init;
73 feconf->tuner_sleep = ctl->tuner_sleep;
74 feconf->tuner_set_mode = ctl->tuner_set_mode;
75 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
76 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
77 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
78 feconf->tuner_get_bandwidth = ctl
[all...]
/drivers/net/ethernet/micrel/
H A Dks8842.c434 struct ks8842_tx_dma_ctl *ctl = &adapter->dma_tx; local
435 u8 *buf = ctl->buf;
437 if (ctl->adesc) {
443 sg_dma_len(&ctl->sg) = skb->len + sizeof(u32);
454 sg_dma_address(&ctl->sg), 0, sg_dma_len(&ctl->sg),
458 if (sg_dma_len(&ctl->sg) % 4)
459 sg_dma_len(&ctl->sg) += 4 - sg_dma_len(&ctl->sg) % 4;
461 ctl
556 struct ks8842_rx_dma_ctl *ctl = &adapter->dma_rx; local
608 struct ks8842_rx_dma_ctl *ctl = &adapter->dma_rx; local
857 struct ks8842_tx_dma_ctl *ctl = &adapter->dma_tx; local
[all...]
/drivers/ata/
H A Dpata_mpiix.c159 int cmd, ctl, irq; local
179 ctl = 0x3F6;
183 ctl = 0x376;
188 ctl_addr = devm_ioport_map(&dev->dev, ctl, 1);
192 ata_port_desc(ap, "cmd 0x%x ctl 0x%x", cmd, ctl);
/drivers/dma/ioat/
H A Dhw.h47 uint32_t ctl; member in union:ioat_dma_descriptor::__anon457
81 uint32_t ctl; member in union:ioat_fill_descriptor::__anon460
108 uint32_t ctl; member in union:ioat_xor_descriptor::__anon462
145 uint32_t ctl; member in union:ioat_pq_descriptor::__anon464
186 uint32_t ctl; member in union:ioat_pq_update_descriptor::__anon466

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