| /drivers/media/video/cx88/ |
| H A D | cx88-vbi.c | 86 cx_clear(MO_VID_DMACNTRL, 0x88);
89 cx_clear(VID_CAPTURE_CONTROL,0x18);
92 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
93 cx_clear(MO_VID_INTMSK, 0x0f0088);
125 cx_clear(MO_VID_DMACNTRL, 0x88);
126 cx_clear(VID_CAPTURE_CONTROL, 0x18);
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| H A D | cx88-dvb.c | 349 cx_clear(MO_GP0_IO, 8);
447 cx_clear(MO_GP0_IO, 0x20);
453 cx_clear(MO_GP0_IO, 0x20);
862 cx_clear(MO_GP0_IO, 0x08);
891 cx_clear(MO_GP0_IO, 0x80);
895 cx_clear(MO_GP0_IO, 0x80);
1182 cx_clear(MO_GP0_IO, 1);
1203 cx_clear(MO_GP0_IO, 1);
1221 cx_clear(MO_GP0_IO, 1);
1242 cx_clear(MO_GP0_I
[all...] |
| H A D | cx88-alsa.c | 140 cx_clear(MO_AUD_DMACNTRL, 0x11);
185 cx_clear(MO_AUD_DMACNTRL, 0x11);
188 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
189 cx_clear(MO_AUD_INTMSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
236 cx_clear(MO_AUD_DMACNTRL, 0x11);
282 cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
|
| H A D | cx88-video.c | 446 cx_clear(MO_AFECFG_IO, 0x00000001);
447 cx_clear(MO_INPUT_FORMAT, 0x00010010);
448 cx_clear(MO_FILTER_EVEN, 0x00002020);
449 cx_clear(MO_FILTER_ODD, 0x00002020);
475 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
529 cx_clear(MO_VID_DMACNTRL, 0x11);
532 cx_clear(VID_CAPTURE_CONTROL,0x06);
535 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
536 cx_clear(MO_VID_INTMSK, 0x0f0011);
1625 cx_clear(MO_VID_DMACNTR
[all...] |
| H A D | cx88-mpeg.c | 191 cx_clear(MO_TS_DMACNTRL, 0x11);
194 cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);
195 cx_clear(MO_TS_INTMSK, 0x1f0011);
399 cx_clear(MO_TS_DMACNTRL, 0x11);
|
| H A D | cx88-cards.c | 2973 cx_clear(MO_GP0_IO, 0x00000010);
3030 cx_clear(MO_GP1_IO, 0x10);
3047 cx_clear(MO_GP1_IO, 0x10);
3209 cx_clear(MO_GP0_IO, 0x00000010);
3303 cx_clear(MO_GP0_IO, 0x00000088);
3330 cx_clear(MO_GP0_IO, 0x00000080);
3465 cx_clear(MO_GP0_IO, 0x00000040);
3474 cx_clear(MO_GP0_IO, 0x00000001);
3485 cx_clear(MO_GP2_IO, 0x00000001);
3487 cx_clear(MO_GP0_I
[all...] |
| H A D | cx88-blackbird.c | 573 cx_clear(MO_INPUT_FORMAT, 0x100); /* chroma subcarrier lock to normal? */
575 cx_clear(MO_OUTPUT_FORMAT, 0x0008); /* Normal Y-limits to let the mpeg encoder sync */
614 cx_clear(AUD_VOL_CTL, (1 << 6));
1242 cx_clear(MO_GP0_IO, 0x00000080);
|
| H A D | cx88.h | 587 #define cx_clear(reg,bit) cx_andor((reg),(bit),0) macro
|
| /drivers/media/video/cx23885/ |
| H A D | cx23885-alsa.c | 99 cx_clear(AUD_INT_DMA_CTL, 0x11);
148 cx_clear(AUD_INT_DMA_CTL, 0x11);
151 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
152 cx_clear(AUDIO_INT_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
178 cx_clear(AUD_INT_DMA_CTL, 0x11);
|
| H A D | cx23885-cards.c | 936 cx_clear(GP0_IO, bitmask);
957 cx_clear(GP0_IO, 0x00000005);
1006 cx_clear(GP0_IO, 0x00000005);
1027 cx_clear(GP0_IO, 0x00000005);
1039 cx_clear(GP0_IO, 0x00000005);
1052 cx_clear(GP0_IO, 0x0000000f);
1065 cx_clear(GP0_IO, 0x0000000f);
1082 cx_clear(GP0_IO, 0x00000004);
1091 cx_clear(MC417_RWD, 0x00000800);
1111 cx_clear(GP0_I
[all...] |
| H A D | cimax2.c | 205 cx_clear(MC417_RWD, NETUP_ADLO);
208 cx_clear(MC417_RWD, NETUP_ADHI);
216 cx_clear(MC417_RWD,
219 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
|
| H A D | cx23885-core.c | 350 cx_clear(PCI_INT_MSK, mask);
366 cx_clear(PCI_INT_MSK, mask);
684 cx_clear(RDR_TLCTL0, 1 << 4);
1047 cx_clear(RDR_RDRCTL1, 1 << 8);
1362 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1469 cx_clear(port->reg_ts_int_msk, port->ts_int_msk_val);
1470 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1710 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
1762 cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
2025 cx_clear(GP0_I
[all...] |
| H A D | cx23885-vbi.c | 166 cx_clear(VID_A_DMA_CTL, 0x22);
|
| H A D | cx23885.h | 502 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) macro
|
| H A D | cx23885-dvb.c | 633 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
|
| H A D | cx23885-video.c | 555 cx_clear(VID_A_DMA_CTL, 0x11);
|
| /drivers/media/video/cx25821/ |
| H A D | cx25821-alsa.c | 162 cx_clear(AUD_INT_DMA_CTL,
216 cx_clear(AUD_INT_DMA_CTL,
220 cx_clear(PCI_INT_MSK, PCI_MSK_AUD_INT);
221 cx_clear(AUD_A_INT_MSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
265 cx_clear(AUD_INT_DMA_CTL,
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| H A D | cx25821.h | 521 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0) macro
|
| H A D | cx25821-video.c | 374 cx_clear(channel->dma_ctl, 0x11);
407 cx_clear(channel->dma_ctl, 0x11);
447 cx_clear(PCI_INT_MSK, 1);
|