Searched refs:nv_wi32 (Results 1 - 6 of 6) sorted by relevance
| /drivers/gpu/drm/nouveau/ |
| H A D | nv40_fifo.c | 57 nv_wi32(dev, fc + 0, chan->pushbuf_base);
58 nv_wi32(dev, fc + 4, chan->pushbuf_base);
59 nv_wi32(dev, fc + 12, chan->pushbuf->pinst >> 4);
60 nv_wi32(dev, fc + 24, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
67 nv_wi32(dev, fc + 60, 0x0001FFFF);
157 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
158 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
159 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
160 nv_wi32(dev, fc + 12, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_INSTANCE));
161 nv_wi32(de
[all...] |
| H A D | nv10_fifo.c | 64 nv_wi32(dev, fc + 0, chan->pushbuf_base);
65 nv_wi32(dev, fc + 4, chan->pushbuf_base);
66 nv_wi32(dev, fc + 12, chan->pushbuf->pinst >> 4);
67 nv_wi32(dev, fc + 20, NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
147 nv_wi32(dev, fc + 0, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
148 nv_wi32(dev, fc + 4, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET));
149 nv_wi32(dev, fc + 8, nv_rd32(dev, NV10_PFIFO_CACHE1_REF_CNT));
152 nv_wi32(dev, fc + 12, tmp);
153 nv_wi32(dev, fc + 16, nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_STATE));
154 nv_wi32(de
[all...] |
| H A D | nv04_graph.c | 661 nv_wi32(dev, instance, tmp);
680 nv_wi32(dev, instance + 0xc, tmp);
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| H A D | nouveau_object.c | 1044 nv_wi32(dev, gpuobj->pinst + offset, val);
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| H A D | nouveau_drv.h | 1567 static inline void nv_wi32(struct drm_device *dev, unsigned offset, u32 val) function
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| H A D | nouveau_state.c | 940 nv_wi32(dev, i, bios[i/4]);
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Completed in 39 milliseconds