Searched refs:read_status_mask (Results 1 - 25 of 60) sorted by relevance

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/drivers/tty/serial/
H A D68328serial.h143 int read_status_mask; member in struct:m68k_serial
H A Dmpc52xx_uart.c66 /* Rem: - We use the read_status_mask as a shadow of
149 port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
150 out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
169 & port->read_status_mask
176 & port->read_status_mask
188 port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
189 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
194 port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
195 out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
200 port->read_status_mask
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H A Dcrisv10.h92 int read_status_mask; member in struct:e100_serial
H A Dsa1100.c52 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
149 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
161 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
214 status &= sport->port.read_status_mask;
286 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
310 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
445 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
446 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
448 sport->port.read_status_mask |=
451 sport->port.read_status_mask |
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H A Dbcm63xx_uart.c288 /* update flag wrt read_status_mask */
289 cstat &= port->read_status_mask;
566 port->read_status_mask = UART_FIFO_VALID_MASK;
568 port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
569 port->read_status_mask |= UART_FIFO_PARERR_MASK;
572 port->read_status_mask |= UART_FIFO_BRKDET_MASK;
H A D21285.c105 rxs &= port->read_status_mask;
274 port->read_status_mask = RXSTAT_OVERRUN;
276 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
H A Dclps711x.c117 ch &= port->read_status_mask;
332 port->read_status_mask = UARTDR_OVERR;
334 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
H A Dmxs-auart.c190 stat &= s->port.read_status_mask;
323 u->read_status_mask = 0;
326 u->read_status_mask |= AUART_STAT_PERR;
328 u->read_status_mask |= AUART_STAT_BERR;
H A Dnetx-serial.c224 status &= port->read_status_mask;
421 port->read_status_mask = 0;
423 port->read_status_mask |= SR_BE;
425 port->read_status_mask |= SR_PE | SR_FE;
H A Dpnx8xxx_uart.c46 * Convert from ignore_status_mask or read_status_mask to FIFO
217 status &= sport->port.read_status_mask;
471 sport->port.read_status_mask = ISTAT_TO_SM(PNX8XXX_UART_INT_RXOVRN) |
475 sport->port.read_status_mask |=
479 sport->port.read_status_mask |=
H A Dsc26xx.c169 status &= port->read_status_mask;
399 port->read_status_mask = SR_OVERRUN;
401 port->read_status_mask |= SR_PARITY | SR_FRAME;
403 port->read_status_mask |= SR_BREAK;
H A Dserial_ks8695.c185 lsr &= port->read_status_mask;
438 port->read_status_mask = URLS_URROE;
440 port->read_status_mask |= (URLS_URFE | URLS_URPE);
442 port->read_status_mask |= URLS_URBI;
H A Dm32r_sio.c315 up->port.read_status_mask &= ~UART_LSR_DR;
351 * or read_status_mask.
365 *status &= up->port.read_status_mask;
760 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
762 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
764 up->port.read_status_mask |= UART_LSR_BI;
H A Dpxa.c92 up->port.read_status_mask &= ~UART_LSR_DR;
129 * or read_status_mask.
143 *status &= up->port.read_status_mask;
515 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
517 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
519 up->port.read_status_mask |= UART_LSR_BI;
H A Dvr41xx_siu.c278 port->read_status_mask &= ~UART_LSR_DR;
350 lsr &= port->read_status_mask;
561 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
563 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
565 port->read_status_mask |= UART_LSR_BI;
H A Dapbuart.c111 rsr &= port->read_status_mask;
271 port->read_status_mask = UART_STATUS_OE;
273 port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE;
H A Dlantiq.c196 rsr &= port->read_status_mask;
427 port->read_status_mask = ASCSTATE_ROE;
429 port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
H A Duartlite.c97 stat &= port->read_status_mask;
246 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
250 port->read_status_mask |=
H A Dvt8500_serial.c155 c &= ~port->read_status_mask;
376 port->read_status_mask = 0;
378 port->read_status_mask = FER | PER;
H A Dxilinx_uartps.c170 isrstatus &= port->read_status_mask;
481 port->read_status_mask = XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXTRIG |
486 port->read_status_mask |= XUARTPS_IXR_PARITY |
H A Dsunsab.c185 * or read_status_mask.
199 stat->sreg.isr0 &= (up->port.read_status_mask & 0xff);
200 stat->sreg.isr1 &= ((up->port.read_status_mask >> 8) & 0xff);
710 /* We encode read_status_mask and ignore_status_mask like so:
718 up->port.read_status_mask = (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME |
721 up->port.read_status_mask |= (SAB82532_ISR1_CSC |
725 up->port.read_status_mask |= (SAB82532_ISR0_PERR |
728 up->port.read_status_mask |= (SAB82532_ISR1_BRK << 8);
H A Damba-pl010.c149 rsr &= uap->port.read_status_mask;
428 uap->port.read_status_mask = UART01x_RSR_OE;
430 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
432 uap->port.read_status_mask |= UART01x_RSR_BE;
H A Ddz.c235 status &= uport->read_status_mask;
628 dport->port.read_status_mask = DZ_OERR;
630 dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
632 dport->port.read_status_mask |= DZ_BREAK;
H A Dicom.h235 unsigned char read_status_mask; member in struct:icom_port
/drivers/mmc/card/
H A Dsdio_uart.c82 unsigned int read_status_mask; member in struct:sdio_uart_port
322 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
324 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
326 port->read_status_mask |= UART_LSR_BI;
388 port->read_status_mask &= ~UART_LSR_DR;
422 *status &= port->read_status_mask;

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