Searched refs:reg_num (Results 1 - 25 of 56) sorted by relevance

123

/drivers/video/via/
H A Dhw.h369 int reg_num; member in struct:iga2_shadow_hor_total
375 int reg_num; member in struct:iga2_shadow_hor_blank_end
381 int reg_num; member in struct:iga2_shadow_ver_total
387 int reg_num; member in struct:iga2_shadow_ver_addr
393 int reg_num; member in struct:iga2_shadow_ver_blank_start
399 int reg_num; member in struct:iga2_shadow_ver_blank_end
405 int reg_num; member in struct:iga2_shadow_ver_sync_start
411 int reg_num; member in struct:iga2_shadow_ver_sync_end
417 int reg_num; member in struct:iga1_fetch_count
423 int reg_num; member in struct:iga2_fetch_count
434 int reg_num; member in struct:iga1_starting_addr
439 int reg_num; member in struct:iga2_starting_addr
450 int reg_num; member in struct:lcd_pwd_seq_td0
455 int reg_num; member in struct:lcd_pwd_seq_td1
460 int reg_num; member in struct:lcd_pwd_seq_td2
465 int reg_num; member in struct:lcd_pwd_seq_td3
478 int reg_num; member in struct:_lcd_hor_scaling_factor
483 int reg_num; member in struct:_lcd_ver_scaling_factor
514 int reg_num; member in struct:iga1_fifo_depth_select
519 int reg_num; member in struct:iga1_fifo_threshold_select
524 int reg_num; member in struct:iga1_fifo_high_threshold_select
529 int reg_num; member in struct:iga1_display_queue_expire_num
534 int reg_num; member in struct:iga2_fifo_depth_select
539 int reg_num; member in struct:iga2_fifo_threshold_select
544 int reg_num; member in struct:iga2_fifo_high_threshold_select
549 int reg_num; member in struct:iga2_display_queue_expire_num
[all...]
H A Dvt1636.c83 int reg_num, i; local
86 reg_num = ARRAY_SIZE(common_init_data);
87 for (i = 0; i < reg_num; i++)
H A Dhw.c1037 iga1_fetch_count_reg.reg_num;
1044 iga2_fetch_count_reg.reg_num;
1176 display_fifo_depth_reg.iga1_fifo_depth_select_reg.reg_num;
1184 iga1_fifo_threshold_select_reg.reg_num;
1195 iga1_fifo_high_threshold_select_reg.reg_num;
1207 iga1_display_queue_expire_num_reg.reg_num;
1330 iga2_fifo_depth_select_reg.reg_num;
1343 iga2_fifo_depth_select_reg.reg_num;
1355 iga2_fifo_threshold_select_reg.reg_num;
1366 iga2_fifo_high_threshold_select_reg.reg_num;
[all...]
H A Dlcd.c378 reg_num;
399 lcd_scaling_factor.lcd_hor_scaling_factor.reg_num;
422 reg_num;
443 lcd_scaling_factor.lcd_ver_scaling_factor.reg_num;
/drivers/w1/
H A Dw1.c110 ssize_t count = sizeof(sl->reg_num);
112 memcpy(buf, (u8 *)&sl->reg_num, count);
429 if (sl->reg_num.family == rn->family &&
430 sl->reg_num.id == rn->id &&
431 sl->reg_num.crc == rn->crc) {
581 err = add_uevent_var(env, "W1_FID=%02X", sl->reg_num.family);
586 (unsigned long long)sl->reg_num.id);
609 (unsigned int) sl->reg_num.family,
610 (unsigned long long) sl->reg_num.id);
613 (unsigned int) sl->reg_num
[all...]
H A Dw1_netlink.c220 __func__, sl->reg_num.family, (unsigned long long)sl->reg_num.id,
221 sl->reg_num.crc, cmd->cmd, cmd->len);
H A Dw1.h67 struct w1_reg_num reg_num; member in struct:w1_slave
H A Dw1_io.c388 u64 rn = le64_to_cpu(*((u64*)&sl->reg_num));
/drivers/net/phy/
H A Dfixed.c118 static int fixed_mdio_read(struct mii_bus *bus, int phy_id, int reg_num) argument
123 if (reg_num >= MII_REGS_NUM)
134 return fp->regs[reg_num];
141 static int fixed_mdio_write(struct mii_bus *bus, int phy_id, int reg_num, argument
H A Dphy.c325 mii_data->reg_num);
330 switch(mii_data->reg_num) {
357 mii_data->reg_num, val);
359 if (mii_data->reg_num == MII_BMCR &&
/drivers/mfd/
H A Dezx-pcap.c81 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value) argument
88 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
96 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value) argument
102 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
111 int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val) argument
115 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
124 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
/drivers/net/
H A Dmii.c402 mii_data->reg_num &= mii_if->reg_num_mask;
412 mii_data->reg_num);
419 switch(mii_data->reg_num) {
445 mii_data->reg_num, val);
/drivers/net/ethernet/dlink/
H A Ddl2k.c82 static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
83 static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
1273 miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num);
1276 mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value);
1377 mii_read (struct net_device *dev, int phy_addr, int reg_num) argument
1387 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1405 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data) argument
1413 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
H A Ddl2k.h370 __u16 reg_num; member in struct:mii_data
/drivers/scsi/
H A Dwd33c93.c176 read_wd33c93(const wd33c93_regs regs, uchar reg_num) argument
180 outb(reg_num, regs.SASR);
204 write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value) argument
206 outb(reg_num, regs.SASR);
234 read_wd33c93(const wd33c93_regs regs, uchar reg_num) argument
236 *regs.SASR = reg_num;
262 write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value) argument
264 *regs.SASR = reg_num;
/drivers/media/video/
H A Dov2640.c267 u8 reg_num; member in struct:regval_list
626 while ((vals->reg_num != 0xff) || (vals->value != 0xff)) {
628 vals->reg_num, vals->value);
630 vals->reg_num, vals->value);
H A Dov5642.c90 u16 reg_num; member in struct:regval_list
725 while (vals->reg_num != 0xffff || vals->value != 0xff) {
726 int ret = reg_write(client, vals->reg_num, vals->value);
H A Dov772x.c383 unsigned char reg_num; member in struct:regval_list
536 while (vals->reg_num != 0xff) {
538 vals->reg_num,
H A Dov7670.c219 unsigned char reg_num; member in struct:regval_list
524 while (vals->reg_num != 0xff || vals->value != 0xff) {
525 int ret = ov7670_write(sd, vals->reg_num, vals->value);
/drivers/net/ethernet/amd/
H A Damd8111e.c186 static int amd8111e_mdio_read(struct net_device * dev, int phy_id, int reg_num) argument
191 amd8111e_read_phy(lp,phy_id,reg_num,&reg_val);
199 static void amd8111e_mdio_write(struct net_device * dev, int phy_id, int reg_num, int val) argument
203 amd8111e_write_phy(lp, phy_id, reg_num, val);
1523 data->reg_num & PHY_REG_ADDR_MASK, &mii_regval);
1533 data->reg_num & PHY_REG_ADDR_MASK, data->val_in);
H A Dpcnet32.c322 static int mdio_read(struct net_device *dev, int phy_id, int reg_num);
323 static void mdio_write(struct net_device *dev, int phy_id, int reg_num,
2644 static int mdio_read(struct net_device *dev, int phy_id, int reg_num) argument
2653 lp->a->write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
2660 static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val) argument
2668 lp->a->write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f));
/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_main.c560 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) argument
565 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
570 int reg_num, int val)
574 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
602 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
610 if (data->reg_num & ~(0x1F)) {
616 data->reg_num, data->val_in);
618 data->reg_num, data->val_in)) {
569 atl1c_mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val) argument
/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_main.c435 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) argument
440 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
445 int reg_num, int val)
449 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
476 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
484 if (data->reg_num & ~(0x1F)) {
490 data->reg_num, data->val_in);
492 data->reg_num, data->val_in)) {
444 atl1e_mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val) argument
/drivers/net/ethernet/3com/
H A D3c574_cs.c1049 data->phy_id, data->reg_num, data->val_in, data->val_out);
1063 data->reg_num & 0x1f);
1077 data->reg_num & 0x1f, data->val_in);
/drivers/net/ethernet/xircom/
H A Dxirc2ps_cs.c1431 data->phy_id, data->reg_num, data->val_in, data->val_out);
1442 data->reg_num & 0x1f);
1445 mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,

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