/drivers/firewire/ |
H A D | init_ohci1394_dma.c | 58 static inline u32 reg_read(const struct ohci *ohci, int offset) function 74 if (reg_read(ohci, OHCI1394_PhyControl) & 0x80000000) 78 r = reg_read(ohci, OHCI1394_PhyControl); 91 if (!(reg_read(ohci, OHCI1394_PhyControl) & 0x00004000)) 105 if (!(reg_read(ohci, OHCI1394_HCControlSet) 123 bus_options = reg_read(ohci, OHCI1394_BusOptions); 196 events = reg_read(ohci, OHCI1394_IntEventSet);
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H A D | ohci.c | 524 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) function 532 reg_read(ohci, OHCI1394_Version); 548 val = reg_read(ohci, OHCI1394_PhyControl); 574 val = reg_read(ohci, OHCI1394_PhyControl); 683 if (reg_read(ctx->ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { 1236 reg = reg_read(ctx->ohci, CONTROL_SET(ctx->regs)); 1543 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { 1544 lock_old = cpu_to_be32(reg_read(ohci, 1625 ctl = reg_read(ohci, CONTROL_SET(regs)); 1694 c2 = reg_read(ohc [all...] |
H A D | nosy.c | 232 reg_read(struct pcilynx *lynx, int offset) function 240 reg_write(lynx, offset, (reg_read(lynx, offset) | mask)); 465 pci_int_status = reg_read(lynx, PCI_INT_STATUS); 478 link_int_status = reg_read(lynx, LINK_INT_STATUS);
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/drivers/media/video/ |
H A D | ak881x.c | 40 static int reg_read(struct i2c_client *client, const u8 reg) function 54 int ret = reg_read(client, reg); 95 reg->val = reg_read(client, reg->reg); 220 reg_read(client, AK881X_STATUS)); 225 reg_read(client, AK881X_STATUS)); 273 data = reg_read(client, AK881X_DEVICE_ID); 289 ak881x->revision = reg_read(client, AK881X_DEVICE_REVISION);
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H A D | mt9v022.c | 131 static int reg_read(struct i2c_client *client, const u8 reg) function 147 ret = reg_read(client, reg); 158 ret = reg_read(client, reg); 238 ret = reg_read(client, MT9V022_AEC_AGC_ENABLE); 422 reg->val = reg_read(client, reg->reg); 461 data = reg_read(client, MT9V022_ANALOG_GAIN); 469 data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH); 528 reg_read(client, MT9V022_ANALOG_GAIN), gain_val); 550 reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH), 574 data = reg_read(clien [all...] |
H A D | mt9m001.c | 110 static int reg_read(struct i2c_client *client, const u8 reg) function 126 ret = reg_read(client, reg); 137 ret = reg_read(client, reg); 354 reg->val = reg_read(client, reg->reg); 442 reg_read(client, MT9M001_GLOBAL_GAIN), data); 457 reg_read(client, MT9M001_SHUTTER_WIDTH), shutter); 490 data = reg_read(client, MT9M001_CHIP_VERSION);
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H A D | mt9t031.c | 91 static int reg_read(struct i2c_client *client, const u8 reg) function 107 ret = reg_read(client, reg); 118 ret = reg_read(client, reg); 140 ret = reg_read(client, MT9T031_SHUTTER_WIDTH_UPPER); 144 ret = reg_read(client, MT9T031_SHUTTER_WIDTH); 432 reg->val = reg_read(client, reg->reg); 531 reg_read(client, MT9T031_GLOBAL_GAIN), data); 644 data = reg_read(client, MT9T031_CHIP_VERSION);
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H A D | imx074.c | 126 static int reg_read(struct i2c_client *client, const u16 addr) function 308 ret = reg_read(client, 0); 314 ret = reg_read(client, 1);
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H A D | rj54n1cb0c.c | 427 static int reg_read(struct i2c_client *client, const u16 reg) function 466 ret = reg_read(client, reg); 873 ret = reg_read(client, RJ54N1_CLK_RST); 930 ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I); 1012 ret = reg_read(client, RJ54N1_RESET_STANDBY); 1155 reg->val = reg_read(client, reg->reg); 1294 data1 = reg_read(client, RJ54N1_DEV_CODE); 1295 data2 = reg_read(client, RJ54N1_DEV_CODE2);
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H A D | ov5642.c | 641 static int reg_read(struct i2c_client *client, u16 reg, u8 *val) function 704 ret = reg_read(client, reg->reg, &val); 984 ret = reg_read(client, REG_CHIP_ID_HIGH, &id_high); 990 ret = reg_read(client, REG_CHIP_ID_LOW, &id_low);
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H A D | mt9m111.c | 130 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg) macro 679 data = reg_read(GLOBAL_GAIN); 810 data = reg_read(CHIP_VERSION);
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/drivers/net/dsa/ |
H A D | mv88e6060.c | 20 static int reg_read(struct dsa_switch *ds, int addr, int reg) function 29 __ret = reg_read(ds, addr, reg); \ 206 return reg_read(ds, addr, regnum); 239 port_status = reg_read(ds, REG_PORT(i), 0x00);
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/drivers/i2c/busses/ |
H A D | i2c-pasemi.c | 71 static inline int reg_read(struct pasemi_smbus *smbus, int reg) function 81 #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO) 87 status = reg_read(smbus, REG_SMSTA); 96 status = reg_read(smbus, REG_SMSTA); 100 status = reg_read(smbus, REG_SMSTA);
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/drivers/gpu/drm/radeon/ |
H A D | atom.h | 115 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */ member in struct:card_info
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H A D | radeon_device.c | 544 atom_card_info->reg_read = cail_reg_read;
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H A D | atom.c | 193 val = gctx->card->reg_read(gctx->card, idx);
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/drivers/video/msm/ |
H A D | mddi.c | 82 struct reg_read_info *reg_read; member in struct:mddi_info 145 ri = mddi->reg_read; 161 mddi->reg_read = NULL; 208 ri = mddi->reg_read; 213 mddi->reg_read = NULL; 585 mddi->reg_read = &ri; 599 mddi->reg_read = NULL; 618 mddi->reg_read = NULL;
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/drivers/mfd/ |
H A D | mcp-sa11x0.c | 135 .reg_read = mcp_sa11x0_read,
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H A D | mcp-core.c | 154 val = mcp->ops->reg_read(mcp, reg);
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/drivers/media/video/gspca/ |
H A D | spca508.c | 1286 static int reg_read(struct gspca_dev *gspca_dev, function 1302 pr_err("reg_read err %d\n", ret); 1334 ret = reg_read(gspca_dev, 0x8803); 1397 data1 = reg_read(gspca_dev, 0x8104); 1398 data2 = reg_read(gspca_dev, 0x8105); 1401 data1 = reg_read(gspca_dev, 0x8106); 1402 data2 = reg_read(gspca_dev, 0x8107); 1405 data1 = reg_read(gspca_dev, 0x8621);
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H A D | spca505.c | 588 static int reg_read(struct gspca_dev *gspca_dev, function 681 ret = reg_read(gspca_dev, 0x06, 0x16);
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/drivers/atm/ |
H A D | lanai.c | 477 static inline u32 reg_read(const struct lanai_dev *lanai, function 892 #define read_pin() (reg_read(lanai, Status_Reg) & STATUS_PROMDATA) 1066 return reg_read(lanai, IntStatusMasked_Reg); 1090 u32 new = reg_read(lanai, Status_Reg); 1268 for (i = 0; reg_read(lanai, Status_Reg) & STATUS_BUTTBUSY; i++) { 1725 u32 wreg = reg_read(lanai, ServWrite_Reg); 1747 u32 statreg = reg_read(lanai, Statistics_Reg); 1843 (unsigned int) reg_read(lanai, DMA_Addr_Reg)); 2163 lanai->conf1 = reg_read(lanai, Config1_Reg); 2181 reg_read(lana [all...] |
/drivers/media/dvb/frontends/ |
H A D | si21xx.c | 540 u8 reg_read; local 546 reg_read = 0; 549 reg_read |= ((regs_read[0] >> i) & 0x01) << (6 - i); 551 lock = ((reg_read & 0x7f) | (regs_read[1] & 0x80));
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/drivers/net/ethernet/qlogic/qlcnic/ |
H A D | qlcnic_hw.c | 1608 int i, reg_read; local 1612 reg_read = mem->size; 1615 if ((addr & 0xf) || (reg_read%16)) { 1618 addr, reg_read); 1624 while (reg_read != 0) { 1648 reg_read -= 16;
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/drivers/net/ethernet/smsc/ |
H A D | smsc911x.c | 84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg); member in struct:smsc911x_ops 187 data = pdata->ops->reg_read(pdata, reg); 2274 .reg_read = __smsc911x_reg_read, 2282 .reg_read = __smsc911x_reg_read_shift,
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