ati-agp.c revision a95fe463e73b8c7b2d97606ac86ce261f1270726
1/*
2 * ATi AGPGART routines.
3 */
4
5#include <linux/types.h>
6#include <linux/module.h>
7#include <linux/pci.h>
8#include <linux/init.h>
9#include <linux/string.h>
10#include <linux/slab.h>
11#include <linux/agp_backend.h>
12#include <asm/agp.h>
13#include "agp.h"
14
15#define ATI_GART_MMBASE_ADDR	0x14
16#define ATI_RS100_APSIZE	0xac
17#define ATI_RS100_IG_AGPMODE	0xb0
18#define ATI_RS300_APSIZE	0xf8
19#define ATI_RS300_IG_AGPMODE	0xfc
20#define ATI_GART_FEATURE_ID		0x00
21#define ATI_GART_BASE			0x04
22#define ATI_GART_CACHE_SZBASE		0x08
23#define ATI_GART_CACHE_CNTRL		0x0c
24#define ATI_GART_CACHE_ENTRY_CNTRL	0x10
25
26
27static const struct aper_size_info_lvl2 ati_generic_sizes[7] =
28{
29	{2048, 524288, 0x0000000c},
30	{1024, 262144, 0x0000000a},
31	{512, 131072, 0x00000008},
32	{256, 65536, 0x00000006},
33	{128, 32768, 0x00000004},
34	{64, 16384, 0x00000002},
35	{32, 8192, 0x00000000}
36};
37
38static struct gatt_mask ati_generic_masks[] =
39{
40	{ .mask = 1, .type = 0}
41};
42
43
44struct ati_page_map {
45	unsigned long *real;
46	unsigned long __iomem *remapped;
47};
48
49static struct _ati_generic_private {
50	volatile u8 __iomem *registers;
51	struct ati_page_map **gatt_pages;
52	int num_tables;
53} ati_generic_private;
54
55static int ati_create_page_map(struct ati_page_map *page_map)
56{
57	int i, err = 0;
58
59	page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
60	if (page_map->real == NULL)
61		return -ENOMEM;
62
63	set_memory_uc((unsigned long)page_map->real, 1);
64	err = map_page_into_agp(virt_to_page(page_map->real));
65	page_map->remapped = page_map->real;
66
67	for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
68		writel(agp_bridge->scratch_page, page_map->remapped+i);
69		readl(page_map->remapped+i);	/* PCI Posting. */
70	}
71
72	return 0;
73}
74
75
76static void ati_free_page_map(struct ati_page_map *page_map)
77{
78	unmap_page_from_agp(virt_to_page(page_map->real));
79	set_memory_wb((unsigned long)page_map->real, 1);
80	free_page((unsigned long) page_map->real);
81}
82
83
84static void ati_free_gatt_pages(void)
85{
86	int i;
87	struct ati_page_map **tables;
88	struct ati_page_map *entry;
89
90	tables = ati_generic_private.gatt_pages;
91	for (i = 0; i < ati_generic_private.num_tables; i++) {
92		entry = tables[i];
93		if (entry != NULL) {
94			if (entry->real != NULL)
95				ati_free_page_map(entry);
96			kfree(entry);
97		}
98	}
99	kfree(tables);
100}
101
102
103static int ati_create_gatt_pages(int nr_tables)
104{
105	struct ati_page_map **tables;
106	struct ati_page_map *entry;
107	int retval = 0;
108	int i;
109
110	tables = kzalloc((nr_tables + 1) * sizeof(struct ati_page_map *),GFP_KERNEL);
111	if (tables == NULL)
112		return -ENOMEM;
113
114	for (i = 0; i < nr_tables; i++) {
115		entry = kzalloc(sizeof(struct ati_page_map), GFP_KERNEL);
116		tables[i] = entry;
117		if (entry == NULL) {
118			retval = -ENOMEM;
119			break;
120		}
121		retval = ati_create_page_map(entry);
122		if (retval != 0)
123			break;
124	}
125	ati_generic_private.num_tables = i;
126	ati_generic_private.gatt_pages = tables;
127
128	if (retval != 0)
129		ati_free_gatt_pages();
130
131	return retval;
132}
133
134static int is_r200(void)
135{
136	if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) ||
137	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) ||
138	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) ||
139	    (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250))
140		return 1;
141	return 0;
142}
143
144static int ati_fetch_size(void)
145{
146	int i;
147	u32 temp;
148	struct aper_size_info_lvl2 *values;
149
150	if (is_r200())
151		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
152	else
153		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
154
155	temp = (temp & 0x0000000e);
156	values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes);
157	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
158		if (temp == values[i].size_value) {
159			agp_bridge->previous_size =
160			    agp_bridge->current_size = (void *) (values + i);
161
162			agp_bridge->aperture_size_idx = i;
163			return values[i].size;
164		}
165	}
166
167	return 0;
168}
169
170static void ati_tlbflush(struct agp_memory * mem)
171{
172	writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
173	readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL);	/* PCI Posting. */
174}
175
176static void ati_cleanup(void)
177{
178	struct aper_size_info_lvl2 *previous_size;
179	u32 temp;
180
181	previous_size = A_SIZE_LVL2(agp_bridge->previous_size);
182
183	/* Write back the previous size and disable gart translation */
184	if (is_r200()) {
185		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
186		temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
187		pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
188	} else {
189		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
190		temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
191		pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
192	}
193	iounmap((volatile u8 __iomem *)ati_generic_private.registers);
194}
195
196
197static int ati_configure(void)
198{
199	u32 temp;
200
201	/* Get the memory mapped registers */
202	pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp);
203	temp = (temp & 0xfffff000);
204	ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
205
206	if (!ati_generic_private.registers)
207		return -ENOMEM;
208
209	if (is_r200())
210		pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000);
211	else
212		pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
213
214	/* address to map too */
215	/*
216	pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
217	agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
218	printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
219	*/
220	writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
221	readl(ati_generic_private.registers+ATI_GART_FEATURE_ID);	/* PCI Posting.*/
222
223	/* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
224	pci_read_config_dword(agp_bridge->dev, 4, &temp);
225	pci_write_config_dword(agp_bridge->dev, 4, temp | (1<<14));
226
227	/* Write out the address of the gatt table */
228	writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
229	readl(ati_generic_private.registers+ATI_GART_BASE);	/* PCI Posting. */
230
231	return 0;
232}
233
234
235#ifdef CONFIG_PM
236static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state)
237{
238	pci_save_state(dev);
239	pci_set_power_state(dev, 3);
240
241	return 0;
242}
243
244static int agp_ati_resume(struct pci_dev *dev)
245{
246	pci_set_power_state(dev, 0);
247	pci_restore_state(dev);
248
249	return ati_configure();
250}
251#endif
252
253/*
254 *Since we don't need contiguous memory we just try
255 * to get the gatt table once
256 */
257
258#define GET_PAGE_DIR_OFF(addr) (addr >> 22)
259#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
260	GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr))
261#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
262#undef  GET_GATT
263#define GET_GATT(addr) (ati_generic_private.gatt_pages[\
264	GET_PAGE_DIR_IDX(addr)]->remapped)
265
266static int ati_insert_memory(struct agp_memory * mem,
267			     off_t pg_start, int type)
268{
269	int i, j, num_entries;
270	unsigned long __iomem *cur_gatt;
271	unsigned long addr;
272	int mask_type;
273
274	num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
275
276	mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
277	if (mask_type != 0 || type != mem->type)
278		return -EINVAL;
279
280	if (mem->page_count == 0)
281		return 0;
282
283	if ((pg_start + mem->page_count) > num_entries)
284		return -EINVAL;
285
286	j = pg_start;
287	while (j < (pg_start + mem->page_count)) {
288		addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
289		cur_gatt = GET_GATT(addr);
290		if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr))))
291			return -EBUSY;
292		j++;
293	}
294
295	if (!mem->is_flushed) {
296		/*CACHE_FLUSH(); */
297		global_cache_flush();
298		mem->is_flushed = true;
299	}
300
301	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
302		addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
303		cur_gatt = GET_GATT(addr);
304		writel(agp_bridge->driver->mask_memory(agp_bridge,
305						       mem->pages[i], mem->type),
306		       cur_gatt+GET_GATT_OFF(addr));
307	}
308	readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
309	agp_bridge->driver->tlb_flush(mem);
310	return 0;
311}
312
313static int ati_remove_memory(struct agp_memory * mem, off_t pg_start,
314			     int type)
315{
316	int i;
317	unsigned long __iomem *cur_gatt;
318	unsigned long addr;
319	int mask_type;
320
321	mask_type = agp_generic_type_to_mask_type(mem->bridge, type);
322	if (mask_type != 0 || type != mem->type)
323		return -EINVAL;
324
325	if (mem->page_count == 0)
326		return 0;
327
328	for (i = pg_start; i < (mem->page_count + pg_start); i++) {
329		addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
330		cur_gatt = GET_GATT(addr);
331		writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
332	}
333
334	readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */
335	agp_bridge->driver->tlb_flush(mem);
336	return 0;
337}
338
339static int ati_create_gatt_table(struct agp_bridge_data *bridge)
340{
341	struct aper_size_info_lvl2 *value;
342	struct ati_page_map page_dir;
343	unsigned long addr;
344	int retval;
345	u32 temp;
346	int i;
347	struct aper_size_info_lvl2 *current_size;
348
349	value = A_SIZE_LVL2(agp_bridge->current_size);
350	retval = ati_create_page_map(&page_dir);
351	if (retval != 0)
352		return retval;
353
354	retval = ati_create_gatt_pages(value->num_entries / 1024);
355	if (retval != 0) {
356		ati_free_page_map(&page_dir);
357		return retval;
358	}
359
360	agp_bridge->gatt_table_real = (u32 *)page_dir.real;
361	agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped;
362	agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real);
363
364	/* Write out the size register */
365	current_size = A_SIZE_LVL2(agp_bridge->current_size);
366
367	if (is_r200()) {
368		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
369		temp = (((temp & ~(0x0000000e)) | current_size->size_value)
370			| 0x00000001);
371		pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp);
372		pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp);
373	} else {
374		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
375		temp = (((temp & ~(0x0000000e)) | current_size->size_value)
376			| 0x00000001);
377		pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp);
378		pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp);
379	}
380
381	/*
382	 * Get the address for the gart region.
383	 * This is a bus address even on the alpha, b/c its
384	 * used to program the agp master not the cpu
385	 */
386	pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
387	addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
388	agp_bridge->gart_bus_addr = addr;
389
390	/* Calculate the agp offset */
391	for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
392		writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1,
393			page_dir.remapped+GET_PAGE_DIR_OFF(addr));
394		readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr));	/* PCI Posting. */
395	}
396
397	return 0;
398}
399
400static int ati_free_gatt_table(struct agp_bridge_data *bridge)
401{
402	struct ati_page_map page_dir;
403
404	page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
405	page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
406
407	ati_free_gatt_pages();
408	ati_free_page_map(&page_dir);
409	return 0;
410}
411
412static const struct agp_bridge_driver ati_generic_bridge = {
413	.owner			= THIS_MODULE,
414	.aperture_sizes		= ati_generic_sizes,
415	.size_type		= LVL2_APER_SIZE,
416	.num_aperture_sizes	= 7,
417	.configure		= ati_configure,
418	.fetch_size		= ati_fetch_size,
419	.cleanup		= ati_cleanup,
420	.tlb_flush		= ati_tlbflush,
421	.mask_memory		= agp_generic_mask_memory,
422	.masks			= ati_generic_masks,
423	.agp_enable		= agp_generic_enable,
424	.cache_flush		= global_cache_flush,
425	.create_gatt_table	= ati_create_gatt_table,
426	.free_gatt_table	= ati_free_gatt_table,
427	.insert_memory		= ati_insert_memory,
428	.remove_memory		= ati_remove_memory,
429	.alloc_by_type		= agp_generic_alloc_by_type,
430	.free_by_type		= agp_generic_free_by_type,
431	.agp_alloc_page		= agp_generic_alloc_page,
432	.agp_alloc_pages	= agp_generic_alloc_pages,
433	.agp_destroy_page	= agp_generic_destroy_page,
434	.agp_destroy_pages	= agp_generic_destroy_pages,
435	.agp_type_to_mask_type  = agp_generic_type_to_mask_type,
436};
437
438
439static struct agp_device_ids ati_agp_device_ids[] __devinitdata =
440{
441	{
442		.device_id	= PCI_DEVICE_ID_ATI_RS100,
443		.chipset_name	= "IGP320/M",
444	},
445	{
446		.device_id	= PCI_DEVICE_ID_ATI_RS200,
447		.chipset_name	= "IGP330/340/345/350/M",
448	},
449	{
450		.device_id	= PCI_DEVICE_ID_ATI_RS200_B,
451		.chipset_name	= "IGP345M",
452	},
453	{
454		.device_id	= PCI_DEVICE_ID_ATI_RS250,
455		.chipset_name	= "IGP7000/M",
456	},
457	{
458		.device_id	= PCI_DEVICE_ID_ATI_RS300_100,
459		.chipset_name	= "IGP9100/M",
460	},
461	{
462		.device_id	= PCI_DEVICE_ID_ATI_RS300_133,
463		.chipset_name	= "IGP9100/M",
464	},
465	{
466		.device_id	= PCI_DEVICE_ID_ATI_RS300_166,
467		.chipset_name	= "IGP9100/M",
468	},
469	{
470		.device_id	= PCI_DEVICE_ID_ATI_RS300_200,
471		.chipset_name	= "IGP9100/M",
472	},
473	{
474		.device_id	= PCI_DEVICE_ID_ATI_RS350_133,
475		.chipset_name	= "IGP9000/M",
476	},
477	{
478		.device_id	= PCI_DEVICE_ID_ATI_RS350_200,
479		.chipset_name	= "IGP9100/M",
480	},
481	{ }, /* dummy final entry, always present */
482};
483
484static int __devinit agp_ati_probe(struct pci_dev *pdev,
485				   const struct pci_device_id *ent)
486{
487	struct agp_device_ids *devs = ati_agp_device_ids;
488	struct agp_bridge_data *bridge;
489	u8 cap_ptr;
490	int j;
491
492	cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
493	if (!cap_ptr)
494		return -ENODEV;
495
496	/* probe for known chipsets */
497	for (j = 0; devs[j].chipset_name; j++) {
498		if (pdev->device == devs[j].device_id)
499			goto found;
500	}
501
502	dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n",
503		pdev->vendor, pdev->device);
504	return -ENODEV;
505
506found:
507	bridge = agp_alloc_bridge();
508	if (!bridge)
509		return -ENOMEM;
510
511	bridge->dev = pdev;
512	bridge->capndx = cap_ptr;
513
514	bridge->driver = &ati_generic_bridge;
515
516	dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name);
517
518	/* Fill in the mode register */
519	pci_read_config_dword(pdev,
520			bridge->capndx+PCI_AGP_STATUS,
521			&bridge->mode);
522
523	pci_set_drvdata(pdev, bridge);
524	return agp_add_bridge(bridge);
525}
526
527static void __devexit agp_ati_remove(struct pci_dev *pdev)
528{
529	struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
530
531	agp_remove_bridge(bridge);
532	agp_put_bridge(bridge);
533}
534
535static struct pci_device_id agp_ati_pci_table[] = {
536	{
537	.class		= (PCI_CLASS_BRIDGE_HOST << 8),
538	.class_mask	= ~0,
539	.vendor		= PCI_VENDOR_ID_ATI,
540	.device		= PCI_ANY_ID,
541	.subvendor	= PCI_ANY_ID,
542	.subdevice	= PCI_ANY_ID,
543	},
544	{ }
545};
546
547MODULE_DEVICE_TABLE(pci, agp_ati_pci_table);
548
549static struct pci_driver agp_ati_pci_driver = {
550	.name		= "agpgart-ati",
551	.id_table	= agp_ati_pci_table,
552	.probe		= agp_ati_probe,
553	.remove		= agp_ati_remove,
554#ifdef CONFIG_PM
555	.suspend	= agp_ati_suspend,
556	.resume		= agp_ati_resume,
557#endif
558};
559
560static int __init agp_ati_init(void)
561{
562	if (agp_off)
563		return -EINVAL;
564	return pci_register_driver(&agp_ati_pci_driver);
565}
566
567static void __exit agp_ati_cleanup(void)
568{
569	pci_unregister_driver(&agp_ati_pci_driver);
570}
571
572module_init(agp_ati_init);
573module_exit(agp_ati_cleanup);
574
575MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
576MODULE_LICENSE("GPL and additional rights");
577
578