intel_ringbuffer.h revision 1ec14ad3132702694f2e1a90b30641cf111183b9
18187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai#ifndef _INTEL_RINGBUFFER_H_ 28187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai#define _INTEL_RINGBUFFER_H_ 38187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 41ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilsonenum { 51ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson RCS = 0x0, 61ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson VCS, 71ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson BCS, 81ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson I915_NUM_RINGS, 91ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson}; 101ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 118187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan haistruct intel_hw_status_page { 1278501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson u32 __iomem *page_addr; 138187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai unsigned int gfx_addr; 1405394f3975dceb107a5e1393e2244946e5b43660Chris Wilson struct drm_i915_gem_object *obj; 158187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai}; 168187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 17cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai#define I915_RING_READ(reg) i915_safe_read(dev_priv, reg) 18cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai 19cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL(ring->mmio_base)) 20870e86ddc2d110124812b277643ed0f2767148eeDaniel Vetter#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val) 21cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai 22cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai#define I915_READ_START(ring) I915_RING_READ(RING_START(ring->mmio_base)) 236c0e1c556ee659cd8c976cd175c0b70e209acb92Daniel Vetter#define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val) 24cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai 25cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai#define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD(ring->mmio_base)) 26570ef608591aa1c7f7cb615c2d33b30246179da1Daniel Vetter#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val) 27cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai 28cae5852dcaa1139b198e13ebd3aeb7f3c065f875Zou Nan hai#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL(ring->mmio_base)) 297f2ab69913135f0377a1dfc1da5695b64107d3caDaniel Vetter#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val) 30870e86ddc2d110124812b277643ed0f2767148eeDaniel Vetter 311ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID(ring->mmio_base)) 321ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0(ring->mmio_base)) 331ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson#define I915_READ_SYNC_1(ring) I915_RING_READ(RING_SYNC_1(ring->mmio_base)) 341ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 358187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan haistruct intel_ring_buffer { 368187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai const char *name; 379220434a8768902cd9cf248709972678b74aa8c1Chris Wilson enum intel_ring_id { 389220434a8768902cd9cf248709972678b74aa8c1Chris Wilson RING_RENDER = 0x1, 399220434a8768902cd9cf248709972678b74aa8c1Chris Wilson RING_BSD = 0x2, 40549f7365820a212a1cfd0871d377b1ad0d1e5723Chris Wilson RING_BLT = 0x4, 419220434a8768902cd9cf248709972678b74aa8c1Chris Wilson } id; 42333e9fe94d00ce8c334d91099449b9948bf76b92Daniel Vetter u32 mmio_base; 438187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai void *virtual_start; 448187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai struct drm_device *dev; 4505394f3975dceb107a5e1393e2244946e5b43660Chris Wilson struct drm_i915_gem_object *obj; 468187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 478187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai unsigned int head; 488187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai unsigned int tail; 49780f0ca3e0cd3f0677d9149b7e14bf0878d1dbdcChris Wilson int space; 50c2c347a9eeda1b9b69c8fc393fd933747fbb2e11Chris Wilson int size; 518187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai struct intel_hw_status_page status_page; 528187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 53b2223497b44a4701d1be873d1e9453d7f720043bChris Wilson u32 irq_seqno; /* last seq seem at irq time */ 54b2223497b44a4701d1be873d1e9453d7f720043bChris Wilson u32 waiting_seqno; 551ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson u32 sync_seqno[I915_NUM_RINGS-1]; 561ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson u32 irq_refcount; 571ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson void (*irq_get)(struct intel_ring_buffer *ring); 581ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson void (*irq_put)(struct intel_ring_buffer *ring); 598187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 6078501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson int (*init)(struct intel_ring_buffer *ring); 618187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 6278501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson void (*write_tail)(struct intel_ring_buffer *ring, 63297b0c5be3b6e08890cbd7149313408847e81715Chris Wilson u32 value); 6478501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson void (*flush)(struct intel_ring_buffer *ring, 6578501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson u32 invalidate_domains, 6678501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson u32 flush_domains); 673cce469cab880ef8990d2d16d745bf85443fc998Chris Wilson int (*add_request)(struct intel_ring_buffer *ring, 683cce469cab880ef8990d2d16d745bf85443fc998Chris Wilson u32 *seqno); 6978501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson u32 (*get_seqno)(struct intel_ring_buffer *ring); 7078501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, 71c4e7a4146798ce22c229dd21ed31f59f07c4119eChris Wilson u32 offset, u32 length); 728d19215be8254f4f75e9c5a0d28345947b0382dbZou Nan hai void (*cleanup)(struct intel_ring_buffer *ring); 738187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 748187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai /** 758187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * List of objects currently involved in rendering from the 768187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * ringbuffer. 778187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * 788187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * Includes buffers having the contents of their GPU caches 798187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * flushed, not necessarily primitives. last_rendering_seqno 808187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * represents when the rendering involved will be completed. 818187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * 828187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * A reference is held on the buffer while on this list. 838187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai */ 848187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai struct list_head active_list; 858187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 868187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai /** 878187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * List of breadcrumbs associated with GPU requests currently 888187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai * outstanding. 898187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai */ 908187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai struct list_head request_list; 918187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 92a56ba56c275b1c2b982c8901ab92bf5a0fd0b757Chris Wilson /** 93641934069d29211baf82afb93622a426172b67b6Chris Wilson * List of objects currently pending a GPU write flush. 94641934069d29211baf82afb93622a426172b67b6Chris Wilson * 95641934069d29211baf82afb93622a426172b67b6Chris Wilson * All elements on this list will belong to either the 96641934069d29211baf82afb93622a426172b67b6Chris Wilson * active_list or flushing_list, last_rendering_seqno can 97641934069d29211baf82afb93622a426172b67b6Chris Wilson * be used to differentiate between the two elements. 98641934069d29211baf82afb93622a426172b67b6Chris Wilson */ 99641934069d29211baf82afb93622a426172b67b6Chris Wilson struct list_head gpu_write_list; 100641934069d29211baf82afb93622a426172b67b6Chris Wilson 101641934069d29211baf82afb93622a426172b67b6Chris Wilson /** 102a56ba56c275b1c2b982c8901ab92bf5a0fd0b757Chris Wilson * Do we have some not yet emitted requests outstanding? 103a56ba56c275b1c2b982c8901ab92bf5a0fd0b757Chris Wilson */ 1045d97eb69bd4767ce9973360881fa6ad161510fb0Chris Wilson u32 outstanding_lazy_request; 105a56ba56c275b1c2b982c8901ab92bf5a0fd0b757Chris Wilson 1068187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai wait_queue_head_t irq_queue; 1078187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai drm_local_map_t map; 1088d19215be8254f4f75e9c5a0d28345947b0382dbZou Nan hai 1098d19215be8254f4f75e9c5a0d28345947b0382dbZou Nan hai void *private; 1108187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai}; 1118187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 1128187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan haistatic inline u32 1131ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilsonintel_ring_sync_index(struct intel_ring_buffer *ring, 1141ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson struct intel_ring_buffer *other) 1151ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson{ 1161ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson int idx; 1171ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 1181ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson /* 1191ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson * cs -> 0 = vcs, 1 = bcs 1201ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson * vcs -> 0 = bcs, 1 = cs, 1211ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson * bcs -> 0 = cs, 1 = vcs. 1221ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson */ 1231ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 1241ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson idx = (other - ring) - 1; 1251ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson if (idx < 0) 1261ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson idx += I915_NUM_RINGS; 1271ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 1281ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson return idx; 1291ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson} 1301ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson 1311ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilsonstatic inline u32 1328187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan haiintel_read_status_page(struct intel_ring_buffer *ring, 13378501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson int reg) 1348187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai{ 13578501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson return ioread32(ring->status_page.page_addr + reg); 1368187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai} 1378187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 13878501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonvoid intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); 139e1f99ce6cac3b6a95551642be5ddb5d9c46bea76Chris Wilsonint __must_check intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n); 140e1f99ce6cac3b6a95551642be5ddb5d9c46bea76Chris Wilsonint __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n); 14178501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson 14278501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonstatic inline void intel_ring_emit(struct intel_ring_buffer *ring, 14378501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson u32 data) 144e898cd221db65273bfc102fa20e4e228e0b8c7e1Chris Wilson{ 14578501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilson iowrite32(data, ring->virtual_start + ring->tail); 146e898cd221db65273bfc102fa20e4e228e0b8c7e1Chris Wilson ring->tail += 4; 147e898cd221db65273bfc102fa20e4e228e0b8c7e1Chris Wilson} 148e898cd221db65273bfc102fa20e4e228e0b8c7e1Chris Wilson 14978501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonvoid intel_ring_advance(struct intel_ring_buffer *ring); 1508187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 15178501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonu32 intel_ring_get_seqno(struct intel_ring_buffer *ring); 1521ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilsonint intel_ring_sync(struct intel_ring_buffer *ring, 1531ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson struct intel_ring_buffer *to, 1541ec14ad3132702694f2e1a90b30641cf111183b9Chris Wilson u32 seqno); 1558187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 1565c1143bbecf50184ff7cad6287b4e0993bacbd9fXiang, Haihaoint intel_init_render_ring_buffer(struct drm_device *dev); 1575c1143bbecf50184ff7cad6287b4e0993bacbd9fXiang, Haihaoint intel_init_bsd_ring_buffer(struct drm_device *dev); 158549f7365820a212a1cfd0871d377b1ad0d1e5723Chris Wilsonint intel_init_blt_ring_buffer(struct drm_device *dev); 1598187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai 16078501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonu32 intel_ring_get_active_head(struct intel_ring_buffer *ring); 16178501eac34f372bfbeb4e1d9de688c13efa916f6Chris Wilsonvoid intel_ring_setup_status_page(struct intel_ring_buffer *ring); 16279f321b7e676bd54f563c5ce513588aa90b2cc21Daniel Vetter 1638187a2b70e34c727a06617441f74f202b6fefaf9Zou Nan hai#endif /* _INTEL_RINGBUFFER_H_ */ 164