192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart/*
292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    w83791d.c - Part of lm_sensors, Linux kernel modules for hardware
392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart                monitoring
492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    Copyright (C) 2006-2007 Charles Spirakis <bezaur@gmail.com>
692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    This program is free software; you can redistribute it and/or modify
892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    it under the terms of the GNU General Public License as published by
992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    the Free Software Foundation; either version 2 of the License, or
1092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    (at your option) any later version.
1192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
1292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    This program is distributed in the hope that it will be useful,
1392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    but WITHOUT ANY WARRANTY; without even the implied warranty of
1492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    GNU General Public License for more details.
1692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
1792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    You should have received a copy of the GNU General Public License
1892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    along with this program; if not, write to the Free Software
1992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
2092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart*/
2192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
2292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart/*
2392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    Supports following chips:
2492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
2592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    Chip	#vin	#fanin	#pwm	#temp	wchipid	vendid	i2c	ISA
2692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    w83791d	10	5	5	3	0x71	0x5ca3	yes	no
2792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
2892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    The w83791d chip appears to be part way between the 83781d and the
2992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    83792d. Thus, this file is derived from both the w83792d.c and
3092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    w83781d.c files.
3192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
3292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart    The w83791g chip is the same as the w83791d but lead-free.
3392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart*/
3492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
3592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/module.h>
3692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/init.h>
3792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/slab.h>
3892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/i2c.h>
3992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/hwmon.h>
4092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/hwmon-vid.h>
4192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/hwmon-sysfs.h>
4292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/err.h>
4392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#include <linux/mutex.h>
4492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
4592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#define NUMBER_OF_VIN		10
4692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#define NUMBER_OF_FANIN		5
4792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#define NUMBER_OF_TEMPIN	3
4892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart#define NUMBER_OF_PWM		5
4992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
5092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart/* Addresses to scan */
5192d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
5292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart						I2C_CLIENT_END };
5392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
5492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart/* Insmod parameters */
5592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
5692d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic unsigned short force_subclients[4];
5792d7f7b0cde3ad2260e7462b40867b57efd49851James Smartmodule_param_array(force_subclients, short, NULL, 0);
5892d7f7b0cde3ad2260e7462b40867b57efd49851James SmartMODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
5992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart			"{bus, clientaddr, subclientaddr1, subclientaddr2}");
6092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
6192d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic bool reset;
6292d7f7b0cde3ad2260e7462b40867b57efd49851James Smartmodule_param(reset, bool, 0);
6392d7f7b0cde3ad2260e7462b40867b57efd49851James SmartMODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset");
6492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
6592d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic bool init;
6692d7f7b0cde3ad2260e7462b40867b57efd49851James Smartmodule_param(init, bool, 0);
6792d7f7b0cde3ad2260e7462b40867b57efd49851James SmartMODULE_PARM_DESC(init, "Set to one to force extra software initialization");
6892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
6992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart/* The W83791D registers */
7092d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const u8 W83791D_REG_IN[NUMBER_OF_VIN] = {
7192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x20,			/* VCOREA in DataSheet */
7292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x21,			/* VINR0 in DataSheet */
7392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x22,			/* +3.3VIN in DataSheet */
7492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x23,			/* VDD5V in DataSheet */
7592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x24,			/* +12VIN in DataSheet */
7692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x25,			/* -12VIN in DataSheet */
7792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x26,			/* -5VIN in DataSheet */
7892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB0,			/* 5VSB in DataSheet */
7992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB1,			/* VBAT in DataSheet */
8092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB2			/* VINR1 in DataSheet */
8192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart};
8292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart
8392d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = {
8492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2B,			/* VCOREA High Limit in DataSheet */
8592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2D,			/* VINR0 High Limit in DataSheet */
8692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2F,			/* +3.3VIN High Limit in DataSheet */
8792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x31,			/* VDD5V High Limit in DataSheet */
8892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x33,			/* +12VIN High Limit in DataSheet */
8992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x35,			/* -12VIN High Limit in DataSheet */
9092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x37,			/* -5VIN High Limit in DataSheet */
91549e55cd2a1b83ea45ac17fb6c309654a3d371a4James Smart	0xB4,			/* 5VSB High Limit in DataSheet */
920937282036d9ae798e02c9c69a8b2ef044048855James Smart	0xB6,			/* VBAT High Limit in DataSheet */
9392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB8			/* VINR1 High Limit in DataSheet */
9492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart};
9592d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = {
9692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2C,			/* VCOREA Low Limit in DataSheet */
9792d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2E,			/* VINR0 Low Limit in DataSheet */
9892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x30,			/* +3.3VIN Low Limit in DataSheet */
9992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x32,			/* VDD5V Low Limit in DataSheet */
10092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x34,			/* +12VIN Low Limit in DataSheet */
10192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x36,			/* -12VIN Low Limit in DataSheet */
10292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x38,			/* -5VIN Low Limit in DataSheet */
10392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB5,			/* 5VSB Low Limit in DataSheet */
10492d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB7,			/* VBAT Low Limit in DataSheet */
10592d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xB9			/* VINR1 Low Limit in DataSheet */
10692d7f7b0cde3ad2260e7462b40867b57efd49851James Smart};
10792d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = {
10892d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x28,			/* FAN 1 Count in DataSheet */
10992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x29,			/* FAN 2 Count in DataSheet */
11092d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0x2A,			/* FAN 3 Count in DataSheet */
11192d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xBA,			/* FAN 4 Count in DataSheet */
11292d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xBB,			/* FAN 5 Count in DataSheet */
11392d7f7b0cde3ad2260e7462b40867b57efd49851James Smart};
11492d7f7b0cde3ad2260e7462b40867b57efd49851James Smartstatic const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = {
115ea2151b4e142fa2de0319d9dd80413a997bf435aJames Smart	0x3B,			/* FAN 1 Count Low Limit in DataSheet */
116ea2151b4e142fa2de0319d9dd80413a997bf435aJames Smart	0x3C,			/* FAN 2 Count Low Limit in DataSheet */
117ea2151b4e142fa2de0319d9dd80413a997bf435aJames Smart	0x3D,			/* FAN 3 Count Low Limit in DataSheet */
118ea2151b4e142fa2de0319d9dd80413a997bf435aJames Smart	0xBC,			/* FAN 4 Count Low Limit in DataSheet */
11992d7f7b0cde3ad2260e7462b40867b57efd49851James Smart	0xBD,			/* FAN 5 Count Low Limit in DataSheet */
120};
121
122static const u8 W83791D_REG_PWM[NUMBER_OF_PWM] = {
123	0x81,			/* PWM 1 duty cycle register in DataSheet */
124	0x83,			/* PWM 2 duty cycle register in DataSheet */
125	0x94,			/* PWM 3 duty cycle register in DataSheet */
126	0xA0,			/* PWM 4 duty cycle register in DataSheet */
127	0xA1,			/* PWM 5 duty cycle register in DataSheet */
128};
129
130static const u8 W83791D_REG_TEMP_TARGET[3] = {
131	0x85,			/* PWM 1 target temperature for temp 1 */
132	0x86,			/* PWM 2 target temperature for temp 2 */
133	0x96,			/* PWM 3 target temperature for temp 3 */
134};
135
136static const u8 W83791D_REG_TEMP_TOL[2] = {
137	0x87,			/* PWM 1/2 temperature tolerance */
138	0x97,			/* PWM 3 temperature tolerance */
139};
140
141static const u8 W83791D_REG_FAN_CFG[2] = {
142	0x84,			/* FAN 1/2 configuration */
143	0x95,			/* FAN 3 configuration */
144};
145
146static const u8 W83791D_REG_FAN_DIV[3] = {
147	0x47,			/* contains FAN1 and FAN2 Divisor */
148	0x4b,			/* contains FAN3 Divisor */
149	0x5C,			/* contains FAN4 and FAN5 Divisor */
150};
151
152#define W83791D_REG_BANK		0x4E
153#define W83791D_REG_TEMP2_CONFIG	0xC2
154#define W83791D_REG_TEMP3_CONFIG	0xCA
155
156static const u8 W83791D_REG_TEMP1[3] = {
157	0x27,			/* TEMP 1 in DataSheet */
158	0x39,			/* TEMP 1 Over in DataSheet */
159	0x3A,			/* TEMP 1 Hyst in DataSheet */
160};
161
162static const u8 W83791D_REG_TEMP_ADD[2][6] = {
163	{0xC0,			/* TEMP 2 in DataSheet */
164	 0xC1,			/* TEMP 2(0.5 deg) in DataSheet */
165	 0xC5,			/* TEMP 2 Over High part in DataSheet */
166	 0xC6,			/* TEMP 2 Over Low part in DataSheet */
167	 0xC3,			/* TEMP 2 Thyst High part in DataSheet */
168	 0xC4},			/* TEMP 2 Thyst Low part in DataSheet */
169	{0xC8,			/* TEMP 3 in DataSheet */
170	 0xC9,			/* TEMP 3(0.5 deg) in DataSheet */
171	 0xCD,			/* TEMP 3 Over High part in DataSheet */
172	 0xCE,			/* TEMP 3 Over Low part in DataSheet */
173	 0xCB,			/* TEMP 3 Thyst High part in DataSheet */
174	 0xCC}			/* TEMP 3 Thyst Low part in DataSheet */
175};
176
177#define W83791D_REG_BEEP_CONFIG		0x4D
178
179static const u8 W83791D_REG_BEEP_CTRL[3] = {
180	0x56,			/* BEEP Control Register 1 */
181	0x57,			/* BEEP Control Register 2 */
182	0xA3,			/* BEEP Control Register 3 */
183};
184
185#define W83791D_REG_GPIO		0x15
186#define W83791D_REG_CONFIG		0x40
187#define W83791D_REG_VID_FANDIV		0x47
188#define W83791D_REG_DID_VID4		0x49
189#define W83791D_REG_WCHIPID		0x58
190#define W83791D_REG_CHIPMAN		0x4F
191#define W83791D_REG_PIN			0x4B
192#define W83791D_REG_I2C_SUBADDR		0x4A
193
194#define W83791D_REG_ALARM1 0xA9	/* realtime status register1 */
195#define W83791D_REG_ALARM2 0xAA	/* realtime status register2 */
196#define W83791D_REG_ALARM3 0xAB	/* realtime status register3 */
197
198#define W83791D_REG_VBAT		0x5D
199#define W83791D_REG_I2C_ADDR		0x48
200
201/* The SMBus locks itself. The Winbond W83791D has a bank select register
202   (index 0x4e), but the driver only accesses registers in bank 0. Since
203   we don't switch banks, we don't need any special code to handle
204   locking access between bank switches */
205static inline int w83791d_read(struct i2c_client *client, u8 reg)
206{
207	return i2c_smbus_read_byte_data(client, reg);
208}
209
210static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value)
211{
212	return i2c_smbus_write_byte_data(client, reg, value);
213}
214
215/* The analog voltage inputs have 16mV LSB. Since the sysfs output is
216   in mV as would be measured on the chip input pin, need to just
217   multiply/divide by 16 to translate from/to register values. */
218#define IN_TO_REG(val)		(SENSORS_LIMIT((((val) + 8) / 16), 0, 255))
219#define IN_FROM_REG(val)	((val) * 16)
220
221static u8 fan_to_reg(long rpm, int div)
222{
223	if (rpm == 0)
224		return 255;
225	rpm = SENSORS_LIMIT(rpm, 1, 1000000);
226	return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
227}
228
229#define FAN_FROM_REG(val,div)	((val) == 0   ? -1 : \
230				((val) == 255 ? 0 : \
231					1350000 / ((val) * (div))))
232
233/* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */
234#define TEMP1_FROM_REG(val)	((val) * 1000)
235#define TEMP1_TO_REG(val)	((val) <= -128000 ? -128 : \
236				 (val) >= 127000 ? 127 : \
237				 (val) < 0 ? ((val) - 500) / 1000 : \
238				 ((val) + 500) / 1000)
239
240/* for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius
241   Assumes the top 8 bits are the integral amount and the bottom 8 bits
242   are the fractional amount. Since we only have 0.5 degree resolution,
243   the bottom 7 bits will always be zero */
244#define TEMP23_FROM_REG(val)	((val) / 128 * 500)
245#define TEMP23_TO_REG(val)	((val) <= -128000 ? 0x8000 : \
246				 (val) >= 127500 ? 0x7F80 : \
247				 (val) < 0 ? ((val) - 250) / 500 * 128 : \
248				 ((val) + 250) / 500 * 128)
249
250/* for thermal cruise target temp, 7-bits, LSB = 1 degree Celsius */
251#define TARGET_TEMP_TO_REG(val)		((val) < 0 ? 0 : \
252					(val) >= 127000 ? 127 : \
253					((val) + 500) / 1000)
254
255/* for thermal cruise temp tolerance, 4-bits, LSB = 1 degree Celsius */
256#define TOL_TEMP_TO_REG(val)		((val) < 0 ? 0 : \
257					(val) >= 15000 ? 15 : \
258					((val) + 500) / 1000)
259
260#define BEEP_MASK_TO_REG(val)		((val) & 0xffffff)
261#define BEEP_MASK_FROM_REG(val)		((val) & 0xffffff)
262
263#define DIV_FROM_REG(val)		(1 << (val))
264
265static u8 div_to_reg(int nr, long val)
266{
267	int i;
268
269	/* fan divisors max out at 128 */
270	val = SENSORS_LIMIT(val, 1, 128) >> 1;
271	for (i = 0; i < 7; i++) {
272		if (val == 0)
273			break;
274		val >>= 1;
275	}
276	return (u8) i;
277}
278
279struct w83791d_data {
280	struct device *hwmon_dev;
281	struct mutex update_lock;
282
283	char valid;			/* !=0 if following fields are valid */
284	unsigned long last_updated;	/* In jiffies */
285
286	/* array of 2 pointers to subclients */
287	struct i2c_client *lm75[2];
288
289	/* volts */
290	u8 in[NUMBER_OF_VIN];		/* Register value */
291	u8 in_max[NUMBER_OF_VIN];	/* Register value */
292	u8 in_min[NUMBER_OF_VIN];	/* Register value */
293
294	/* fans */
295	u8 fan[NUMBER_OF_FANIN];	/* Register value */
296	u8 fan_min[NUMBER_OF_FANIN];	/* Register value */
297	u8 fan_div[NUMBER_OF_FANIN];	/* Register encoding, shifted right */
298
299	/* Temperature sensors */
300
301	s8 temp1[3];		/* current, over, thyst */
302	s16 temp_add[2][3];	/* fixed point value. Top 8 bits are the
303				   integral part, bottom 8 bits are the
304				   fractional part. We only use the top
305				   9 bits as the resolution is only
306				   to the 0.5 degree C...
307				   two sensors with three values
308				   (cur, over, hyst)  */
309
310	/* PWMs */
311	u8 pwm[5];		/* pwm duty cycle */
312	u8 pwm_enable[3];	/* pwm enable status for fan 1-3
313					(fan 4-5 only support manual mode) */
314
315	u8 temp_target[3];	/* pwm 1-3 target temperature */
316	u8 temp_tolerance[3];	/* pwm 1-3 temperature tolerance */
317
318	/* Misc */
319	u32 alarms;		/* realtime status register encoding,combined */
320	u8 beep_enable;		/* Global beep enable */
321	u32 beep_mask;		/* Mask off specific beeps */
322	u8 vid;			/* Register encoding, combined */
323	u8 vrm;			/* hwmon-vid */
324};
325
326static int w83791d_probe(struct i2c_client *client,
327			 const struct i2c_device_id *id);
328static int w83791d_detect(struct i2c_client *client,
329			  struct i2c_board_info *info);
330static int w83791d_remove(struct i2c_client *client);
331
332static int w83791d_read(struct i2c_client *client, u8 reg);
333static int w83791d_write(struct i2c_client *client, u8 reg, u8 value);
334static struct w83791d_data *w83791d_update_device(struct device *dev);
335
336#ifdef DEBUG
337static void w83791d_print_debug(struct w83791d_data *data, struct device *dev);
338#endif
339
340static void w83791d_init_client(struct i2c_client *client);
341
342static const struct i2c_device_id w83791d_id[] = {
343	{ "w83791d", 0 },
344	{ }
345};
346MODULE_DEVICE_TABLE(i2c, w83791d_id);
347
348static struct i2c_driver w83791d_driver = {
349	.class		= I2C_CLASS_HWMON,
350	.driver = {
351		.name = "w83791d",
352	},
353	.probe		= w83791d_probe,
354	.remove		= w83791d_remove,
355	.id_table	= w83791d_id,
356	.detect		= w83791d_detect,
357	.address_list	= normal_i2c,
358};
359
360/* following are the sysfs callback functions */
361#define show_in_reg(reg) \
362static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
363			char *buf) \
364{ \
365	struct sensor_device_attribute *sensor_attr = \
366						to_sensor_dev_attr(attr); \
367	struct w83791d_data *data = w83791d_update_device(dev); \
368	int nr = sensor_attr->index; \
369	return sprintf(buf,"%d\n", IN_FROM_REG(data->reg[nr])); \
370}
371
372show_in_reg(in);
373show_in_reg(in_min);
374show_in_reg(in_max);
375
376#define store_in_reg(REG, reg) \
377static ssize_t store_in_##reg(struct device *dev, \
378				struct device_attribute *attr, \
379				const char *buf, size_t count) \
380{ \
381	struct sensor_device_attribute *sensor_attr = \
382						to_sensor_dev_attr(attr); \
383	struct i2c_client *client = to_i2c_client(dev); \
384	struct w83791d_data *data = i2c_get_clientdata(client); \
385	unsigned long val = simple_strtoul(buf, NULL, 10); \
386	int nr = sensor_attr->index; \
387	 \
388	mutex_lock(&data->update_lock); \
389	data->in_##reg[nr] = IN_TO_REG(val); \
390	w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \
391	mutex_unlock(&data->update_lock); \
392	 \
393	return count; \
394}
395store_in_reg(MIN, min);
396store_in_reg(MAX, max);
397
398static struct sensor_device_attribute sda_in_input[] = {
399	SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
400	SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
401	SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
402	SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
403	SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
404	SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
405	SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
406	SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
407	SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
408	SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
409};
410
411static struct sensor_device_attribute sda_in_min[] = {
412	SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
413	SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
414	SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
415	SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
416	SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
417	SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
418	SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
419	SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
420	SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
421	SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
422};
423
424static struct sensor_device_attribute sda_in_max[] = {
425	SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
426	SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
427	SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
428	SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
429	SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
430	SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
431	SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
432	SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
433	SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
434	SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
435};
436
437
438static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
439			char *buf)
440{
441	struct sensor_device_attribute *sensor_attr =
442						to_sensor_dev_attr(attr);
443	struct w83791d_data *data = w83791d_update_device(dev);
444	int bitnr = sensor_attr->index;
445
446	return sprintf(buf, "%d\n", (data->beep_mask >> bitnr) & 1);
447}
448
449static ssize_t store_beep(struct device *dev, struct device_attribute *attr,
450			const char *buf, size_t count)
451{
452	struct sensor_device_attribute *sensor_attr =
453						to_sensor_dev_attr(attr);
454	struct i2c_client *client = to_i2c_client(dev);
455	struct w83791d_data *data = i2c_get_clientdata(client);
456	int bitnr = sensor_attr->index;
457	int bytenr = bitnr / 8;
458	long val = simple_strtol(buf, NULL, 10) ? 1 : 0;
459
460	mutex_lock(&data->update_lock);
461
462	data->beep_mask &= ~(0xff << (bytenr * 8));
463	data->beep_mask |= w83791d_read(client, W83791D_REG_BEEP_CTRL[bytenr])
464		<< (bytenr * 8);
465
466	data->beep_mask &= ~(1 << bitnr);
467	data->beep_mask |= val << bitnr;
468
469	w83791d_write(client, W83791D_REG_BEEP_CTRL[bytenr],
470		(data->beep_mask >> (bytenr * 8)) & 0xff);
471
472	mutex_unlock(&data->update_lock);
473
474	return count;
475}
476
477static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
478			char *buf)
479{
480	struct sensor_device_attribute *sensor_attr =
481						to_sensor_dev_attr(attr);
482	struct w83791d_data *data = w83791d_update_device(dev);
483	int bitnr = sensor_attr->index;
484
485	return sprintf(buf, "%d\n", (data->alarms >> bitnr) & 1);
486}
487
488/* Note: The bitmask for the beep enable/disable is different than
489   the bitmask for the alarm. */
490static struct sensor_device_attribute sda_in_beep[] = {
491	SENSOR_ATTR(in0_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 0),
492	SENSOR_ATTR(in1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 13),
493	SENSOR_ATTR(in2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 2),
494	SENSOR_ATTR(in3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 3),
495	SENSOR_ATTR(in4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 8),
496	SENSOR_ATTR(in5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 9),
497	SENSOR_ATTR(in6_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 10),
498	SENSOR_ATTR(in7_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 16),
499	SENSOR_ATTR(in8_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 17),
500	SENSOR_ATTR(in9_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 14),
501};
502
503static struct sensor_device_attribute sda_in_alarm[] = {
504	SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
505	SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
506	SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
507	SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
508	SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
509	SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9),
510	SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10),
511	SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 19),
512	SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 20),
513	SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 14),
514};
515
516#define show_fan_reg(reg) \
517static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
518				char *buf) \
519{ \
520	struct sensor_device_attribute *sensor_attr = \
521						to_sensor_dev_attr(attr); \
522	struct w83791d_data *data = w83791d_update_device(dev); \
523	int nr = sensor_attr->index; \
524	return sprintf(buf,"%d\n", \
525		FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
526}
527
528show_fan_reg(fan);
529show_fan_reg(fan_min);
530
531static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr,
532				const char *buf, size_t count)
533{
534	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
535	struct i2c_client *client = to_i2c_client(dev);
536	struct w83791d_data *data = i2c_get_clientdata(client);
537	unsigned long val = simple_strtoul(buf, NULL, 10);
538	int nr = sensor_attr->index;
539
540	mutex_lock(&data->update_lock);
541	data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr]));
542	w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
543	mutex_unlock(&data->update_lock);
544
545	return count;
546}
547
548static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
549				char *buf)
550{
551	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
552	int nr = sensor_attr->index;
553	struct w83791d_data *data = w83791d_update_device(dev);
554	return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr]));
555}
556
557/* Note: we save and restore the fan minimum here, because its value is
558   determined in part by the fan divisor.  This follows the principle of
559   least surprise; the user doesn't expect the fan minimum to change just
560   because the divisor changed. */
561static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr,
562				const char *buf, size_t count)
563{
564	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
565	struct i2c_client *client = to_i2c_client(dev);
566	struct w83791d_data *data = i2c_get_clientdata(client);
567	int nr = sensor_attr->index;
568	unsigned long min;
569	u8 tmp_fan_div;
570	u8 fan_div_reg;
571	u8 vbat_reg;
572	int indx = 0;
573	u8 keep_mask = 0;
574	u8 new_shift = 0;
575
576	/* Save fan_min */
577	min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
578
579	mutex_lock(&data->update_lock);
580	data->fan_div[nr] = div_to_reg(nr, simple_strtoul(buf, NULL, 10));
581
582	switch (nr) {
583	case 0:
584		indx = 0;
585		keep_mask = 0xcf;
586		new_shift = 4;
587		break;
588	case 1:
589		indx = 0;
590		keep_mask = 0x3f;
591		new_shift = 6;
592		break;
593	case 2:
594		indx = 1;
595		keep_mask = 0x3f;
596		new_shift = 6;
597		break;
598	case 3:
599		indx = 2;
600		keep_mask = 0xf8;
601		new_shift = 0;
602		break;
603	case 4:
604		indx = 2;
605		keep_mask = 0x8f;
606		new_shift = 4;
607		break;
608#ifdef DEBUG
609	default:
610		dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr);
611		count = -EINVAL;
612		goto err_exit;
613#endif
614	}
615
616	fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx])
617			& keep_mask;
618	tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask;
619
620	w83791d_write(client, W83791D_REG_FAN_DIV[indx],
621				fan_div_reg | tmp_fan_div);
622
623	/* Bit 2 of fans 0-2 is stored in the vbat register (bits 5-7) */
624	if (nr < 3) {
625		keep_mask = ~(1 << (nr + 5));
626		vbat_reg = w83791d_read(client, W83791D_REG_VBAT)
627				& keep_mask;
628		tmp_fan_div = (data->fan_div[nr] << (3 + nr)) & ~keep_mask;
629		w83791d_write(client, W83791D_REG_VBAT,
630				vbat_reg | tmp_fan_div);
631	}
632
633	/* Restore fan_min */
634	data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr]));
635	w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]);
636
637#ifdef DEBUG
638err_exit:
639#endif
640	mutex_unlock(&data->update_lock);
641
642	return count;
643}
644
645static struct sensor_device_attribute sda_fan_input[] = {
646	SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
647	SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
648	SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
649	SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
650	SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
651};
652
653static struct sensor_device_attribute sda_fan_min[] = {
654	SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO,
655			show_fan_min, store_fan_min, 0),
656	SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO,
657			show_fan_min, store_fan_min, 1),
658	SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO,
659			show_fan_min, store_fan_min, 2),
660	SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO,
661			show_fan_min, store_fan_min, 3),
662	SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO,
663			show_fan_min, store_fan_min, 4),
664};
665
666static struct sensor_device_attribute sda_fan_div[] = {
667	SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO,
668			show_fan_div, store_fan_div, 0),
669	SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO,
670			show_fan_div, store_fan_div, 1),
671	SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO,
672			show_fan_div, store_fan_div, 2),
673	SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO,
674			show_fan_div, store_fan_div, 3),
675	SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO,
676			show_fan_div, store_fan_div, 4),
677};
678
679static struct sensor_device_attribute sda_fan_beep[] = {
680	SENSOR_ATTR(fan1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 6),
681	SENSOR_ATTR(fan2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 7),
682	SENSOR_ATTR(fan3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 11),
683	SENSOR_ATTR(fan4_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 21),
684	SENSOR_ATTR(fan5_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 22),
685};
686
687static struct sensor_device_attribute sda_fan_alarm[] = {
688	SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
689	SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
690	SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
691	SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 21),
692	SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 22),
693};
694
695/* read/write PWMs */
696static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
697				char *buf)
698{
699	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
700	int nr = sensor_attr->index;
701	struct w83791d_data *data = w83791d_update_device(dev);
702	return sprintf(buf, "%u\n", data->pwm[nr]);
703}
704
705static ssize_t store_pwm(struct device *dev, struct device_attribute *attr,
706		const char *buf, size_t count)
707{
708	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
709	struct i2c_client *client = to_i2c_client(dev);
710	struct w83791d_data *data = i2c_get_clientdata(client);
711	int nr = sensor_attr->index;
712	unsigned long val;
713
714	if (kstrtoul(buf, 10, &val))
715		return -EINVAL;
716
717	mutex_lock(&data->update_lock);
718	data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
719	w83791d_write(client, W83791D_REG_PWM[nr], data->pwm[nr]);
720	mutex_unlock(&data->update_lock);
721	return count;
722}
723
724static struct sensor_device_attribute sda_pwm[] = {
725	SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO,
726			show_pwm, store_pwm, 0),
727	SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO,
728			show_pwm, store_pwm, 1),
729	SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO,
730			show_pwm, store_pwm, 2),
731	SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO,
732			show_pwm, store_pwm, 3),
733	SENSOR_ATTR(pwm5, S_IWUSR | S_IRUGO,
734			show_pwm, store_pwm, 4),
735};
736
737static ssize_t show_pwmenable(struct device *dev, struct device_attribute *attr,
738				char *buf)
739{
740	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
741	int nr = sensor_attr->index;
742	struct w83791d_data *data = w83791d_update_device(dev);
743	return sprintf(buf, "%u\n", data->pwm_enable[nr] + 1);
744}
745
746static ssize_t store_pwmenable(struct device *dev,
747		struct device_attribute *attr, const char *buf, size_t count)
748{
749	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
750	struct i2c_client *client = to_i2c_client(dev);
751	struct w83791d_data *data = i2c_get_clientdata(client);
752	int nr = sensor_attr->index;
753	unsigned long val;
754	u8 reg_cfg_tmp;
755	u8 reg_idx = 0;
756	u8 val_shift = 0;
757	u8 keep_mask = 0;
758
759	int ret = kstrtoul(buf, 10, &val);
760
761	if (ret || val < 1 || val > 3)
762		return -EINVAL;
763
764	mutex_lock(&data->update_lock);
765	data->pwm_enable[nr] = val - 1;
766	switch (nr) {
767	case 0:
768		reg_idx = 0;
769		val_shift = 2;
770		keep_mask = 0xf3;
771		break;
772	case 1:
773		reg_idx = 0;
774		val_shift = 4;
775		keep_mask = 0xcf;
776		break;
777	case 2:
778		reg_idx = 1;
779		val_shift = 2;
780		keep_mask = 0xf3;
781		break;
782	}
783
784	reg_cfg_tmp = w83791d_read(client, W83791D_REG_FAN_CFG[reg_idx]);
785	reg_cfg_tmp = (reg_cfg_tmp & keep_mask) |
786					data->pwm_enable[nr] << val_shift;
787
788	w83791d_write(client, W83791D_REG_FAN_CFG[reg_idx], reg_cfg_tmp);
789	mutex_unlock(&data->update_lock);
790
791	return count;
792}
793static struct sensor_device_attribute sda_pwmenable[] = {
794	SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
795			show_pwmenable, store_pwmenable, 0),
796	SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
797			show_pwmenable, store_pwmenable, 1),
798	SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
799			show_pwmenable, store_pwmenable, 2),
800};
801
802/* For Smart Fan I / Thermal Cruise */
803static ssize_t show_temp_target(struct device *dev,
804			struct device_attribute *attr, char *buf)
805{
806	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
807	struct w83791d_data *data = w83791d_update_device(dev);
808	int nr = sensor_attr->index;
809	return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_target[nr]));
810}
811
812static ssize_t store_temp_target(struct device *dev,
813		struct device_attribute *attr, const char *buf, size_t count)
814{
815	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
816	struct i2c_client *client = to_i2c_client(dev);
817	struct w83791d_data *data = i2c_get_clientdata(client);
818	int nr = sensor_attr->index;
819	unsigned long val;
820	u8 target_mask;
821
822	if (kstrtoul(buf, 10, &val))
823		return -EINVAL;
824
825	mutex_lock(&data->update_lock);
826	data->temp_target[nr] = TARGET_TEMP_TO_REG(val);
827	target_mask = w83791d_read(client,
828				W83791D_REG_TEMP_TARGET[nr]) & 0x80;
829	w83791d_write(client, W83791D_REG_TEMP_TARGET[nr],
830				data->temp_target[nr] | target_mask);
831	mutex_unlock(&data->update_lock);
832	return count;
833}
834
835static struct sensor_device_attribute sda_temp_target[] = {
836	SENSOR_ATTR(temp1_target, S_IWUSR | S_IRUGO,
837			show_temp_target, store_temp_target, 0),
838	SENSOR_ATTR(temp2_target, S_IWUSR | S_IRUGO,
839			show_temp_target, store_temp_target, 1),
840	SENSOR_ATTR(temp3_target, S_IWUSR | S_IRUGO,
841			show_temp_target, store_temp_target, 2),
842};
843
844static ssize_t show_temp_tolerance(struct device *dev,
845			struct device_attribute *attr, char *buf)
846{
847	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
848	struct w83791d_data *data = w83791d_update_device(dev);
849	int nr = sensor_attr->index;
850	return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp_tolerance[nr]));
851}
852
853static ssize_t store_temp_tolerance(struct device *dev,
854		struct device_attribute *attr, const char *buf, size_t count)
855{
856	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
857	struct i2c_client *client = to_i2c_client(dev);
858	struct w83791d_data *data = i2c_get_clientdata(client);
859	int nr = sensor_attr->index;
860	unsigned long val;
861	u8 target_mask;
862	u8 reg_idx = 0;
863	u8 val_shift = 0;
864	u8 keep_mask = 0;
865
866	if (kstrtoul(buf, 10, &val))
867		return -EINVAL;
868
869	switch (nr) {
870	case 0:
871		reg_idx = 0;
872		val_shift = 0;
873		keep_mask = 0xf0;
874		break;
875	case 1:
876		reg_idx = 0;
877		val_shift = 4;
878		keep_mask = 0x0f;
879		break;
880	case 2:
881		reg_idx = 1;
882		val_shift = 0;
883		keep_mask = 0xf0;
884		break;
885	}
886
887	mutex_lock(&data->update_lock);
888	data->temp_tolerance[nr] = TOL_TEMP_TO_REG(val);
889	target_mask = w83791d_read(client,
890			W83791D_REG_TEMP_TOL[reg_idx]) & keep_mask;
891	w83791d_write(client, W83791D_REG_TEMP_TOL[reg_idx],
892			(data->temp_tolerance[nr] << val_shift) | target_mask);
893	mutex_unlock(&data->update_lock);
894	return count;
895}
896
897static struct sensor_device_attribute sda_temp_tolerance[] = {
898	SENSOR_ATTR(temp1_tolerance, S_IWUSR | S_IRUGO,
899			show_temp_tolerance, store_temp_tolerance, 0),
900	SENSOR_ATTR(temp2_tolerance, S_IWUSR | S_IRUGO,
901			show_temp_tolerance, store_temp_tolerance, 1),
902	SENSOR_ATTR(temp3_tolerance, S_IWUSR | S_IRUGO,
903			show_temp_tolerance, store_temp_tolerance, 2),
904};
905
906/* read/write the temperature1, includes measured value and limits */
907static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr,
908				char *buf)
909{
910	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
911	struct w83791d_data *data = w83791d_update_device(dev);
912	return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index]));
913}
914
915static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr,
916				const char *buf, size_t count)
917{
918	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
919	struct i2c_client *client = to_i2c_client(dev);
920	struct w83791d_data *data = i2c_get_clientdata(client);
921	long val = simple_strtol(buf, NULL, 10);
922	int nr = attr->index;
923
924	mutex_lock(&data->update_lock);
925	data->temp1[nr] = TEMP1_TO_REG(val);
926	w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]);
927	mutex_unlock(&data->update_lock);
928	return count;
929}
930
931/* read/write temperature2-3, includes measured value and limits */
932static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr,
933				char *buf)
934{
935	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
936	struct w83791d_data *data = w83791d_update_device(dev);
937	int nr = attr->nr;
938	int index = attr->index;
939	return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index]));
940}
941
942static ssize_t store_temp23(struct device *dev,
943				struct device_attribute *devattr,
944				const char *buf, size_t count)
945{
946	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
947	struct i2c_client *client = to_i2c_client(dev);
948	struct w83791d_data *data = i2c_get_clientdata(client);
949	long val = simple_strtol(buf, NULL, 10);
950	int nr = attr->nr;
951	int index = attr->index;
952
953	mutex_lock(&data->update_lock);
954	data->temp_add[nr][index] = TEMP23_TO_REG(val);
955	w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2],
956				data->temp_add[nr][index] >> 8);
957	w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1],
958				data->temp_add[nr][index] & 0x80);
959	mutex_unlock(&data->update_lock);
960
961	return count;
962}
963
964static struct sensor_device_attribute_2 sda_temp_input[] = {
965	SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
966	SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
967	SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
968};
969
970static struct sensor_device_attribute_2 sda_temp_max[] = {
971	SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR,
972			show_temp1, store_temp1, 0, 1),
973	SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR,
974			show_temp23, store_temp23, 0, 1),
975	SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR,
976			show_temp23, store_temp23, 1, 1),
977};
978
979static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
980	SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR,
981			show_temp1, store_temp1, 0, 2),
982	SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR,
983			show_temp23, store_temp23, 0, 2),
984	SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR,
985			show_temp23, store_temp23, 1, 2),
986};
987
988/* Note: The bitmask for the beep enable/disable is different than
989   the bitmask for the alarm. */
990static struct sensor_device_attribute sda_temp_beep[] = {
991	SENSOR_ATTR(temp1_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 4),
992	SENSOR_ATTR(temp2_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 5),
993	SENSOR_ATTR(temp3_beep, S_IWUSR | S_IRUGO, show_beep, store_beep, 1),
994};
995
996static struct sensor_device_attribute sda_temp_alarm[] = {
997	SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
998	SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
999	SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
1000};
1001
1002/* get reatime status of all sensors items: voltage, temp, fan */
1003static ssize_t show_alarms_reg(struct device *dev,
1004				struct device_attribute *attr, char *buf)
1005{
1006	struct w83791d_data *data = w83791d_update_device(dev);
1007	return sprintf(buf, "%u\n", data->alarms);
1008}
1009
1010static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
1011
1012/* Beep control */
1013
1014#define GLOBAL_BEEP_ENABLE_SHIFT	15
1015#define GLOBAL_BEEP_ENABLE_MASK		(1 << GLOBAL_BEEP_ENABLE_SHIFT)
1016
1017static ssize_t show_beep_enable(struct device *dev,
1018				struct device_attribute *attr, char *buf)
1019{
1020	struct w83791d_data *data = w83791d_update_device(dev);
1021	return sprintf(buf, "%d\n", data->beep_enable);
1022}
1023
1024static ssize_t show_beep_mask(struct device *dev,
1025				struct device_attribute *attr, char *buf)
1026{
1027	struct w83791d_data *data = w83791d_update_device(dev);
1028	return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask));
1029}
1030
1031
1032static ssize_t store_beep_mask(struct device *dev,
1033				struct device_attribute *attr,
1034				const char *buf, size_t count)
1035{
1036	struct i2c_client *client = to_i2c_client(dev);
1037	struct w83791d_data *data = i2c_get_clientdata(client);
1038	long val = simple_strtol(buf, NULL, 10);
1039	int i;
1040
1041	mutex_lock(&data->update_lock);
1042
1043	/* The beep_enable state overrides any enabling request from
1044	   the masks */
1045	data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK;
1046	data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1047
1048	val = data->beep_mask;
1049
1050	for (i = 0; i < 3; i++) {
1051		w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff));
1052		val >>= 8;
1053	}
1054
1055	mutex_unlock(&data->update_lock);
1056
1057	return count;
1058}
1059
1060static ssize_t store_beep_enable(struct device *dev,
1061				struct device_attribute *attr,
1062				const char *buf, size_t count)
1063{
1064	struct i2c_client *client = to_i2c_client(dev);
1065	struct w83791d_data *data = i2c_get_clientdata(client);
1066	long val = simple_strtol(buf, NULL, 10);
1067
1068	mutex_lock(&data->update_lock);
1069
1070	data->beep_enable = val ? 1 : 0;
1071
1072	/* Keep the full mask value in sync with the current enable */
1073	data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK;
1074	data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT);
1075
1076	/* The global control is in the second beep control register
1077	   so only need to update that register */
1078	val = (data->beep_mask >> 8) & 0xff;
1079
1080	w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val);
1081
1082	mutex_unlock(&data->update_lock);
1083
1084	return count;
1085}
1086
1087static struct sensor_device_attribute sda_beep_ctrl[] = {
1088	SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR,
1089			show_beep_enable, store_beep_enable, 0),
1090	SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR,
1091			show_beep_mask, store_beep_mask, 1)
1092};
1093
1094/* cpu voltage regulation information */
1095static ssize_t show_vid_reg(struct device *dev,
1096				struct device_attribute *attr, char *buf)
1097{
1098	struct w83791d_data *data = w83791d_update_device(dev);
1099	return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1100}
1101
1102static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1103
1104static ssize_t show_vrm_reg(struct device *dev,
1105				struct device_attribute *attr, char *buf)
1106{
1107	struct w83791d_data *data = dev_get_drvdata(dev);
1108	return sprintf(buf, "%d\n", data->vrm);
1109}
1110
1111static ssize_t store_vrm_reg(struct device *dev,
1112				struct device_attribute *attr,
1113				const char *buf, size_t count)
1114{
1115	struct w83791d_data *data = dev_get_drvdata(dev);
1116
1117	/* No lock needed as vrm is internal to the driver
1118	   (not read from a chip register) and so is not
1119	   updated in w83791d_update_device() */
1120	data->vrm = simple_strtoul(buf, NULL, 10);
1121
1122	return count;
1123}
1124
1125static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1126
1127#define IN_UNIT_ATTRS(X) \
1128	&sda_in_input[X].dev_attr.attr, \
1129	&sda_in_min[X].dev_attr.attr,   \
1130	&sda_in_max[X].dev_attr.attr,   \
1131	&sda_in_beep[X].dev_attr.attr,  \
1132	&sda_in_alarm[X].dev_attr.attr
1133
1134#define FAN_UNIT_ATTRS(X) \
1135	&sda_fan_input[X].dev_attr.attr,        \
1136	&sda_fan_min[X].dev_attr.attr,          \
1137	&sda_fan_div[X].dev_attr.attr,          \
1138	&sda_fan_beep[X].dev_attr.attr,         \
1139	&sda_fan_alarm[X].dev_attr.attr
1140
1141#define TEMP_UNIT_ATTRS(X) \
1142	&sda_temp_input[X].dev_attr.attr,       \
1143	&sda_temp_max[X].dev_attr.attr,         \
1144	&sda_temp_max_hyst[X].dev_attr.attr,    \
1145	&sda_temp_beep[X].dev_attr.attr,        \
1146	&sda_temp_alarm[X].dev_attr.attr
1147
1148static struct attribute *w83791d_attributes[] = {
1149	IN_UNIT_ATTRS(0),
1150	IN_UNIT_ATTRS(1),
1151	IN_UNIT_ATTRS(2),
1152	IN_UNIT_ATTRS(3),
1153	IN_UNIT_ATTRS(4),
1154	IN_UNIT_ATTRS(5),
1155	IN_UNIT_ATTRS(6),
1156	IN_UNIT_ATTRS(7),
1157	IN_UNIT_ATTRS(8),
1158	IN_UNIT_ATTRS(9),
1159	FAN_UNIT_ATTRS(0),
1160	FAN_UNIT_ATTRS(1),
1161	FAN_UNIT_ATTRS(2),
1162	TEMP_UNIT_ATTRS(0),
1163	TEMP_UNIT_ATTRS(1),
1164	TEMP_UNIT_ATTRS(2),
1165	&dev_attr_alarms.attr,
1166	&sda_beep_ctrl[0].dev_attr.attr,
1167	&sda_beep_ctrl[1].dev_attr.attr,
1168	&dev_attr_cpu0_vid.attr,
1169	&dev_attr_vrm.attr,
1170	&sda_pwm[0].dev_attr.attr,
1171	&sda_pwm[1].dev_attr.attr,
1172	&sda_pwm[2].dev_attr.attr,
1173	&sda_pwmenable[0].dev_attr.attr,
1174	&sda_pwmenable[1].dev_attr.attr,
1175	&sda_pwmenable[2].dev_attr.attr,
1176	&sda_temp_target[0].dev_attr.attr,
1177	&sda_temp_target[1].dev_attr.attr,
1178	&sda_temp_target[2].dev_attr.attr,
1179	&sda_temp_tolerance[0].dev_attr.attr,
1180	&sda_temp_tolerance[1].dev_attr.attr,
1181	&sda_temp_tolerance[2].dev_attr.attr,
1182	NULL
1183};
1184
1185static const struct attribute_group w83791d_group = {
1186	.attrs = w83791d_attributes,
1187};
1188
1189/* Separate group of attributes for fan/pwm 4-5. Their pins can also be
1190   in use for GPIO in which case their sysfs-interface should not be made
1191   available */
1192static struct attribute *w83791d_attributes_fanpwm45[] = {
1193	FAN_UNIT_ATTRS(3),
1194	FAN_UNIT_ATTRS(4),
1195	&sda_pwm[3].dev_attr.attr,
1196	&sda_pwm[4].dev_attr.attr,
1197	NULL
1198};
1199
1200static const struct attribute_group w83791d_group_fanpwm45 = {
1201	.attrs = w83791d_attributes_fanpwm45,
1202};
1203
1204static int w83791d_detect_subclients(struct i2c_client *client)
1205{
1206	struct i2c_adapter *adapter = client->adapter;
1207	struct w83791d_data *data = i2c_get_clientdata(client);
1208	int address = client->addr;
1209	int i, id, err;
1210	u8 val;
1211
1212	id = i2c_adapter_id(adapter);
1213	if (force_subclients[0] == id && force_subclients[1] == address) {
1214		for (i = 2; i <= 3; i++) {
1215			if (force_subclients[i] < 0x48 ||
1216			    force_subclients[i] > 0x4f) {
1217				dev_err(&client->dev,
1218					"invalid subclient "
1219					"address %d; must be 0x48-0x4f\n",
1220					force_subclients[i]);
1221				err = -ENODEV;
1222				goto error_sc_0;
1223			}
1224		}
1225		w83791d_write(client, W83791D_REG_I2C_SUBADDR,
1226					(force_subclients[2] & 0x07) |
1227					((force_subclients[3] & 0x07) << 4));
1228	}
1229
1230	val = w83791d_read(client, W83791D_REG_I2C_SUBADDR);
1231	if (!(val & 0x08)) {
1232		data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (val & 0x7));
1233	}
1234	if (!(val & 0x80)) {
1235		if ((data->lm75[0] != NULL) &&
1236				((val & 0x7) == ((val >> 4) & 0x7))) {
1237			dev_err(&client->dev,
1238				"duplicate addresses 0x%x, "
1239				"use force_subclient\n",
1240				data->lm75[0]->addr);
1241			err = -ENODEV;
1242			goto error_sc_1;
1243		}
1244		data->lm75[1] = i2c_new_dummy(adapter,
1245					      0x48 + ((val >> 4) & 0x7));
1246	}
1247
1248	return 0;
1249
1250/* Undo inits in case of errors */
1251
1252error_sc_1:
1253	if (data->lm75[0] != NULL)
1254		i2c_unregister_device(data->lm75[0]);
1255error_sc_0:
1256	return err;
1257}
1258
1259
1260/* Return 0 if detection is successful, -ENODEV otherwise */
1261static int w83791d_detect(struct i2c_client *client,
1262			  struct i2c_board_info *info)
1263{
1264	struct i2c_adapter *adapter = client->adapter;
1265	int val1, val2;
1266	unsigned short address = client->addr;
1267
1268	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1269		return -ENODEV;
1270	}
1271
1272	if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80)
1273		return -ENODEV;
1274
1275	val1 = w83791d_read(client, W83791D_REG_BANK);
1276	val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1277	/* Check for Winbond ID if in bank 0 */
1278	if (!(val1 & 0x07)) {
1279		if ((!(val1 & 0x80) && val2 != 0xa3) ||
1280		    ( (val1 & 0x80) && val2 != 0x5c)) {
1281			return -ENODEV;
1282		}
1283	}
1284	/* If Winbond chip, address of chip and W83791D_REG_I2C_ADDR
1285	   should match */
1286	if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address)
1287		return -ENODEV;
1288
1289	/* We want bank 0 and Vendor ID high byte */
1290	val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78;
1291	w83791d_write(client, W83791D_REG_BANK, val1 | 0x80);
1292
1293	/* Verify it is a Winbond w83791d */
1294	val1 = w83791d_read(client, W83791D_REG_WCHIPID);
1295	val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
1296	if (val1 != 0x71 || val2 != 0x5c)
1297		return -ENODEV;
1298
1299	strlcpy(info->type, "w83791d", I2C_NAME_SIZE);
1300
1301	return 0;
1302}
1303
1304static int w83791d_probe(struct i2c_client *client,
1305			 const struct i2c_device_id *id)
1306{
1307	struct w83791d_data *data;
1308	struct device *dev = &client->dev;
1309	int i, err;
1310	u8 has_fanpwm45;
1311
1312#ifdef DEBUG
1313	int val1;
1314	val1 = w83791d_read(client, W83791D_REG_DID_VID4);
1315	dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n",
1316			(val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
1317#endif
1318
1319	data = kzalloc(sizeof(struct w83791d_data), GFP_KERNEL);
1320	if (!data) {
1321		err = -ENOMEM;
1322		goto error0;
1323	}
1324
1325	i2c_set_clientdata(client, data);
1326	mutex_init(&data->update_lock);
1327
1328	err = w83791d_detect_subclients(client);
1329	if (err)
1330		goto error1;
1331
1332	/* Initialize the chip */
1333	w83791d_init_client(client);
1334
1335	/* If the fan_div is changed, make sure there is a rational
1336	   fan_min in place */
1337	for (i = 0; i < NUMBER_OF_FANIN; i++) {
1338		data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]);
1339	}
1340
1341	/* Register sysfs hooks */
1342	if ((err = sysfs_create_group(&client->dev.kobj, &w83791d_group)))
1343		goto error3;
1344
1345	/* Check if pins of fan/pwm 4-5 are in use as GPIO */
1346	has_fanpwm45 = w83791d_read(client, W83791D_REG_GPIO) & 0x10;
1347	if (has_fanpwm45) {
1348		err = sysfs_create_group(&client->dev.kobj,
1349					 &w83791d_group_fanpwm45);
1350		if (err)
1351			goto error4;
1352	}
1353
1354	/* Everything is ready, now register the working device */
1355	data->hwmon_dev = hwmon_device_register(dev);
1356	if (IS_ERR(data->hwmon_dev)) {
1357		err = PTR_ERR(data->hwmon_dev);
1358		goto error5;
1359	}
1360
1361	return 0;
1362
1363error5:
1364	if (has_fanpwm45)
1365		sysfs_remove_group(&client->dev.kobj, &w83791d_group_fanpwm45);
1366error4:
1367	sysfs_remove_group(&client->dev.kobj, &w83791d_group);
1368error3:
1369	if (data->lm75[0] != NULL)
1370		i2c_unregister_device(data->lm75[0]);
1371	if (data->lm75[1] != NULL)
1372		i2c_unregister_device(data->lm75[1]);
1373error1:
1374	kfree(data);
1375error0:
1376	return err;
1377}
1378
1379static int w83791d_remove(struct i2c_client *client)
1380{
1381	struct w83791d_data *data = i2c_get_clientdata(client);
1382
1383	hwmon_device_unregister(data->hwmon_dev);
1384	sysfs_remove_group(&client->dev.kobj, &w83791d_group);
1385
1386	if (data->lm75[0] != NULL)
1387		i2c_unregister_device(data->lm75[0]);
1388	if (data->lm75[1] != NULL)
1389		i2c_unregister_device(data->lm75[1]);
1390
1391	kfree(data);
1392	return 0;
1393}
1394
1395static void w83791d_init_client(struct i2c_client *client)
1396{
1397	struct w83791d_data *data = i2c_get_clientdata(client);
1398	u8 tmp;
1399	u8 old_beep;
1400
1401	/* The difference between reset and init is that reset
1402	   does a hard reset of the chip via index 0x40, bit 7,
1403	   but init simply forces certain registers to have "sane"
1404	   values. The hope is that the BIOS has done the right
1405	   thing (which is why the default is reset=0, init=0),
1406	   but if not, reset is the hard hammer and init
1407	   is the soft mallet both of which are trying to whack
1408	   things into place...
1409	   NOTE: The data sheet makes a distinction between
1410	   "power on defaults" and "reset by MR". As far as I can tell,
1411	   the hard reset puts everything into a power-on state so I'm
1412	   not sure what "reset by MR" means or how it can happen.
1413	   */
1414	if (reset || init) {
1415		/* keep some BIOS settings when we... */
1416		old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG);
1417
1418		if (reset) {
1419			/* ... reset the chip and ... */
1420			w83791d_write(client, W83791D_REG_CONFIG, 0x80);
1421		}
1422
1423		/* ... disable power-on abnormal beep */
1424		w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80);
1425
1426		/* disable the global beep (not done by hard reset) */
1427		tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]);
1428		w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef);
1429
1430		if (init) {
1431			/* Make sure monitoring is turned on for add-ons */
1432			tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG);
1433			if (tmp & 1) {
1434				w83791d_write(client, W83791D_REG_TEMP2_CONFIG,
1435					tmp & 0xfe);
1436			}
1437
1438			tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG);
1439			if (tmp & 1) {
1440				w83791d_write(client, W83791D_REG_TEMP3_CONFIG,
1441					tmp & 0xfe);
1442			}
1443
1444			/* Start monitoring */
1445			tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7;
1446			w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01);
1447		}
1448	}
1449
1450	data->vrm = vid_which_vrm();
1451}
1452
1453static struct w83791d_data *w83791d_update_device(struct device *dev)
1454{
1455	struct i2c_client *client = to_i2c_client(dev);
1456	struct w83791d_data *data = i2c_get_clientdata(client);
1457	int i, j;
1458	u8 reg_array_tmp[3];
1459	u8 vbat_reg;
1460
1461	mutex_lock(&data->update_lock);
1462
1463	if (time_after(jiffies, data->last_updated + (HZ * 3))
1464			|| !data->valid) {
1465		dev_dbg(dev, "Starting w83791d device update\n");
1466
1467		/* Update the voltages measured value and limits */
1468		for (i = 0; i < NUMBER_OF_VIN; i++) {
1469			data->in[i] = w83791d_read(client,
1470						W83791D_REG_IN[i]);
1471			data->in_max[i] = w83791d_read(client,
1472						W83791D_REG_IN_MAX[i]);
1473			data->in_min[i] = w83791d_read(client,
1474						W83791D_REG_IN_MIN[i]);
1475		}
1476
1477		/* Update the fan counts and limits */
1478		for (i = 0; i < NUMBER_OF_FANIN; i++) {
1479			/* Update the Fan measured value and limits */
1480			data->fan[i] = w83791d_read(client,
1481						W83791D_REG_FAN[i]);
1482			data->fan_min[i] = w83791d_read(client,
1483						W83791D_REG_FAN_MIN[i]);
1484		}
1485
1486		/* Update the fan divisor */
1487		for (i = 0; i < 3; i++) {
1488			reg_array_tmp[i] = w83791d_read(client,
1489						W83791D_REG_FAN_DIV[i]);
1490		}
1491		data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03;
1492		data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03;
1493		data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03;
1494		data->fan_div[3] = reg_array_tmp[2] & 0x07;
1495		data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07;
1496
1497		/* The fan divisor for fans 0-2 get bit 2 from
1498		   bits 5-7 respectively of vbat register */
1499		vbat_reg = w83791d_read(client, W83791D_REG_VBAT);
1500		for (i = 0; i < 3; i++)
1501			data->fan_div[i] |= (vbat_reg >> (3 + i)) & 0x04;
1502
1503		/* Update PWM duty cycle */
1504		for (i = 0; i < NUMBER_OF_PWM; i++) {
1505			data->pwm[i] =  w83791d_read(client,
1506						W83791D_REG_PWM[i]);
1507		}
1508
1509		/* Update PWM enable status */
1510		for (i = 0; i < 2; i++) {
1511			reg_array_tmp[i] = w83791d_read(client,
1512						W83791D_REG_FAN_CFG[i]);
1513		}
1514		data->pwm_enable[0] = (reg_array_tmp[0] >> 2) & 0x03;
1515		data->pwm_enable[1] = (reg_array_tmp[0] >> 4) & 0x03;
1516		data->pwm_enable[2] = (reg_array_tmp[1] >> 2) & 0x03;
1517
1518		/* Update PWM target temperature */
1519		for (i = 0; i < 3; i++) {
1520			data->temp_target[i] = w83791d_read(client,
1521				W83791D_REG_TEMP_TARGET[i]) & 0x7f;
1522		}
1523
1524		/* Update PWM temperature tolerance */
1525		for (i = 0; i < 2; i++) {
1526			reg_array_tmp[i] = w83791d_read(client,
1527					W83791D_REG_TEMP_TOL[i]);
1528		}
1529		data->temp_tolerance[0] = reg_array_tmp[0] & 0x0f;
1530		data->temp_tolerance[1] = (reg_array_tmp[0] >> 4) & 0x0f;
1531		data->temp_tolerance[2] = reg_array_tmp[1] & 0x0f;
1532
1533		/* Update the first temperature sensor */
1534		for (i = 0; i < 3; i++) {
1535			data->temp1[i] = w83791d_read(client,
1536						W83791D_REG_TEMP1[i]);
1537		}
1538
1539		/* Update the rest of the temperature sensors */
1540		for (i = 0; i < 2; i++) {
1541			for (j = 0; j < 3; j++) {
1542				data->temp_add[i][j] =
1543					(w83791d_read(client,
1544					W83791D_REG_TEMP_ADD[i][j * 2]) << 8) |
1545					w83791d_read(client,
1546					W83791D_REG_TEMP_ADD[i][j * 2 + 1]);
1547			}
1548		}
1549
1550		/* Update the realtime status */
1551		data->alarms =
1552			w83791d_read(client, W83791D_REG_ALARM1) +
1553			(w83791d_read(client, W83791D_REG_ALARM2) << 8) +
1554			(w83791d_read(client, W83791D_REG_ALARM3) << 16);
1555
1556		/* Update the beep configuration information */
1557		data->beep_mask =
1558			w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) +
1559			(w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) +
1560			(w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16);
1561
1562		/* Extract global beep enable flag */
1563		data->beep_enable =
1564			(data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01;
1565
1566		/* Update the cpu voltage information */
1567		i = w83791d_read(client, W83791D_REG_VID_FANDIV);
1568		data->vid = i & 0x0f;
1569		data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01)
1570				<< 4;
1571
1572		data->last_updated = jiffies;
1573		data->valid = 1;
1574	}
1575
1576	mutex_unlock(&data->update_lock);
1577
1578#ifdef DEBUG
1579	w83791d_print_debug(data, dev);
1580#endif
1581
1582	return data;
1583}
1584
1585#ifdef DEBUG
1586static void w83791d_print_debug(struct w83791d_data *data, struct device *dev)
1587{
1588	int i = 0, j = 0;
1589
1590	dev_dbg(dev, "======Start of w83791d debug values======\n");
1591	dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN);
1592	for (i = 0; i < NUMBER_OF_VIN; i++) {
1593		dev_dbg(dev, "vin[%d] is:     0x%02x\n", i, data->in[i]);
1594		dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]);
1595		dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]);
1596	}
1597	dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN);
1598	for (i = 0; i < NUMBER_OF_FANIN; i++) {
1599		dev_dbg(dev, "fan[%d] is:     0x%02x\n", i, data->fan[i]);
1600		dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]);
1601		dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]);
1602	}
1603
1604	/* temperature math is signed, but only print out the
1605	   bits that matter */
1606	dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN);
1607	for (i = 0; i < 3; i++) {
1608		dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]);
1609	}
1610	for (i = 0; i < 2; i++) {
1611		for (j = 0; j < 3; j++) {
1612			dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j,
1613				(u16) data->temp_add[i][j]);
1614		}
1615	}
1616
1617	dev_dbg(dev, "Misc Information: ===>\n");
1618	dev_dbg(dev, "alarm is:     0x%08x\n", data->alarms);
1619	dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask);
1620	dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable);
1621	dev_dbg(dev, "vid is: 0x%02x\n", data->vid);
1622	dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm);
1623	dev_dbg(dev, "=======End of w83791d debug values========\n");
1624	dev_dbg(dev, "\n");
1625}
1626#endif
1627
1628static int __init sensors_w83791d_init(void)
1629{
1630	return i2c_add_driver(&w83791d_driver);
1631}
1632
1633static void __exit sensors_w83791d_exit(void)
1634{
1635	i2c_del_driver(&w83791d_driver);
1636}
1637
1638MODULE_AUTHOR("Charles Spirakis <bezaur@gmail.com>");
1639MODULE_DESCRIPTION("W83791D driver");
1640MODULE_LICENSE("GPL");
1641
1642module_init(sensors_w83791d_init);
1643module_exit(sensors_w83791d_exit);
1644