ehca_classes.h revision 0b776eb5426752d4e53354ac89e3710d857e09a7 
1/*
2 *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3 *
4 *  Struct definition for eHCA internal structures
5 *
6 *  Authors: Heiko J Schick <schickhj@de.ibm.com>
7 *           Christoph Raisch <raisch@de.ibm.com>
8 *           Joachim Fenkes <fenkes@de.ibm.com>
9 *
10 *  Copyright (c) 2005 IBM Corporation
11 *
12 *  All rights reserved.
13 *
14 *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
15 *  BSD.
16 *
17 * OpenIB BSD License
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *
22 * Redistributions of source code must retain the above copyright notice, this
23 * list of conditions and the following disclaimer.
24 *
25 * Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials
28 * provided with the distribution.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
34 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
37 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
38 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43#ifndef __EHCA_CLASSES_H__
44#define __EHCA_CLASSES_H__
45
46struct ehca_module;
47struct ehca_qp;
48struct ehca_cq;
49struct ehca_eq;
50struct ehca_mr;
51struct ehca_mw;
52struct ehca_pd;
53struct ehca_av;
54
55#include <linux/wait.h>
56#include <linux/mutex.h>
57
58#include <rdma/ib_verbs.h>
59#include <rdma/ib_user_verbs.h>
60
61#ifdef CONFIG_PPC64
62#include "ehca_classes_pSeries.h"
63#endif
64#include "ipz_pt_fn.h"
65#include "ehca_qes.h"
66#include "ehca_irq.h"
67
68#define EHCA_EQE_CACHE_SIZE 20
69
70struct ehca_eqe_cache_entry {
71	struct ehca_eqe *eqe;
72	struct ehca_cq *cq;
73};
74
75struct ehca_eq {
76	u32 length;
77	struct ipz_queue ipz_queue;
78	struct ipz_eq_handle ipz_eq_handle;
79	struct work_struct work;
80	struct h_galpas galpas;
81	int is_initialized;
82	struct ehca_pfeq pf;
83	spinlock_t spinlock;
84	struct tasklet_struct interrupt_task;
85	u32 ist;
86	spinlock_t irq_spinlock;
87	struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
88};
89
90struct ehca_sma_attr {
91	u16 lid, lmc, sm_sl, sm_lid;
92	u16 pkey_tbl_len, pkeys[16];
93};
94
95struct ehca_sport {
96	struct ib_cq *ibcq_aqp1;
97	struct ib_qp *ibqp_aqp1;
98	enum ib_rate  rate;
99	enum ib_port_state port_state;
100	struct ehca_sma_attr saved_attr;
101};
102
103#define HCA_CAP_MR_PGSIZE_4K  0x80000000
104#define HCA_CAP_MR_PGSIZE_64K 0x40000000
105#define HCA_CAP_MR_PGSIZE_1M  0x20000000
106#define HCA_CAP_MR_PGSIZE_16M 0x10000000
107
108struct ehca_shca {
109	struct ib_device ib_device;
110	struct of_device *ofdev;
111	u8 num_ports;
112	int hw_level;
113	struct list_head shca_list;
114	struct ipz_adapter_handle ipz_hca_handle;
115	struct ehca_sport sport[2];
116	struct ehca_eq eq;
117	struct ehca_eq neq;
118	struct ehca_mr *maxmr;
119	struct ehca_pd *pd;
120	struct h_galpas galpas;
121	struct mutex modify_mutex;
122	u64 hca_cap;
123	/* MR pgsize: bit 0-3 means 4K, 64K, 1M, 16M respectively */
124	u32 hca_cap_mr_pgsize;
125	int max_mtu;
126};
127
128struct ehca_pd {
129	struct ib_pd ib_pd;
130	struct ipz_pd fw_pd;
131	u32 ownpid;
132	/* small queue mgmt */
133	struct mutex lock;
134	struct list_head free[2];
135	struct list_head full[2];
136};
137
138enum ehca_ext_qp_type {
139	EQPT_NORMAL    = 0,
140	EQPT_LLQP      = 1,
141	EQPT_SRQBASE   = 2,
142	EQPT_SRQ       = 3,
143};
144
145struct ehca_qp {
146	union {
147		struct ib_qp ib_qp;
148		struct ib_srq ib_srq;
149	};
150	u32 qp_type;
151	enum ehca_ext_qp_type ext_type;
152	struct ipz_queue ipz_squeue;
153	struct ipz_queue ipz_rqueue;
154	struct h_galpas galpas;
155	u32 qkey;
156	u32 real_qp_num;
157	u32 token;
158	spinlock_t spinlock_s;
159	spinlock_t spinlock_r;
160	u32 sq_max_inline_data_size;
161	struct ipz_qp_handle ipz_qp_handle;
162	struct ehca_pfqp pf;
163	struct ib_qp_init_attr init_attr;
164	struct ehca_cq *send_cq;
165	struct ehca_cq *recv_cq;
166	unsigned int sqerr_purgeflag;
167	struct hlist_node list_entries;
168	/* mmap counter for resources mapped into user space */
169	u32 mm_count_squeue;
170	u32 mm_count_rqueue;
171	u32 mm_count_galpa;
172};
173
174#define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
175#define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
176#define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)
177
178/* must be power of 2 */
179#define QP_HASHTAB_LEN 8
180
181struct ehca_cq {
182	struct ib_cq ib_cq;
183	struct ipz_queue ipz_queue;
184	struct h_galpas galpas;
185	spinlock_t spinlock;
186	u32 cq_number;
187	u32 token;
188	u32 nr_of_entries;
189	struct ipz_cq_handle ipz_cq_handle;
190	struct ehca_pfcq pf;
191	spinlock_t cb_lock;
192	struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
193	struct list_head entry;
194	u32 nr_callbacks;   /* #events assigned to cpu by scaling code */
195	atomic_t nr_events; /* #events seen */
196	wait_queue_head_t wait_completion;
197	spinlock_t task_lock;
198	u32 ownpid;
199	/* mmap counter for resources mapped into user space */
200	u32 mm_count_queue;
201	u32 mm_count_galpa;
202};
203
204enum ehca_mr_flag {
205	EHCA_MR_FLAG_FMR = 0x80000000,	 /* FMR, created with ehca_alloc_fmr */
206	EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR                           */
207};
208
209struct ehca_mr {
210	union {
211		struct ib_mr ib_mr;	/* must always be first in ehca_mr */
212		struct ib_fmr ib_fmr;	/* must always be first in ehca_mr */
213	} ib;
214	struct ib_umem *umem;
215	spinlock_t mrlock;
216
217	enum ehca_mr_flag flags;
218	u32 num_kpages;		/* number of kernel pages */
219	u32 num_hwpages;	/* number of hw pages to form MR */
220	u64 hwpage_size;	/* hw page size used for this MR */
221	int acl;		/* ACL (stored here for usage in reregister) */
222	u64 *start;		/* virtual start address (stored here for */
223				/* usage in reregister) */
224	u64 size;		/* size (stored here for usage in reregister) */
225	u32 fmr_page_size;	/* page size for FMR */
226	u32 fmr_max_pages;	/* max pages for FMR */
227	u32 fmr_max_maps;	/* max outstanding maps for FMR */
228	u32 fmr_map_cnt;	/* map counter for FMR */
229	/* fw specific data */
230	struct ipz_mrmw_handle ipz_mr_handle;	/* MR handle for h-calls */
231	struct h_galpas galpas;
232};
233
234struct ehca_mw {
235	struct ib_mw ib_mw;	/* gen2 mw, must always be first in ehca_mw */
236	spinlock_t mwlock;
237
238	u8 never_bound;		/* indication MW was never bound */
239	struct ipz_mrmw_handle ipz_mw_handle;	/* MW handle for h-calls */
240	struct h_galpas galpas;
241};
242
243enum ehca_mr_pgi_type {
244	EHCA_MR_PGI_PHYS   = 1,  /* type of ehca_reg_phys_mr,
245				  * ehca_rereg_phys_mr,
246				  * ehca_reg_internal_maxmr */
247	EHCA_MR_PGI_USER   = 2,  /* type of ehca_reg_user_mr */
248	EHCA_MR_PGI_FMR    = 3   /* type of ehca_map_phys_fmr */
249};
250
251struct ehca_mr_pginfo {
252	enum ehca_mr_pgi_type type;
253	u64 num_kpages;
254	u64 kpage_cnt;
255	u64 hwpage_size;     /* hw page size used for this MR */
256	u64 num_hwpages;     /* number of hw pages */
257	u64 hwpage_cnt;      /* counter for hw pages */
258	u64 next_hwpage;     /* next hw page in buffer/chunk/listelem */
259
260	union {
261		struct { /* type EHCA_MR_PGI_PHYS section */
262			int num_phys_buf;
263			struct ib_phys_buf *phys_buf_array;
264			u64 next_buf;
265		} phy;
266		struct { /* type EHCA_MR_PGI_USER section */
267			struct ib_umem *region;
268			struct ib_umem_chunk *next_chunk;
269			u64 next_nmap;
270		} usr;
271		struct { /* type EHCA_MR_PGI_FMR section */
272			u64 fmr_pgsize;
273			u64 *page_list;
274			u64 next_listelem;
275		} fmr;
276	} u;
277};
278
279/* output parameters for MR/FMR hipz calls */
280struct ehca_mr_hipzout_parms {
281	struct ipz_mrmw_handle handle;
282	u32 lkey;
283	u32 rkey;
284	u64 len;
285	u64 vaddr;
286	u32 acl;
287};
288
289/* output parameters for MW hipz calls */
290struct ehca_mw_hipzout_parms {
291	struct ipz_mrmw_handle handle;
292	u32 rkey;
293};
294
295struct ehca_av {
296	struct ib_ah ib_ah;
297	struct ehca_ud_av av;
298};
299
300struct ehca_ucontext {
301	struct ib_ucontext ib_ucontext;
302};
303
304int ehca_init_pd_cache(void);
305void ehca_cleanup_pd_cache(void);
306int ehca_init_cq_cache(void);
307void ehca_cleanup_cq_cache(void);
308int ehca_init_qp_cache(void);
309void ehca_cleanup_qp_cache(void);
310int ehca_init_av_cache(void);
311void ehca_cleanup_av_cache(void);
312int ehca_init_mrmw_cache(void);
313void ehca_cleanup_mrmw_cache(void);
314int ehca_init_small_qp_cache(void);
315void ehca_cleanup_small_qp_cache(void);
316
317extern rwlock_t ehca_qp_idr_lock;
318extern rwlock_t ehca_cq_idr_lock;
319extern struct idr ehca_qp_idr;
320extern struct idr ehca_cq_idr;
321
322extern int ehca_static_rate;
323extern int ehca_port_act_time;
324extern int ehca_use_hp_mr;
325extern int ehca_scaling_code;
326
327struct ipzu_queue_resp {
328	u32 qe_size;      /* queue entry size */
329	u32 act_nr_of_sg;
330	u32 queue_length; /* queue length allocated in bytes */
331	u32 pagesize;
332	u32 toggle_state;
333	u32 offset; /* save offset within a page for small_qp */
334};
335
336struct ehca_create_cq_resp {
337	u32 cq_number;
338	u32 token;
339	struct ipzu_queue_resp ipz_queue;
340	u32 fw_handle_ofs;
341	u32 dummy;
342};
343
344struct ehca_create_qp_resp {
345	u32 qp_num;
346	u32 token;
347	u32 qp_type;
348	u32 ext_type;
349	u32 qkey;
350	/* qp_num assigned by ehca: sqp0/1 may have got different numbers */
351	u32 real_qp_num;
352	u32 fw_handle_ofs;
353	u32 dummy;
354	struct ipzu_queue_resp ipz_squeue;
355	struct ipzu_queue_resp ipz_rqueue;
356};
357
358struct ehca_alloc_cq_parms {
359	u32 nr_cqe;
360	u32 act_nr_of_entries;
361	u32 act_pages;
362	struct ipz_eq_handle eq_handle;
363};
364
365enum ehca_service_type {
366	ST_RC  = 0,
367	ST_UC  = 1,
368	ST_RD  = 2,
369	ST_UD  = 3,
370};
371
372enum ehca_ll_comp_flags {
373	LLQP_SEND_COMP = 0x20,
374	LLQP_RECV_COMP = 0x40,
375	LLQP_COMP_MASK = 0x60,
376};
377
378struct ehca_alloc_queue_parms {
379	/* input parameters */
380	int max_wr;
381	int max_sge;
382	int page_size;
383	int is_small;
384
385	/* output parameters */
386	u16 act_nr_wqes;
387	u8  act_nr_sges;
388	u32 queue_size; /* bytes for small queues, pages otherwise */
389};
390
391struct ehca_alloc_qp_parms {
392	struct ehca_alloc_queue_parms squeue;
393	struct ehca_alloc_queue_parms rqueue;
394
395	/* input parameters */
396	enum ehca_service_type servicetype;
397	int qp_storage;
398	int sigtype;
399	enum ehca_ext_qp_type ext_type;
400	enum ehca_ll_comp_flags ll_comp_flags;
401	int ud_av_l_key_ctl;
402
403	u32 token;
404	struct ipz_eq_handle eq_handle;
405	struct ipz_pd pd;
406	struct ipz_cq_handle send_cq_handle, recv_cq_handle;
407
408	u32 srq_qpn, srq_token, srq_limit;
409
410	/* output parameters */
411	u32 real_qp_num;
412	struct ipz_qp_handle qp_handle;
413	struct h_galpas galpas;
414};
415
416int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
417int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
418struct ehca_qp *ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
419
420#endif
421