1bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/******************************************************************************* 2bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 3bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Intel PRO/1000 Linux driver 40d6057e48b9d2004024e97252da83dce0661b131Bruce Allan Copyright(c) 1999 - 2011 Intel Corporation. 5bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok This program is free software; you can redistribute it and/or modify it 7bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok under the terms and conditions of the GNU General Public License, 8bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok version 2, as published by the Free Software Foundation. 9bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 10bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok This program is distributed in the hope it will be useful, but WITHOUT 11bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok more details. 14bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 15bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok You should have received a copy of the GNU General Public License along with 16bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok this program; if not, write to the Free Software Foundation, Inc., 17bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 19bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok The full GNU General Public License is included in this distribution in 20bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok the file called "COPYING". 21bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 22bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Contact Information: 23bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Linux NICS <linux.nics@intel.com> 24bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 27bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok*******************************************************************************/ 28bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 29bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Linux PRO/1000 Ethernet Driver main header file */ 30bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 31bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#ifndef _E1000_H_ 32bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define _E1000_H_ 33bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 3486d70e532c352bd309dab5f1d18d113f441cb3aeJeff Kirsher#include <linux/bitops.h> 35bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/types.h> 36bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/timer.h> 37bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/workqueue.h> 38bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/io.h> 39bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/netdevice.h> 40d8014dbca7f5d2d6f0fdb47e5286bd2d887f7065Bruce Allan#include <linux/pci.h> 416f461f6c7c961f0b1b73c0f27becf472a0ac606bBruce Allan#include <linux/pci-aspm.h> 42fe46f58fa61f025564a3c1e80b789885cb4b0f30Bruce Allan#include <linux/crc32.h> 4386d70e532c352bd309dab5f1d18d113f441cb3aeJeff Kirsher#include <linux/if_vlan.h> 44bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 45bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include "hw.h" 46bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 47bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_info; 48bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 4944defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_dbg(format, arg...) \ 508544b9f7371ec6a7a5c0f8701ddde9e98f52a37eBruce Allan netdev_dbg(hw->adapter->netdev, format, ## arg) 5144defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_err(format, arg...) \ 528544b9f7371ec6a7a5c0f8701ddde9e98f52a37eBruce Allan netdev_err(adapter->netdev, format, ## arg) 5344defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_info(format, arg...) \ 548544b9f7371ec6a7a5c0f8701ddde9e98f52a37eBruce Allan netdev_info(adapter->netdev, format, ## arg) 5544defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_warn(format, arg...) \ 568544b9f7371ec6a7a5c0f8701ddde9e98f52a37eBruce Allan netdev_warn(adapter->netdev, format, ## arg) 5744defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_notice(format, arg...) \ 588544b9f7371ec6a7a5c0f8701ddde9e98f52a37eBruce Allan netdev_notice(adapter->netdev, format, ## arg) 59bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 60bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6198a1708de1bfa5fe1c490febba850d6043d3c7faMartin Olsson/* Interrupt modes, as used by the IntMode parameter */ 624662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_LEGACY 0 634662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_MSI 1 644662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_MSIX 2 654662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 66ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan/* Tx/Rx descriptor defines */ 67bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_DEFAULT_TXD 256 68bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MAX_TXD 4096 697b1be1987c1e8163b3631dcd1ce4f03707d60c3bAuke Kok#define E1000_MIN_TXD 64 70bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 71bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_DEFAULT_RXD 256 72bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MAX_RXD 4096 737b1be1987c1e8163b3631dcd1ce4f03707d60c3bAuke Kok#define E1000_MIN_RXD 64 74bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 75de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ 76de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */ 77de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok 78bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Early Receive defines */ 79bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_ERT_2048 0x100 80bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 81bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */ 82bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 83bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* How many Tx Descriptors do we need to call netif_wake_queue ? */ 84bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* How many Rx Buffers do we bundle into one write to the hardware ? */ 85bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 86bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 87bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define AUTO_ALL_MODES 0 88bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_EEPROM_APME 0x0400 89bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 90bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MNG_VLAN_NONE (-1) 91bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 92bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Number of packet split data buffers (not including the header buffer) */ 93bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) 94bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 952adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan#define DEFAULT_JUMBO 9234 962adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan 97a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan/* BM/HV Specific Registers */ 98a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_PORT_CTRL_PAGE 769 99a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 100a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define PHY_UPPER_SHIFT 21 101a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_PHY_REG(page, reg) \ 102a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((reg) & MAX_PHY_REG_ADDRESS) |\ 103a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\ 104a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT))) 105a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 106a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan/* PHY Wakeup Registers and defines */ 1073ebfc7c9a6177794e0a1635483bd64268bed5d3cBruce Allan#define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17) 108a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0) 109a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUC PHY_REG(BM_WUC_PAGE, 1) 110a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) 111a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUS PHY_REG(BM_WUC_PAGE, 3) 112a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) 113a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) 114a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) 115a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) 116a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) 117a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 118a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */ 119a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */ 120a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */ 121a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */ 122a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */ 123a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */ 124a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */ 125a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 1262b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_STATS_PAGE 778 1272b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */ 1282b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17) 1292b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */ 1302b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19) 1312b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */ 1322b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21) 1332b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */ 1342b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24) 1352b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */ 1362b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26) 1372b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */ 1382b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28) 1392b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */ 1402b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan#define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30) 141a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 14238eb394e33d65abb9d05411547d2058db53b4d23Bruce Allan#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */ 14338eb394e33d65abb9d05411547d2058db53b4d23Bruce Allan 1441d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan/* BM PHY Copper Specific Status */ 1451d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS 17 1461d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_LINK_UP 0x0400 1471d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_RESOLVED 0x0800 1481d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_SPEED_MASK 0xC000 1491d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_SPEED_1000 0x8000 1501d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan 1511d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan/* 82577 Mobile Phy Status Register */ 1521d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS 26 1531d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 1541d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_SPEED_MASK 0x0300 1551d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_SPEED_1000 0x0200 1561d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_LINK_UP 0x0040 1571d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan 158c6e7f51e73c1bc6044bce989ec503ef2e4758d55Bruce Allan#define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */ 159c6e7f51e73c1bc6044bce989ec503ef2e4758d55Bruce Allan#define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000 160c6e7f51e73c1bc6044bce989ec503ef2e4758d55Bruce Allan 16123606cf5d1192c2b17912cb2ef6e62f9b11de133Rafael J. Wysocki/* Time to wait before putting the device into D3 if there's no link (in ms). */ 16223606cf5d1192c2b17912cb2ef6e62f9b11de133Rafael J. Wysocki#define LINK_TIMEOUT 100 16323606cf5d1192c2b17912cb2ef6e62f9b11de133Rafael J. Wysocki 1643a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define DEFAULT_RDTR 0 1653a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define DEFAULT_RADV 8 1663a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define BURST_RDTR 0x20 1673a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define BURST_RADV 0x20 1683a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 1693a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg/* 1703a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg * in the case of WTHRESH, it appears at least the 82571/2 hardware 1713a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when 1723a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg * WTHRESH=4, and since we want 64 bytes at a time written back, set 1733a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg * it to 5 1743a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg */ 1753a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define E1000_TXDCTL_DMA_BURST_ENABLE \ 1763a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \ 1773a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg E1000_TXDCTL_COUNT_DESC | \ 1783a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (5 << 16) | /* wthresh must be +1 more than desired */\ 1793a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (1 << 8) | /* hthresh */ \ 1803a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 0x1f) /* pthresh */ 1813a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 1823a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define E1000_RXDCTL_DMA_BURST_ENABLE \ 1833a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (0x01000000 | /* set descriptor granularity */ \ 1843a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (4 << 16) | /* set writeback threshold */ \ 1853a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg (4 << 8) | /* set prefetch threshold */ \ 1863a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 0x20) /* set hthresh */ 1873a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 1883a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define E1000_TIDV_FPD (1 << 31) 1893a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define E1000_RDTR_FPD (1 << 31) 1903a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg 191bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum e1000_boards { 192bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82571, 193bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82572, 194bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82573, 1954662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan board_82574, 1968c81c9c315b7e7e240906fab0e8dde1595101bd2Alexander Duyck board_82583, 197bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_80003es2lan, 198bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_ich8lan, 199bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_ich9lan, 200f4187b56e1f8a05dd110875d5094b21b51ebd79bBruce Allan board_ich10lan, 201a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan board_pchlan, 202d3738bb8203acf8552c3ec8b3447133fc0938dddBruce Allan board_pch2lan, 203bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 204bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 205bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_ps_page { 206bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct page *page; 207bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 dma; /* must be u64 - written to hw */ 208bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 209bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 210bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* 211bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok * wrappers around a pointer to a socket buffer, 212bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok * so a DMA handle can be stored along with the buffer 213bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 214bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_buffer { 215bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok dma_addr_t dma; 216bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct sk_buff *skb; 217bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok union { 218ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Tx */ 219bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct { 220bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long time_stamp; 221bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 length; 222bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_watch; 2239ed318d546a29d7a591dbe648fd1a2efe3be1180Tom Herbert unsigned int segs; 2249ed318d546a29d7a591dbe648fd1a2efe3be1180Tom Herbert unsigned int bytecount; 22503b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck u16 mapped_as_page; 226bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok }; 227ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Rx */ 22803b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct { 22903b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck /* arrays of page information for packet split */ 23003b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct e1000_ps_page *ps_pages; 23103b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct page *page; 23203b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck }; 233bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok }; 234bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 235bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 236bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_ring { 237bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok void *desc; /* pointer to ring memory */ 238bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok dma_addr_t dma; /* phys address of ring */ 239bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int size; /* length of ring in bytes */ 240bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int count; /* number of desc. in ring */ 241bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 242bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_use; 243bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_clean; 244bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 245bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 head; 246bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 tail; 247bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 248bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* array of buffer information structs */ 249bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_buffer *buffer_info; 250bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 2514662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan char name[IFNAMSIZ + 5]; 2524662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 ims_val; 2534662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 itr_val; 2544662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u16 itr_register; 2554662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan int set_itr; 2564662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 257bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct sk_buff *rx_skb_top; 258bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 259bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 2607c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan/* PHY register snapshot values */ 2617c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allanstruct e1000_phy_regs { 2627c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 bmcr; /* basic mode control register */ 2637c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 bmsr; /* basic mode status register */ 2647c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 advertise; /* auto-negotiation advertisement */ 2657c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 lpa; /* link partner ability register */ 2667c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 expansion; /* auto-negotiation expansion reg */ 2677c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 ctrl1000; /* 1000BASE-T control register */ 2687c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 stat1000; /* 1000BASE-T status register */ 2697c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 estatus; /* extended status register */ 2707c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan}; 2717c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan 272bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* board specific private data structure */ 273bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_adapter { 274bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list watchdog_timer; 275bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list phy_info_timer; 276bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list blink_timer; 277bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 278bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct work_struct reset_task; 279bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct work_struct watchdog_task; 280bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 281bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok const struct e1000_info *ei; 282bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 28386d70e532c352bd309dab5f1d18d113f441cb3aeJeff Kirsher unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 284bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 bd_number; 285bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_buffer_len; 286bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 mng_vlan_id; 287bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 link_speed; 288bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 link_duplex; 2898452759060ad46fc071a7d5bbf1647df5ea2ceabBruce Allan u16 eeprom_vers; 290bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 291bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* track device up/down/testing state */ 292bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long state; 293bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 294bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* Interrupt Throttle Rate */ 295bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 itr; 296bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 itr_setting; 297bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 tx_itr; 298bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 rx_itr; 299bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 300bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* 301ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan * Tx 302bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 303bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring *tx_ring /* One per active queue */ 304bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ____cacheline_aligned_in_smp; 305bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 306bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct napi_struct napi; 307bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 308bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int restart_queue; 309bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 txd_cmd; 310bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 311bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool detect_tx_hung; 31209357b00255c233705b1cf6d76a8d147340545b8Jeff Kirsher bool tx_hang_recheck; 313bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u8 tx_timeout_factor; 314bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 315bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_int_delay; 316bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_abs_int_delay; 317bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 318bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_tx_bytes; 319bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_tx_packets; 320bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_rx_bytes; 321bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_rx_packets; 322bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 323ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Tx stats */ 324bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 tpt_old; 325bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 colc_old; 3267c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u32 gotc; 3277c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u64 gotc_old; 328bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_timeout_count; 329bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_fifo_head; 330bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_head_addr; 331bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_fifo_size; 332bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_dma_failed; 333bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 334bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* 335ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan * Rx 336bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 337bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool (*clean_rx) (struct e1000_adapter *adapter, 338bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok int *work_done, int work_to_do) 339bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ____cacheline_aligned_in_smp; 340bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok void (*alloc_rx_buf) (struct e1000_adapter *adapter, 341c2fed9965c60e1f989f57889357c557f7b907ab7Jeff Kirsher int cleaned_count, gfp_t gfp); 342bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring *rx_ring; 343bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 344bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_int_delay; 345bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_abs_int_delay; 346bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 347ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Rx stats */ 348bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 hw_csum_err; 349bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 hw_csum_good; 350bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 rx_hdr_split; 3517c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u32 gorc; 3527c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u64 gorc_old; 353bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 alloc_rx_buff_failed; 354bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_dma_failed; 355bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 356bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int rx_ps_pages; 357bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 rx_ps_bsize0; 358318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher u32 max_frame_size; 359318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher u32 min_frame_size; 360bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 361bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* OS defined structs */ 362bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct net_device *netdev; 363bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct pci_dev *pdev; 364bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 365bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* structs defined in e1000_hw.h */ 366bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_hw hw; 367bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 36867fd4fcb78a7ced369a6bd8a131ec8c65ebd2bbbJeff Kirsher spinlock_t stats64_lock; 369bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_hw_stats stats; 370bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_phy_info phy_info; 371bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_phy_stats phy_stats; 372bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 3737c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan /* Snapshot of PHY registers */ 3747c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan struct e1000_phy_regs phy_regs; 3757c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan 376bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring test_tx_ring; 377bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring test_rx_ring; 378bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 test_icr; 379bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 380bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 msg_enable; 3818e86acd7d5968e08b3e1604e685a8c45f6fd7f40Jeff Kirsher unsigned int num_vectors; 3824662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan struct msix_entry *msix_entries; 3834662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan int int_mode; 3844662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 eiac_mask; 385bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 386bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 eeprom_wol; 387bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 wol; 388bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 pba; 3892adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan u32 max_hw_frame_size; 390bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 391318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher bool fc_autoneg; 392bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 393bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int flags; 394eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher unsigned int flags2; 395a8f88ff5a5abc2ce9f7d7d2694178b2c617d713aJesse Brandeburg struct work_struct downshift_task; 396a8f88ff5a5abc2ce9f7d7d2694178b2c617d713aJesse Brandeburg struct work_struct update_phy_task; 39741cec6f1160c110bd69597c2a5611b46e8287801Bruce Allan struct work_struct print_hang_task; 39823606cf5d1192c2b17912cb2ef6e62f9b11de133Rafael J. Wysocki 39923606cf5d1192c2b17912cb2ef6e62f9b11de133Rafael J. Wysocki bool idle_check; 400ff10e13cd06f3dbe90e9fffc3c2dd2057a116e4bCarolyn Wyborny int phy_hang_count; 401bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 402bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 403bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_info { 404bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok enum e1000_mac_type mac; 405bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int flags; 4066f461f6c7c961f0b1b73c0f27becf472a0ac606bBruce Allan unsigned int flags2; 407bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 pba; 4082adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan u32 max_hw_frame_size; 40969e3fd8ccc3d382b4ef72cade817ccd121d8911aJeff Kirsher s32 (*get_variants)(struct e1000_adapter *); 4108ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsher const struct e1000_mac_operations *mac_ops; 4118ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsher const struct e1000_phy_operations *phy_ops; 4128ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsher const struct e1000_nvm_operations *nvm_ops; 413bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 414bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 415bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* hardware capability, feature, and workaround flags */ 416bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_AMT (1 << 0) 417bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_FLASH (1 << 1) 418bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_HW_VLAN_FILTER (1 << 2) 419bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_WOL (1 << 3) 420bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_ERT (1 << 4) 421bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) 422bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 423bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 4244a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7Bruce Allan#define FLAG_READ_ONLY_NVM (1 << 8) 42597ac8caee238d2a81c23661916f7acd3a22c85feBruce Allan#define FLAG_IS_ICH (1 << 9) 4264662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define FLAG_HAS_MSIX (1 << 10) 427bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 428bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_IS_QUAD_PORT_A (1 << 12) 429bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_IS_QUAD_PORT (1 << 13) 430bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14) 431bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_IN_WUC (1 << 15) 432bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_IN_CTRL3 (1 << 16) 433bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_CHECK_PORT_B (1 << 17) 434bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18) 435bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_NO_WAKE_UCAST (1 << 19) 436bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_MNG_PT_ENABLED (1 << 20) 437bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_RESET_OVERWRITES_LAA (1 << 21) 438bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TARC_SPEED_MODE_BIT (1 << 22) 439bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TARC_SET_BIT_ZERO (1 << 23) 440bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_RX_NEEDS_RESTART (1 << 24) 441bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_LSC_GIG_SPEED_DROP (1 << 25) 442bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_SMART_POWER_DOWN (1 << 26) 443bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_MSI_ENABLED (1 << 27) 444dc221294719ae0f28cc260cc37edd439161088a9Bruce Allan/* reserved (1 << 28) */ 445bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TSO_FORCE (1 << 29) 446318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher#define FLAG_RX_RESTART_NOW (1 << 30) 447f8d59f7826aa73c5e7682fbed6db38020635d466Bruce Allan#define FLAG_MSI_TEST_FAILED (1 << 31) 448bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 449eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher#define FLAG2_CRC_STRIPPING (1 << 0) 450a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define FLAG2_HAS_PHY_WAKEUP (1 << 1) 451b94b50289622e816adc9f94111cfc2679c80177cJesse Brandeburg#define FLAG2_IS_DISCARDING (1 << 2) 4526f461f6c7c961f0b1b73c0f27becf472a0ac606bBruce Allan#define FLAG2_DISABLE_ASPM_L1 (1 << 3) 4538c7bbb925337705dd1459070ac620aeec6a29666Bruce Allan#define FLAG2_HAS_PHY_STATS (1 << 4) 454e52997f96008fda655d7ec3aa4297d1272e8a385Bruce Allan#define FLAG2_HAS_EEE (1 << 5) 4553a3b75860527a11ba5035c6aa576079245d09e2aJesse Brandeburg#define FLAG2_DMA_BURST (1 << 6) 45678cd29d5a92ae5067377ad42089f2c8781312f4aBruce Allan#define FLAG2_DISABLE_ASPM_L0S (1 << 7) 457828bac87bb074f3366621724fdfbe314f98ccc7eBruce Allan#define FLAG2_DISABLE_AIM (1 << 8) 458ff10e13cd06f3dbe90e9fffc3c2dd2057a116e4bCarolyn Wyborny#define FLAG2_CHECK_PHY_HANG (1 << 9) 4597f99ae633884043c70f4cc4a03f43dad0f0ecba2Bruce Allan#define FLAG2_NO_DISABLE_RX (1 << 10) 460c6e7f51e73c1bc6044bce989ec503ef2e4758d55Bruce Allan#define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11) 461eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher 462bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_RX_DESC_PS(R, i) \ 463bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) 4645f450212f281272f4ef81d96b79bf68cebdbc210Bruce Allan#define E1000_RX_DESC_EXT(R, i) \ 4655f450212f281272f4ef81d96b79bf68cebdbc210Bruce Allan (&(((union e1000_rx_desc_extended *)((R).desc))[i])) 466bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) 467bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) 468bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc) 469bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 470bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum e1000_state_t { 471bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_TESTING, 472bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_RESETTING, 473a90b412cb8c7ccc1689f9ea130883d00a1f0a5bbBruce Allan __E1000_ACCESS_SHARED_RESOURCE, 474bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_DOWN 475bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 476bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 477bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum latency_range { 478bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok lowest_latency = 0, 479bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok low_latency = 1, 480bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bulk_latency = 2, 481bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok latency_invalid = 255 482bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 483bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 484bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern char e1000e_driver_name[]; 485bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern const char e1000e_driver_version[]; 486bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 487bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_check_options(struct e1000_adapter *adapter); 488bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_ethtool_ops(struct net_device *netdev); 489bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 490bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_up(struct e1000_adapter *adapter); 491bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_down(struct e1000_adapter *adapter); 492bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reinit_locked(struct e1000_adapter *adapter); 493bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reset(struct e1000_adapter *adapter); 494bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_power_up_phy(struct e1000_adapter *adapter); 495bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_setup_rx_resources(struct e1000_adapter *adapter); 496bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_setup_tx_resources(struct e1000_adapter *adapter); 497bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_free_rx_resources(struct e1000_adapter *adapter); 498bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_free_tx_resources(struct e1000_adapter *adapter); 49967fd4fcb78a7ced369a6bd8a131ec8c65ebd2bbbJeff Kirsherextern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, 50067fd4fcb78a7ced369a6bd8a131ec8c65ebd2bbbJeff Kirsher struct rtnl_link_stats64 50167fd4fcb78a7ced369a6bd8a131ec8c65ebd2bbbJeff Kirsher *stats); 5024662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter); 5034662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter); 50431dbe5b4ac6fca72dec946e4d0fa7f0913f1d9b1Bruce Allanextern void e1000e_get_hw_control(struct e1000_adapter *adapter); 50531dbe5b4ac6fca72dec946e4d0fa7f0913f1d9b1Bruce Allanextern void e1000e_release_hw_control(struct e1000_adapter *adapter); 506bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 507bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern unsigned int copybreak; 508bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 509bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern char *e1000e_get_hw_dev_name(struct e1000_hw *hw); 510bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 5118ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_82571_info; 5128ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_82572_info; 5138ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_82573_info; 5148ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_82574_info; 5158ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_82583_info; 5168ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_ich8_info; 5178ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_ich9_info; 5188ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_ich10_info; 5198ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_pch_info; 5208ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_pch2_info; 5218ce9d6c725b01989d2b18ee1df853837388ceaf6Jeff Kirsherextern const struct e1000_info e1000_es2_info; 522bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 523073287c037083497ebaaf75ead469b769f218615Bruce Allanextern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, 524073287c037083497ebaaf75ead469b769f218615Bruce Allan u32 pba_num_size); 525bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 526bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_commit_phy(struct e1000_hw *hw); 527bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 528bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); 529bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 530bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_get_laa_state_82571(struct e1000_hw *hw); 531bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state); 532bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 5334a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7Bruce Allanextern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw); 534bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, 535bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool state); 536bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); 537bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); 53899730e4c13c8344b02dd96108945b48d28c14c25Bruce Allanextern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw); 53999730e4c13c8344b02dd96108945b48d28c14c25Bruce Allanextern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw); 540bb436b20fe0ea4231a233aae7f0f7de3a3f2f5c3Bruce Allanextern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); 541d3738bb8203acf8552c3ec8b3447133fc0938dddBruce Allanextern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable); 542d3738bb8203acf8552c3ec8b3447133fc0938dddBruce Allanextern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw); 543bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 544bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); 545bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); 546bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw); 547a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000e_setup_led_generic(struct e1000_hw *hw); 548bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw); 549bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_led_on_generic(struct e1000_hw *hw); 550bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_led_off_generic(struct e1000_hw *hw); 551bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw); 552f4d2dd4cd4d001f5dc20fc76c780c0c20c000c23Bruce Allanextern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); 553f4d2dd4cd4d001f5dc20fc76c780c0c20c000c23Bruce Allanextern void e1000_set_lan_id_single_port(struct e1000_hw *hw); 554bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex); 555bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex); 556bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_disable_pcie_master(struct e1000_hw *hw); 557bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw); 558bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_id_led_init(struct e1000_hw *hw); 559bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw); 560bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw); 561bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw); 562bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw); 563bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_link(struct e1000_hw *hw); 564caaddaf83501c79fe11b183c8972e60d8b7d5d56Bruce Allanextern void e1000_clear_vfta_generic(struct e1000_hw *hw); 565bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count); 566e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsherextern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw, 567e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsher u8 *mc_addr_list, 568ab8932f3e8e07df92d6ce3fa41f5af0dda865429Bruce Allan u32 mc_addr_count); 569bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); 570bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw); 571bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop); 572bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw); 573bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data); 574bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_config_collision_dist(struct e1000_hw *hw); 575bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw); 576bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_force_mac_fc(struct e1000_hw *hw); 577dbf80dcbd8ca0c50f343401fedd2d6200cb8097eBruce Allanextern s32 e1000e_blink_led_generic(struct e1000_hw *hw); 578caaddaf83501c79fe11b183c8972e60d8b7d5d56Bruce Allanextern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); 579608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allanextern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw); 580bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reset_adaptive(struct e1000_hw *hw); 581bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_update_adaptive(struct e1000_hw *hw); 582bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 583bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_copper_link(struct e1000_hw *hw); 584bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_id(struct e1000_hw *hw); 585bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_put_hw_semaphore(struct e1000_hw *hw); 586bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw); 587bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); 588bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); 589bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); 5902b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allanextern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page); 591bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); 5925ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, 5935ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 594bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); 595bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); 596bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); 5975ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, 5985ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 599bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); 600bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); 601bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cfg_done(struct e1000_hw *hw); 602bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw); 603bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); 604bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 605bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 606f4187b56e1f8a05dd110875d5094b21b51ebd79bBruce Allanextern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw); 607bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); 60897ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_determine_phy_address(struct e1000_hw *hw); 60997ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 61097ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 6112b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allanextern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, 6122b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan u16 *phy_reg); 6132b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allanextern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, 6142b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan u16 *phy_reg); 6154662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); 6164662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 617bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 618bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 6195ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, 6205ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 621bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 6225ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, 6235ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 624bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 625bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 usec_interval, bool *success); 626bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); 62717f208deb9bf88315aa72c08c866a235c399fb9aBruce Allanextern void e1000_power_up_phy_copper(struct e1000_hw *hw); 62817f208deb9bf88315aa72c08c866a235c399fb9aBruce Allanextern void e1000_power_down_phy_copper(struct e1000_hw *hw); 6292d9498f369706d6db174abd2e75b37732b9dbbdeDavid Grahamextern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); 6302d9498f369706d6db174abd2e75b37732b9dbbdeDavid Grahamextern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); 631bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_downshift(struct e1000_hw *hw); 632a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); 6335ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 6345ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 6352b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allanextern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, 6362b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan u16 *data); 637a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 6385ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 6395ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 6402b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allanextern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, 6412b6b168d52aa044363647cfff8bda5cef8068ca3Bruce Allan u16 data); 642a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 643a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 644a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_check_polarity_82577(struct e1000_hw *hw); 645a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_get_phy_info_82577(struct e1000_hw *hw); 646a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); 647a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_get_cable_length_82577(struct e1000_hw *hw); 648bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6490be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_m88(struct e1000_hw *hw); 6500be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_get_phy_info_ife(struct e1000_hw *hw); 6510be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_ife(struct e1000_hw *hw); 6520be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); 6530be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_igp(struct e1000_hw *hw); 654ff10e13cd06f3dbe90e9fffc3c2dd2057a116e4bCarolyn Wybornyextern bool e1000_check_phy_82574(struct e1000_hw *hw); 6550be8401051c716be4533272e983b7eed3d83946dBruce Allan 656bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 657bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 65894d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.reset(hw); 659bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 660bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 661bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_check_reset_block(struct e1000_hw *hw) 662bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 663bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return hw->phy.ops.check_reset_block(hw); 664bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 665bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 666bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data) 667bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 66894d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.read_reg(hw, offset, data); 669bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 670bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 671bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data) 672bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 67394d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.write_reg(hw, offset, data); 674bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 675bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 676bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_get_cable_length(struct e1000_hw *hw) 677bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 678bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return hw->phy.ops.get_cable_length(hw); 679bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 680bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 681bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_acquire_nvm(struct e1000_hw *hw); 682bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 683bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw); 684bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); 685bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 686bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw); 687bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_release_nvm(struct e1000_hw *hw); 688bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reload_nvm(struct e1000_hw *hw); 689608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allanextern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw); 690608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan 691608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allanstatic inline s32 e1000e_read_mac_addr(struct e1000_hw *hw) 692608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan{ 693608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan if (hw->mac.ops.read_mac_addr) 694608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan return hw->mac.ops.read_mac_addr(hw); 695608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan 696608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan return e1000_read_mac_addr_generic(hw); 697608f8a0d014db6cd18d4f535934d4b5d556e3013Bruce Allan} 698bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 699bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw) 700bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 70194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.validate(hw); 702bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 703bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 704bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw) 705bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 70694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.update(hw); 707bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 708bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 709bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) 710bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 71194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.read(hw, offset, words, data); 712bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 713bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 714bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) 715bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 71694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.write(hw, offset, words, data); 717bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 718bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 719bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_get_phy_info(struct e1000_hw *hw) 720bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 72194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.get_info(hw); 722bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 723bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 7244662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanstatic inline s32 e1000e_check_mng_mode(struct e1000_hw *hw) 7254662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan{ 7264662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan return hw->mac.ops.check_mng_mode(hw); 7274662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan} 7284662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 7294662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); 730bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 731bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 732bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 733bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline u32 __er32(struct e1000_hw *hw, unsigned long reg) 734bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 735bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return readl(hw->hw_addr + reg); 736bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 737bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 738bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) 739bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 740bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok writel(val, hw->hw_addr + reg); 741bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 742bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 743bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#endif /* _E1000_H_ */ 744