e1000.h revision b94b50289622e816adc9f94111cfc2679c80177c
1bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/******************************************************************************* 2bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 3bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Intel PRO/1000 Linux driver 4c7e54b1bf90480ca4bdfd1491ac6c4b7bfe07c03Bruce Allan Copyright(c) 1999 - 2009 Intel Corporation. 5bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok This program is free software; you can redistribute it and/or modify it 7bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok under the terms and conditions of the GNU General Public License, 8bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok version 2, as published by the Free Software Foundation. 9bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 10bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok This program is distributed in the hope it will be useful, but WITHOUT 11bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok more details. 14bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 15bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok You should have received a copy of the GNU General Public License along with 16bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok this program; if not, write to the Free Software Foundation, Inc., 17bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 19bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok The full GNU General Public License is included in this distribution in 20bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok the file called "COPYING". 21bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 22bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Contact Information: 23bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Linux NICS <linux.nics@intel.com> 24bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 27bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok*******************************************************************************/ 28bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 29bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Linux PRO/1000 Ethernet Driver main header file */ 30bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 31bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#ifndef _E1000_H_ 32bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define _E1000_H_ 33bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 34bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/types.h> 35bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/timer.h> 36bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/workqueue.h> 37bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/io.h> 38bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include <linux/netdevice.h> 39d8014dbca7f5d2d6f0fdb47e5286bd2d887f7065Bruce Allan#include <linux/pci.h> 40bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 41bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#include "hw.h" 42bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 43bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_info; 44bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 4544defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_printk(level, adapter, format, arg...) \ 4644defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher printk(level "%s: %s: " format, pci_name(adapter->pdev), \ 4744defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher adapter->netdev->name, ## arg) 48bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 49bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#ifdef DEBUG 5044defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_dbg(format, arg...) \ 513bb99fe226ead584a4db674dab546689f705201fBruce Allan e_printk(KERN_DEBUG , hw->adapter, format, ## arg) 52bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#else 533bb99fe226ead584a4db674dab546689f705201fBruce Allan#define e_dbg(format, arg...) do { (void)(hw); } while (0) 54bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#endif 55bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 5644defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_err(format, arg...) \ 5744defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher e_printk(KERN_ERR, adapter, format, ## arg) 5844defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_info(format, arg...) \ 5944defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher e_printk(KERN_INFO, adapter, format, ## arg) 6044defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_warn(format, arg...) \ 6144defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher e_printk(KERN_WARNING, adapter, format, ## arg) 6244defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher#define e_notice(format, arg...) \ 6344defeb3f6f98ea9bb48a2fe6eb9004e9e1a49a1Jeff Kirsher e_printk(KERN_NOTICE, adapter, format, ## arg) 64bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 65bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6698a1708de1bfa5fe1c490febba850d6043d3c7faMartin Olsson/* Interrupt modes, as used by the IntMode parameter */ 674662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_LEGACY 0 684662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_MSI 1 694662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define E1000E_INT_MODE_MSIX 2 704662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 71ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan/* Tx/Rx descriptor defines */ 72bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_DEFAULT_TXD 256 73bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MAX_TXD 4096 747b1be1987c1e8163b3631dcd1ce4f03707d60c3bAuke Kok#define E1000_MIN_TXD 64 75bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 76bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_DEFAULT_RXD 256 77bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MAX_RXD 4096 787b1be1987c1e8163b3631dcd1ce4f03707d60c3bAuke Kok#define E1000_MIN_RXD 64 79bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 80de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ 81de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */ 82de5b3077da8275e87196a1e34c5535f5279c5e1aAuke Kok 83bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Early Receive defines */ 84bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_ERT_2048 0x100 85bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 86bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */ 87bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 88bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* How many Tx Descriptors do we need to call netif_wake_queue ? */ 89bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* How many Rx Buffers do we bundle into one write to the hardware ? */ 90bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ 91bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 92bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define AUTO_ALL_MODES 0 93bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_EEPROM_APME 0x0400 94bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 95bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_MNG_VLAN_NONE (-1) 96bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 97bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* Number of packet split data buffers (not including the header buffer) */ 98bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) 99bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 1002adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan#define DEFAULT_JUMBO 9234 1012adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan 102a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan/* BM/HV Specific Registers */ 103a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_PORT_CTRL_PAGE 769 104a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 105a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define PHY_UPPER_SHIFT 21 106a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_PHY_REG(page, reg) \ 107a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((reg) & MAX_PHY_REG_ADDRESS) |\ 108a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\ 109a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT))) 110a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 111a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan/* PHY Wakeup Registers and defines */ 112a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0) 113a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUC PHY_REG(BM_WUC_PAGE, 1) 114a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) 115a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_WUS PHY_REG(BM_WUC_PAGE, 3) 116a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) 117a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) 118a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) 119a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) 120a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) 121a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 122a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */ 123a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */ 124a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */ 125a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */ 126a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */ 127a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */ 128a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */ 129a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 130a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_SCC_UPPER PHY_REG(778, 16) /* Single Collision Count */ 131a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_SCC_LOWER PHY_REG(778, 17) 132a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_ECOL_UPPER PHY_REG(778, 18) /* Excessive Collision Count */ 133a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_ECOL_LOWER PHY_REG(778, 19) 134a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_MCC_UPPER PHY_REG(778, 20) /* Multiple Collision Count */ 135a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_MCC_LOWER PHY_REG(778, 21) 136a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_LATECOL_UPPER PHY_REG(778, 23) /* Late Collision Count */ 137a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_LATECOL_LOWER PHY_REG(778, 24) 138a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_COLC_UPPER PHY_REG(778, 25) /* Collision Count */ 139a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_COLC_LOWER PHY_REG(778, 26) 140a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_DC_UPPER PHY_REG(778, 27) /* Defer Count */ 141a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_DC_LOWER PHY_REG(778, 28) 142a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ 143a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define HV_TNCRS_LOWER PHY_REG(778, 30) 144a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan 14538eb394e33d65abb9d05411547d2058db53b4d23Bruce Allan#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */ 14638eb394e33d65abb9d05411547d2058db53b4d23Bruce Allan 1471d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan/* BM PHY Copper Specific Status */ 1481d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS 17 1491d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_LINK_UP 0x0400 1501d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_RESOLVED 0x0800 1511d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_SPEED_MASK 0xC000 1521d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define BM_CS_STATUS_SPEED_1000 0x8000 1531d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan 1541d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan/* 82577 Mobile Phy Status Register */ 1551d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS 26 1561d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 1571d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_SPEED_MASK 0x0300 1581d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_SPEED_1000 0x0200 1591d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan#define HV_M_STATUS_LINK_UP 0x0040 1601d5846b9216665d0ae743bf351d0b8fa90c40523Bruce Allan 161bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum e1000_boards { 162bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82571, 163bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82572, 164bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_82573, 1654662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan board_82574, 1668c81c9c315b7e7e240906fab0e8dde1595101bd2Alexander Duyck board_82583, 167bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_80003es2lan, 168bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_ich8lan, 169bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok board_ich9lan, 170f4187b56e1f8a05dd110875d5094b21b51ebd79bBruce Allan board_ich10lan, 171a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan board_pchlan, 172bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 173bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 174bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_queue_stats { 175bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 packets; 176bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 bytes; 177bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 178bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 179bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_ps_page { 180bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct page *page; 181bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 dma; /* must be u64 - written to hw */ 182bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 183bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 184bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* 185bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok * wrappers around a pointer to a socket buffer, 186bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok * so a DMA handle can be stored along with the buffer 187bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 188bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_buffer { 189bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok dma_addr_t dma; 190bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct sk_buff *skb; 191bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok union { 192ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Tx */ 193bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct { 194bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long time_stamp; 195bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 length; 196bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_watch; 19703b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck u16 mapped_as_page; 198bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok }; 199ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Rx */ 20003b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct { 20103b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck /* arrays of page information for packet split */ 20203b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct e1000_ps_page *ps_pages; 20303b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck struct page *page; 20403b1320dfceeb093890cdd7433e910dca6225ddbAlexander Duyck }; 205bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok }; 206bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 207bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 208bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_ring { 209bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok void *desc; /* pointer to ring memory */ 210bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok dma_addr_t dma; /* phys address of ring */ 211bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int size; /* length of ring in bytes */ 212bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int count; /* number of desc. in ring */ 213bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 214bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_use; 215bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 next_to_clean; 216bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 217bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 head; 218bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 tail; 219bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 220bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* array of buffer information structs */ 221bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_buffer *buffer_info; 222bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 2234662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan char name[IFNAMSIZ + 5]; 2244662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 ims_val; 2254662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 itr_val; 2264662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u16 itr_register; 2274662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan int set_itr; 2284662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 229bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct sk_buff *rx_skb_top; 230bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 231bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_queue_stats stats; 232bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 233bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 2347c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan/* PHY register snapshot values */ 2357c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allanstruct e1000_phy_regs { 2367c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 bmcr; /* basic mode control register */ 2377c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 bmsr; /* basic mode status register */ 2387c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 advertise; /* auto-negotiation advertisement */ 2397c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 lpa; /* link partner ability register */ 2407c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 expansion; /* auto-negotiation expansion reg */ 2417c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 ctrl1000; /* 1000BASE-T control register */ 2427c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 stat1000; /* 1000BASE-T status register */ 2437c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u16 estatus; /* extended status register */ 2447c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan}; 2457c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan 246bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* board specific private data structure */ 247bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_adapter { 248bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list watchdog_timer; 249bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list phy_info_timer; 250bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct timer_list blink_timer; 251bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 252bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct work_struct reset_task; 253bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct work_struct watchdog_task; 254bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 255bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok const struct e1000_info *ei; 256bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 257bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct vlan_group *vlgrp; 258bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 bd_number; 259bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_buffer_len; 260bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 mng_vlan_id; 261bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 link_speed; 262bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 link_duplex; 2638452759060ad46fc071a7d5bbf1647df5ea2ceabBruce Allan u16 eeprom_vers; 264bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 265bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* track device up/down/testing state */ 266bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long state; 267bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 268bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* Interrupt Throttle Rate */ 269bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 itr; 270bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 itr_setting; 271bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 tx_itr; 272bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 rx_itr; 273bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 274bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* 275ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan * Tx 276bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 277bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring *tx_ring /* One per active queue */ 278bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ____cacheline_aligned_in_smp; 279bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 280bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct napi_struct napi; 281bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 282bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long tx_queue_len; 283bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int restart_queue; 284bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 txd_cmd; 285bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 286bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool detect_tx_hung; 287bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u8 tx_timeout_factor; 288bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 289bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_int_delay; 290bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_abs_int_delay; 291bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 292bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_tx_bytes; 293bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_tx_packets; 294bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_rx_bytes; 295bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int total_rx_packets; 296bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 297ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Tx stats */ 298bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 tpt_old; 299bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 colc_old; 3007c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u32 gotc; 3017c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u64 gotc_old; 302bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_timeout_count; 303bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_fifo_head; 304bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_head_addr; 305bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_fifo_size; 306bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 tx_dma_failed; 307bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 308bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* 309ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan * Rx 310bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok */ 311bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool (*clean_rx) (struct e1000_adapter *adapter, 312bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok int *work_done, int work_to_do) 313bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok ____cacheline_aligned_in_smp; 314bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok void (*alloc_rx_buf) (struct e1000_adapter *adapter, 315bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok int cleaned_count); 316bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring *rx_ring; 317bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 318bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_int_delay; 319bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_abs_int_delay; 320bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 321ad68076e07fa01bd0c98278a959d0fd2bb26f1acBruce Allan /* Rx stats */ 322bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 hw_csum_err; 323bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 hw_csum_good; 324bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u64 rx_hdr_split; 3257c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u32 gorc; 3267c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan u64 gorc_old; 327bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 alloc_rx_buff_failed; 328bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 rx_dma_failed; 329bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 330bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int rx_ps_pages; 331bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u16 rx_ps_bsize0; 332318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher u32 max_frame_size; 333318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher u32 min_frame_size; 334bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 335bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* OS defined structs */ 336bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct net_device *netdev; 337bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct pci_dev *pdev; 338bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 339bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok /* structs defined in e1000_hw.h */ 340bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_hw hw; 341bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 342bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_hw_stats stats; 343bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_phy_info phy_info; 344bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_phy_stats phy_stats; 345bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 3467c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan /* Snapshot of PHY registers */ 3477c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan struct e1000_phy_regs phy_regs; 3487c25769f88ff0b186766d6a9f9390a2e9fd4670fBruce Allan 349bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring test_tx_ring; 350bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_ring test_rx_ring; 351bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 test_icr; 352bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 353bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 msg_enable; 3544662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan struct msix_entry *msix_entries; 3554662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan int int_mode; 3564662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan u32 eiac_mask; 357bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 358bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 eeprom_wol; 359bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 wol; 360bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 pba; 3612adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan u32 max_hw_frame_size; 362bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 363318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher bool fc_autoneg; 364bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 365bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned long led_status; 366bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 367bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int flags; 368eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher unsigned int flags2; 369a8f88ff5a5abc2ce9f7d7d2694178b2c617d713aJesse Brandeburg struct work_struct downshift_task; 370a8f88ff5a5abc2ce9f7d7d2694178b2c617d713aJesse Brandeburg struct work_struct update_phy_task; 371a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan struct work_struct led_blink_task; 37241cec6f1160c110bd69597c2a5611b46e8287801Bruce Allan struct work_struct print_hang_task; 373bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 374bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 375bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstruct e1000_info { 376bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok enum e1000_mac_type mac; 377bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok unsigned int flags; 378eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher unsigned int flags2; 379bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 pba; 3802adc55c959940fc680074392eddbd5585a76f3d9Bruce Allan u32 max_hw_frame_size; 38169e3fd8ccc3d382b4ef72cade817ccd121d8911aJeff Kirsher s32 (*get_variants)(struct e1000_adapter *); 382bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_mac_operations *mac_ops; 383bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_phy_operations *phy_ops; 384bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok struct e1000_nvm_operations *nvm_ops; 385bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 386bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 387bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok/* hardware capability, feature, and workaround flags */ 388bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_AMT (1 << 0) 389bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_FLASH (1 << 1) 390bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_HW_VLAN_FILTER (1 << 2) 391bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_WOL (1 << 3) 392bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_ERT (1 << 4) 393bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) 394bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_SWSM_ON_LOAD (1 << 6) 395bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_JUMBO_FRAMES (1 << 7) 3964a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7Bruce Allan#define FLAG_READ_ONLY_NVM (1 << 8) 39797ac8caee238d2a81c23661916f7acd3a22c85feBruce Allan#define FLAG_IS_ICH (1 << 9) 3984662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan#define FLAG_HAS_MSIX (1 << 10) 399bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 400bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_IS_QUAD_PORT_A (1 << 12) 401bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_IS_QUAD_PORT (1 << 13) 402bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14) 403bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_IN_WUC (1 << 15) 404bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_IN_CTRL3 (1 << 16) 405bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_APME_CHECK_PORT_B (1 << 17) 406bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18) 407bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_NO_WAKE_UCAST (1 << 19) 408bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_MNG_PT_ENABLED (1 << 20) 409bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_RESET_OVERWRITES_LAA (1 << 21) 410bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TARC_SPEED_MODE_BIT (1 << 22) 411bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TARC_SET_BIT_ZERO (1 << 23) 412bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_RX_NEEDS_RESTART (1 << 24) 413bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_LSC_GIG_SPEED_DROP (1 << 25) 414bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_SMART_POWER_DOWN (1 << 26) 415bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_MSI_ENABLED (1 << 27) 416bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_RX_CSUM_ENABLED (1 << 28) 417bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define FLAG_TSO_FORCE (1 << 29) 418318a94d68979cbe9cc98a3050b4b7be2f08513c8Jeff Kirsher#define FLAG_RX_RESTART_NOW (1 << 30) 419f8d59f7826aa73c5e7682fbed6db38020635d466Bruce Allan#define FLAG_MSI_TEST_FAILED (1 << 31) 420bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 421eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher/* CRC Stripping defines */ 422eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher#define FLAG2_CRC_STRIPPING (1 << 0) 423a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allan#define FLAG2_HAS_PHY_WAKEUP (1 << 1) 424b94b50289622e816adc9f94111cfc2679c80177cJesse Brandeburg#define FLAG2_IS_DISCARDING (1 << 2) 425eb7c3adb1ca92450870dbb0d347fc986cd5e2af4Jeff Kirsher 426bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_RX_DESC_PS(R, i) \ 427bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) 428bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) 429bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc) 430bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) 431bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc) 432bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 433bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum e1000_state_t { 434bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_TESTING, 435bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_RESETTING, 436bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok __E1000_DOWN 437bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 438bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 439bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokenum latency_range { 440bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok lowest_latency = 0, 441bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok low_latency = 1, 442bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bulk_latency = 2, 443bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok latency_invalid = 255 444bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok}; 445bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 446bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern char e1000e_driver_name[]; 447bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern const char e1000e_driver_version[]; 448bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 449bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_check_options(struct e1000_adapter *adapter); 450bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_ethtool_ops(struct net_device *netdev); 451bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 452bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_up(struct e1000_adapter *adapter); 453bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_down(struct e1000_adapter *adapter); 454bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reinit_locked(struct e1000_adapter *adapter); 455bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reset(struct e1000_adapter *adapter); 456bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_power_up_phy(struct e1000_adapter *adapter); 457bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_setup_rx_resources(struct e1000_adapter *adapter); 458bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern int e1000e_setup_tx_resources(struct e1000_adapter *adapter); 459bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_free_rx_resources(struct e1000_adapter *adapter); 460bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_free_tx_resources(struct e1000_adapter *adapter); 461bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_update_stats(struct e1000_adapter *adapter); 462a20e4cf9e6a37e40532593e00df153d01e317bafBruce Allanextern bool e1000_has_link(struct e1000_adapter *adapter); 4634662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter); 4644662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter); 465bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 466bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern unsigned int copybreak; 467bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 468bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern char *e1000e_get_hw_dev_name(struct e1000_hw *hw); 469bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 470bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_82571_info; 471bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_82572_info; 472bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_82573_info; 4734662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern struct e1000_info e1000_82574_info; 4748c81c9c315b7e7e240906fab0e8dde1595101bd2Alexander Duyckextern struct e1000_info e1000_82583_info; 475bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_ich8_info; 476bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_ich9_info; 477f4187b56e1f8a05dd110875d5094b21b51ebd79bBruce Allanextern struct e1000_info e1000_ich10_info; 478a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern struct e1000_info e1000_pch_info; 479bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern struct e1000_info e1000_es2_info; 480bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 48169e3fd8ccc3d382b4ef72cade817ccd121d8911aJeff Kirsherextern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num); 482bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 483bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_commit_phy(struct e1000_hw *hw); 484bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 485bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); 486bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 487bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_get_laa_state_82571(struct e1000_hw *hw); 488bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state); 489bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 4904a7703582836f55a1cbad0e2c1c6ebbee3f9b3a7Bruce Allanextern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw); 491bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, 492bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok bool state); 493bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); 494bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); 49597ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw); 496bb436b20fe0ea4231a233aae7f0f7de3a3f2f5c3Bruce Allanextern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); 497bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 498bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); 499bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); 500bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw); 501a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000e_setup_led_generic(struct e1000_hw *hw); 502bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw); 503bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_led_on_generic(struct e1000_hw *hw); 504bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_led_off_generic(struct e1000_hw *hw); 505bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw); 506bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex); 507bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex); 508bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_disable_pcie_master(struct e1000_hw *hw); 509bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw); 510bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_id_led_init(struct e1000_hw *hw); 511bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw); 512bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw); 513bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw); 514bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw); 515bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_link(struct e1000_hw *hw); 516caaddaf83501c79fe11b183c8972e60d8b7d5d56Bruce Allanextern void e1000_clear_vfta_generic(struct e1000_hw *hw); 517bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count); 518e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsherextern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw, 519e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsher u8 *mc_addr_list, 520e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsher u32 mc_addr_count, 521e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsher u32 rar_used_count, 522e2de3eb69c40c01739ce9b154c65e51d94d72966Jeff Kirsher u32 rar_count); 523bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); 524bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw); 525bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop); 526bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw); 527bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data); 528bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_config_collision_dist(struct e1000_hw *hw); 529bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw); 530bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_force_mac_fc(struct e1000_hw *hw); 531bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_blink_led(struct e1000_hw *hw); 532caaddaf83501c79fe11b183c8972e60d8b7d5d56Bruce Allanextern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); 533bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reset_adaptive(struct e1000_hw *hw); 534bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_update_adaptive(struct e1000_hw *hw); 535bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 536bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_setup_copper_link(struct e1000_hw *hw); 537bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_id(struct e1000_hw *hw); 538bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_put_hw_semaphore(struct e1000_hw *hw); 539bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw); 540bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); 541bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); 542bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); 543bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); 5445ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, 5455ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 546bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); 547bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); 548bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); 5495ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, 5505ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 551bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); 552bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); 553bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cfg_done(struct e1000_hw *hw); 554bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw); 555bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); 556bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 557bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 558f4187b56e1f8a05dd110875d5094b21b51ebd79bBruce Allanextern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw); 559bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); 56097ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_determine_phy_address(struct e1000_hw *hw); 56197ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 56297ac8caee238d2a81c23661916f7acd3a22c85feBruce Allanextern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 5634662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); 5644662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 565bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 566bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 5675ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, 5685ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 569bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 5705ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, 5715ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 572bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 573bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok u32 usec_interval, bool *success); 574bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); 57517f208deb9bf88315aa72c08c866a235c399fb9aBruce Allanextern void e1000_power_up_phy_copper(struct e1000_hw *hw); 57617f208deb9bf88315aa72c08c866a235c399fb9aBruce Allanextern void e1000_power_down_phy_copper(struct e1000_hw *hw); 5772d9498f369706d6db174abd2e75b37732b9dbbdeDavid Grahamextern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); 5782d9498f369706d6db174abd2e75b37732b9dbbdeDavid Grahamextern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); 579bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_check_downshift(struct e1000_hw *hw); 580a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); 5815ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 5825ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 *data); 583a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 5845ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allanextern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 5855ccdcecb72692d46d7a9264e62751241c7eca559Bruce Allan u16 data); 586a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 587a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 588a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_check_polarity_82577(struct e1000_hw *hw); 589a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_get_phy_info_82577(struct e1000_hw *hw); 590a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); 591a4f58f5455ba0efda36fb33c37074922d1527a10Bruce Allanextern s32 e1000_get_cable_length_82577(struct e1000_hw *hw); 592bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 5930be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_m88(struct e1000_hw *hw); 5940be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_get_phy_info_ife(struct e1000_hw *hw); 5950be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_ife(struct e1000_hw *hw); 5960be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); 5970be8401051c716be4533272e983b7eed3d83946dBruce Allanextern s32 e1000_check_polarity_igp(struct e1000_hw *hw); 5980be8401051c716be4533272e983b7eed3d83946dBruce Allan 599bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 600bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 60194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.reset(hw); 602bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 603bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 604bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_check_reset_block(struct e1000_hw *hw) 605bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 606bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return hw->phy.ops.check_reset_block(hw); 607bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 608bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 609bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data) 610bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 61194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.read_reg(hw, offset, data); 612bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 613bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 614bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data) 615bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 61694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.write_reg(hw, offset, data); 617bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 618bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 619bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_get_cable_length(struct e1000_hw *hw) 620bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 621bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return hw->phy.ops.get_cable_length(hw); 622bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 623bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 624bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_acquire_nvm(struct e1000_hw *hw); 625bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 626bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw); 627bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); 628bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); 629bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw); 630bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_release_nvm(struct e1000_hw *hw); 631bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern void e1000e_reload_nvm(struct e1000_hw *hw); 632bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_read_mac_addr(struct e1000_hw *hw); 633bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 634bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw) 635bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 63694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.validate(hw); 637bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 638bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 639bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw) 640bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 64194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.update(hw); 642bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 643bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 644bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) 645bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 64694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.read(hw, offset, words, data); 647bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 648bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 649bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) 650bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 65194d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->nvm.ops.write(hw, offset, words, data); 652bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 653bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 654bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline s32 e1000_get_phy_info(struct e1000_hw *hw) 655bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 65694d8186a693284344ee5cb9734086c7a2370241aBruce Allan return hw->phy.ops.get_info(hw); 657bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 658bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 6594662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanstatic inline s32 e1000e_check_mng_mode(struct e1000_hw *hw) 6604662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan{ 6614662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan return hw->mac.ops.check_mng_mode(hw); 6624662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan} 6634662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allan 6644662e82b2cb41c60826e50474dd86dd5c6372b0cBruce Allanextern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); 665bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); 666bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokextern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); 667bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 668bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline u32 __er32(struct e1000_hw *hw, unsigned long reg) 669bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 670bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok return readl(hw->hw_addr + reg); 671bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 672bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 673bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kokstatic inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) 674bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok{ 675bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok writel(val, hw->hw_addr + reg); 676bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok} 677bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok 678bc7f75fa97884d41efbfde1397b621fefb2550b4Auke Kok#endif /* _E1000_H_ */ 679