177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* 277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Copyright (C) 1999 - 2010 Intel Corporation. 3a1dcfcb7f2d08717325157ed3c1db2362d6eb8c9Toshiharu Okada * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD. 477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * This code was derived from the Intel e1000e Linux driver. 677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * This program is free software; you can redistribute it and/or modify 877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * it under the terms of the GNU General Public License as published by 977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * the Free Software Foundation; version 2 of the License. 1077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 1177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * This program is distributed in the hope that it will be useful, 1277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * but WITHOUT ANY WARRANTY; without even the implied warranty of 1377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * GNU General Public License for more details. 1577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 1677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * You should have received a copy of the GNU General Public License 1777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * along with this program; if not, write to the Free Software 1877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. 1977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 2077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#include "pch_gbe.h" 2277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#include "pch_gbe_api.h" 239d9779e723a5d23b94abbe5bb7d1197921f6f3ddPaul Gortmaker#include <linux/module.h> 2477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define DRV_VERSION "1.00" 2677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeconst char pch_driver_version[] = DRV_VERSION; 2777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCI_DEVICE_ID_INTEL_IOH1_GBE 0x8802 /* Pci device ID */ 2977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_MAR_ENTRIES 16 3077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_SHORT_PKT 64 3177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define DSC_INIT16 0xC000 3277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_DMA_ALIGN 0 33ac09664248e300342e92b937c9894a8149ddf189Toshiharu Okada#define PCH_GBE_DMA_PADDING 2 3477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_WATCHDOG_PERIOD (1 * HZ) /* watchdog time */ 3577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_COPYBREAK_DEFAULT 256 3677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_PCI_BAR 1 37124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada#define PCH_GBE_RESERVE_MEMORY 0x200000 /* 2MB */ 3877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 39b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya/* Macros for ML7223 */ 40b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya#define PCI_VENDOR_ID_ROHM 0x10db 41b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya#define PCI_DEVICE_ID_ROHM_ML7223_GBE 0x8013 42b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya 437756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada/* Macros for ML7831 */ 447756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada#define PCI_DEVICE_ID_ROHM_ML7831_GBE 0x8802 457756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada 4677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_TX_WEIGHT 64 4777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_RX_WEIGHT 64 4877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_RX_BUFFER_WRITE 16 4977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 5077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* Initialize the wake-on-LAN settings */ 5177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_WL_INIT_SETTING (PCH_GBE_WLC_MP) 5277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 5377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_MAC_RGMII_CTRL_SETTING ( \ 5477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_CHIP_TYPE_INTERNAL | \ 55ce3dad0f74e6b240f0b1dedbd8ea268a3f298d82Toshiharu Okada PCH_GBE_RGMII_MODE_RGMII \ 5677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ) 5777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 5877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* Ethertype field values */ 59124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada#define PCH_GBE_MAX_RX_BUFFER_SIZE 0x2880 6077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_MAX_JUMBO_FRAME_SIZE 10318 6177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_FRAME_SIZE_2048 2048 6277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_FRAME_SIZE_4096 4096 6377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_FRAME_SIZE_8192 8192 6477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 6577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) 6677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_RX_DESC(R, i) PCH_GBE_GET_DESC(R, i, pch_gbe_rx_desc) 6777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_TX_DESC(R, i) PCH_GBE_GET_DESC(R, i, pch_gbe_tx_desc) 6877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_DESC_UNUSED(R) \ 6977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \ 7077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (R)->next_to_clean - (R)->next_to_use - 1) 7177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 7277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* Pause packet value */ 7377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_PAUSE_PKT1_VALUE 0x00C28001 7477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_PAUSE_PKT2_VALUE 0x00000100 7577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_PAUSE_PKT4_VALUE 0x01000888 7677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_PAUSE_PKT5_VALUE 0x0000FFFF 7777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 7877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_ETH_ALEN 6 7977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 8077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* This defines the bits that are set in the Interrupt Mask 8177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Set/Read Register. Each bit is documented below: 8277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * o RXT0 = Receiver Timer Interrupt (ring 0) 8377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * o TXDW = Transmit Descriptor Written Back 8477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0) 8577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * o RXSEQ = Receive Sequence Error 8677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * o LSC = Link Status Change 8777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 8877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#define PCH_GBE_INT_ENABLE_MASK ( \ 8977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_INT_RX_DMA_CMPLT | \ 9077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_INT_RX_DSC_EMP | \ 91124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada PCH_GBE_INT_RX_FIFO_ERR | \ 9277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_INT_WOL_DET | \ 9377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_INT_TX_CMPLT \ 9477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ) 9577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 96124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada#define PCH_GBE_INT_DISABLE_ALL 0 9777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 9877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT; 9977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 100191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg); 101191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg, 102191cc6877408348e90f4adb64726b60a93246b8bstephen hemminger int data); 10398200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada 10498200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okadainline void pch_gbe_mac_load_mac_addr(struct pch_gbe_hw *hw) 10598200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada{ 10698200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada iowrite32(0x01, &hw->reg->MAC_ADDR_LOAD); 10798200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada} 10898200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada 10977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 11077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_read_mac_addr - Read MAC address 11177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 11277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 11377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successful. 11477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 11577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakes32 pch_gbe_mac_read_mac_addr(struct pch_gbe_hw *hw) 11677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 11777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 adr1a, adr1b; 11877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 11977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adr1a = ioread32(&hw->reg->mac_adr[0].high); 12077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adr1b = ioread32(&hw->reg->mac_adr[0].low); 12177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 12277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[0] = (u8)(adr1a & 0xFF); 12377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[1] = (u8)((adr1a >> 8) & 0xFF); 12477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[2] = (u8)((adr1a >> 16) & 0xFF); 12577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[3] = (u8)((adr1a >> 24) & 0xFF); 12677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[4] = (u8)(adr1b & 0xFF); 12777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.addr[5] = (u8)((adr1b >> 8) & 0xFF); 12877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 12977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("hw->mac.addr : %pM\n", hw->mac.addr); 13077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 13177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 13277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 13377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 13477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_wait_clr_bit - Wait to clear a bit 13577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @reg: Pointer of register 13677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @busy: Busy bit 13777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 138191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_wait_clr_bit(void *reg, u32 bit) 13977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 14077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 tmp; 14177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 14277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp = 1000; 14377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake while ((ioread32(reg) & bit) && --tmp) 14477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cpu_relax(); 14577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!tmp) 14677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Error: busy bit is not cleared\n"); 14777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 148124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 149124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada/** 150124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada * pch_gbe_wait_clr_bit_irq - Wait to clear a bit for interrupt context 151124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada * @reg: Pointer of register 152124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada * @busy: Busy bit 153124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada */ 154124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okadastatic int pch_gbe_wait_clr_bit_irq(void *reg, u32 bit) 155124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada{ 156124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada u32 tmp; 157124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada int ret = -1; 158124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* wait busy */ 159124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada tmp = 20; 160124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada while ((ioread32(reg) & bit) && --tmp) 161124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada udelay(5); 162124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (!tmp) 163124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pr_err("Error: busy bit is not cleared\n"); 164124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada else 165124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada ret = 0; 166124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return ret; 167124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada} 168124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 16977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 17077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_mar_set - Set MAC address register 17177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 17277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @addr: Pointer to the MAC address 17377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @index: MAC address array register 17477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 175191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index) 17677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 17777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 mar_low, mar_high, adrmask; 17877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 17977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("index : 0x%x\n", index); 18077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 18177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* 18277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * HW expects these in little endian so we reverse the byte order 18377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * from network order (big endian) to little endian 18477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 18577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mar_high = ((u32) addr[0] | ((u32) addr[1] << 8) | 18677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ((u32) addr[2] << 16) | ((u32) addr[3] << 24)); 18777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mar_low = ((u32) addr[4] | ((u32) addr[5] << 8)); 18877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Stop the MAC Address of index. */ 18977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adrmask = ioread32(&hw->reg->ADDR_MASK); 19077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((adrmask | (0x0001 << index)), &hw->reg->ADDR_MASK); 19177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 19277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY); 19377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set the MAC address to the MAC address 1A/1B register */ 19477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(mar_high, &hw->reg->mac_adr[index].high); 19577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(mar_low, &hw->reg->mac_adr[index].low); 19677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Start the MAC address of index */ 19777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((adrmask & ~(0x0001 << index)), &hw->reg->ADDR_MASK); 19877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 19977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY); 20077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 20177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 20277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 20377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_reset_hw - Reset hardware 20477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 20577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 206191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) 20777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 20877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Read the MAC address. and store to the private data */ 20977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_read_mac_addr(hw); 21077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET); 21177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef PCH_GBE_MAC_IFOP_RGMII 21277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE); 21377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 21477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST); 21577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Setup the receive address */ 21677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); 21777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 21877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 21977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 220124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okadastatic void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw) 221124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada{ 222124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Read the MAC address. and store to the private data */ 223124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_mac_read_mac_addr(hw); 224124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET); 225124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST); 226124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Setup the MAC address */ 227124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); 228124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return; 229124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada} 230124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 23177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 23277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_init_rx_addrs - Initialize receive address's 23377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 23477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @mar_count: Receive address registers 23577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 236191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_init_rx_addrs(struct pch_gbe_hw *hw, u16 mar_count) 23777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 23877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 i; 23977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 24077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Setup the receive address */ 24177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); 24277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 24377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Zero out the other receive addresses */ 24477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 1; i < mar_count; i++) { 24577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->mac_adr[i].high); 24677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->mac_adr[i].low); 24777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 24877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0xFFFE, &hw->reg->ADDR_MASK); 24977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 25077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY); 25177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 25277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 25377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 25477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 25577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_mc_addr_list_update - Update Multicast addresses 25677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 25777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @mc_addr_list: Array of multicast addresses to program 25877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @mc_addr_count: Number of multicast addresses to program 25977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @mar_used_count: The first MAC Address register free to program 26077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @mar_total_num: Total number of supported MAC Address Registers 26177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 262191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_mc_addr_list_update(struct pch_gbe_hw *hw, 263191cc6877408348e90f4adb64726b60a93246b8bstephen hemminger u8 *mc_addr_list, u32 mc_addr_count, 264191cc6877408348e90f4adb64726b60a93246b8bstephen hemminger u32 mar_used_count, u32 mar_total_num) 26577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 26677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 i, adrmask; 26777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 26877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Load the first set of multicast addresses into the exact 26977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * filters (RAR). If there are not enough to fill the RAR 27077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * array, clear the filters. 27177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 27277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = mar_used_count; i < mar_total_num; i++) { 27377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (mc_addr_count) { 27477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_mar_set(hw, mc_addr_list, i); 27577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mc_addr_count--; 27677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mc_addr_list += PCH_GBE_ETH_ALEN; 27777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 27877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Clear MAC address mask */ 27977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adrmask = ioread32(&hw->reg->ADDR_MASK); 28077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((adrmask | (0x0001 << i)), 28177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake &hw->reg->ADDR_MASK); 28277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 28377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY); 28477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Clear MAC address */ 28577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->mac_adr[i].high); 28677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->mac_adr[i].low); 28777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 28877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 28977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 29077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 29177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 29277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_force_mac_fc - Force the MAC's flow control settings 29377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 29477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 29577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successful. 29677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed. 29777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 29877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakes32 pch_gbe_mac_force_mac_fc(struct pch_gbe_hw *hw) 29977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 30077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_mac_info *mac = &hw->mac; 30177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 rx_fctrl; 30277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 30377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("mac->fc = %u\n", mac->fc); 30477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 30577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl = ioread32(&hw->reg->RX_FCTRL); 30677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 30777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake switch (mac->fc) { 30877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case PCH_GBE_FC_NONE: 30977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl &= ~PCH_GBE_FL_CTRL_EN; 31077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mac->tx_fc_enable = false; 31177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 31277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case PCH_GBE_FC_RX_PAUSE: 31377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl |= PCH_GBE_FL_CTRL_EN; 31477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mac->tx_fc_enable = false; 31577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 31677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case PCH_GBE_FC_TX_PAUSE: 31777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl &= ~PCH_GBE_FL_CTRL_EN; 31877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mac->tx_fc_enable = true; 31977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 32077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case PCH_GBE_FC_FULL: 32177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl |= PCH_GBE_FL_CTRL_EN; 32277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mac->tx_fc_enable = true; 32377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 32477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake default: 32577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Flow control param set incorrectly\n"); 32677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -EINVAL; 32777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 32877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (mac->link_duplex == DUPLEX_HALF) 32977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_fctrl &= ~PCH_GBE_FL_CTRL_EN; 33077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rx_fctrl, &hw->reg->RX_FCTRL); 33177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("RX_FCTRL reg : 0x%08x mac->tx_fc_enable : %d\n", 33277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable); 33377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 33477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 33577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 33677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 33777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_set_wol_event - Set wake-on-lan event 33877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 33977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @wu_evt: Wake up event 34077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 341191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_set_wol_event(struct pch_gbe_hw *hw, u32 wu_evt) 34277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 34377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 addr_mask; 34477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 34577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("wu_evt : 0x%08x ADDR_MASK reg : 0x%08x\n", 34677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake wu_evt, ioread32(&hw->reg->ADDR_MASK)); 34777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 34877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (wu_evt) { 34977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set Wake-On-Lan address mask */ 35077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake addr_mask = ioread32(&hw->reg->ADDR_MASK); 35177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(addr_mask, &hw->reg->WOL_ADDR_MASK); 35277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* wait busy */ 35377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_wait_clr_bit(&hw->reg->WOL_ADDR_MASK, PCH_GBE_WLA_BUSY); 35477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->WOL_ST); 35577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((wu_evt | PCH_GBE_WLC_WOL_MODE), &hw->reg->WOL_CTRL); 35677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0x02, &hw->reg->TCPIP_ACC); 35777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN); 35877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 35977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->WOL_CTRL); 36077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->WOL_ST); 36177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 36277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 36377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 36477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 36577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 36677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_ctrl_miim - Control MIIM interface 36777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 36877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @addr: Address of PHY 36977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @dir: Operetion. (Write or Read) 37077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @reg: Access register of PHY 37177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @data: Write data. 37277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 37377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns: Read date. 37477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 37577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeu16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg, 37677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u16 data) 37777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 37877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 data_out = 0; 37977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 38077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long flags; 38177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 38277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_irqsave(&hw->miim_lock, flags); 38377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 38477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 100; i; --i) { 38577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((ioread32(&hw->reg->MIIM) & PCH_GBE_MIIM_OPER_READY)) 38677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 38777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake udelay(20); 38877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 38977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (i == 0) { 39077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("pch-gbe.miim won't go Ready\n"); 39177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&hw->miim_lock, flags); 39277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; /* No way to indicate timeout error */ 39377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 39477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(((reg << PCH_GBE_MIIM_REG_ADDR_SHIFT) | 39577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | 39677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dir | data), &hw->reg->MIIM); 39777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 0; i < 100; i++) { 39877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake udelay(20); 39977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake data_out = ioread32(&hw->reg->MIIM); 40077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((data_out & PCH_GBE_MIIM_OPER_READY)) 40177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 40277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 40377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&hw->miim_lock, flags); 40477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 40577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("PHY %s: reg=%d, data=0x%04X\n", 40677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dir == PCH_GBE_MIIM_OPER_READ ? "READ" : "WRITE", reg, 40777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dir == PCH_GBE_MIIM_OPER_READ ? data_out : data); 40877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return (u16) data_out; 40977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 41077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 41177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 41277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mac_set_pause_packet - Set pause packet 41377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @hw: Pointer to the HW structure 41477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 415191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw *hw) 41677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 41777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long tmp2, tmp3; 41877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 41977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set Pause packet */ 42077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp2 = hw->mac.addr[1]; 42177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp2 = (tmp2 << 8) | hw->mac.addr[0]; 42277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp2 = PCH_GBE_PAUSE_PKT2_VALUE | (tmp2 << 16); 42377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 42477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp3 = hw->mac.addr[5]; 42577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp3 = (tmp3 << 8) | hw->mac.addr[4]; 42677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp3 = (tmp3 << 8) | hw->mac.addr[3]; 42777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp3 = (tmp3 << 8) | hw->mac.addr[2]; 42877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 42977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_PAUSE_PKT1_VALUE, &hw->reg->PAUSE_PKT1); 43077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tmp2, &hw->reg->PAUSE_PKT2); 43177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tmp3, &hw->reg->PAUSE_PKT3); 43277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_PAUSE_PKT4_VALUE, &hw->reg->PAUSE_PKT4); 43377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_PAUSE_PKT5_VALUE, &hw->reg->PAUSE_PKT5); 43477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 43577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Transmit Pause Packet */ 43677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_PS_PKT_RQ, &hw->reg->PAUSE_REQ); 43777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 43877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", 43977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->PAUSE_PKT1), ioread32(&hw->reg->PAUSE_PKT2), 44077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->PAUSE_PKT3), ioread32(&hw->reg->PAUSE_PKT4), 44177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->PAUSE_PKT5)); 44277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 44377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 44477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 44577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 44677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 44777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 44877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_alloc_queues - Allocate memory for all rings 44977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure to initialize 45077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 45177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 45277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 45377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 45477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_alloc_queues(struct pch_gbe_adapter *adapter) 45577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 45677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int size; 45777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 45877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (int)sizeof(struct pch_gbe_tx_ring); 45977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->tx_ring = kzalloc(size, GFP_KERNEL); 46077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!adapter->tx_ring) 46177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 46277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (int)sizeof(struct pch_gbe_rx_ring); 46377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_ring = kzalloc(size, GFP_KERNEL); 46477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!adapter->rx_ring) { 46577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(adapter->tx_ring); 46677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 46777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 46877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 46977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 47077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 47177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 47277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_init_stats - Initialize status 47377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure to initialize 47477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 47577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_init_stats(struct pch_gbe_adapter *adapter) 47677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 47777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(&adapter->stats, 0, sizeof(adapter->stats)); 47877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 47977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 48077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 48177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 48277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_init_phy - Initialize PHY 48377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure to initialize 48477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 48577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 48677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 48777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 48877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_init_phy(struct pch_gbe_adapter *adapter) 48977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 49077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 49177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 addr; 49277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u16 bmcr, stat; 49377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 49477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Discover phy addr by searching addrs in order {1,0,2,..., 31} */ 49577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) { 49677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr; 49777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bmcr = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMCR); 49877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stat = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMSR); 49977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stat = pch_gbe_mdio_read(netdev, adapter->mii.phy_id, MII_BMSR); 50077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0)))) 50177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 50277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 50377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->hw.phy.addr = adapter->mii.phy_id; 50477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("phy_addr = %d\n", adapter->mii.phy_id); 50577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (addr == 32) 50677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -EAGAIN; 50777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Selected the phy and isolate the rest */ 50877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) { 50977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (addr != adapter->mii.phy_id) { 51077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mdio_write(netdev, addr, MII_BMCR, 51177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake BMCR_ISOLATE); 51277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 51377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bmcr = pch_gbe_mdio_read(netdev, addr, MII_BMCR); 51477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mdio_write(netdev, addr, MII_BMCR, 51577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bmcr & ~BMCR_ISOLATE); 51677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 51777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 51877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 51977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* MII setup */ 52077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.phy_id_mask = 0x1F; 52177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.reg_num_mask = 0x1F; 52277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.dev = adapter->netdev; 52377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.mdio_read = pch_gbe_mdio_read; 52477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.mdio_write = pch_gbe_mdio_write; 52577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->mii.supports_gmii = mii_check_gmii_support(&adapter->mii); 52677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 52777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 52877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 52977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 53077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mdio_read - The read function for mii 53177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 53277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @addr: Phy ID 53377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @reg: Access location 53477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 53577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 53677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 53777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 538191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg) 53977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 54077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 54177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 54277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 54377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_READ, reg, 54477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (u16) 0); 54577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 54677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 54777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 54877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_mdio_write - The write function for mii 54977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 55077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @addr: Phy ID (not used) 55177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @reg: Access location 55277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @data: Write data 55377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 554191cc6877408348e90f4adb64726b60a93246b8bstephen hemmingerstatic void pch_gbe_mdio_write(struct net_device *netdev, 555191cc6877408348e90f4adb64726b60a93246b8bstephen hemminger int addr, int reg, int data) 55677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 55777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 55877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 55977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 56077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_ctrl_miim(hw, addr, PCH_GBE_HAL_MIIM_WRITE, reg, data); 56177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 56277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 56377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 56477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_reset_task - Reset processing at the time of transmission timeout 56577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @work: Pointer of board private structure 56677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 56777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_reset_task(struct work_struct *work) 56877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 56977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter; 57077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter = container_of(work, struct pch_gbe_adapter, reset_task); 57177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 57275d1a7522f8b3f4de3eea040fdcdb640deeda64dToshiharu Okada rtnl_lock(); 57377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reinit_locked(adapter); 57475d1a7522f8b3f4de3eea040fdcdb640deeda64dToshiharu Okada rtnl_unlock(); 57577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 57677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 57777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 57877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_reinit_locked- Re-initialization 57977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 58077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 58177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter) 58277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 58375d1a7522f8b3f4de3eea040fdcdb640deeda64dToshiharu Okada pch_gbe_down(adapter); 58475d1a7522f8b3f4de3eea040fdcdb640deeda64dToshiharu Okada pch_gbe_up(adapter); 58577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 58677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 58777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 58877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_reset - Reset GbE 58977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 59077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 59177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_reset(struct pch_gbe_adapter *adapter) 59277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 59377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_reset_hw(&adapter->hw); 59477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Setup the receive address. */ 59577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES); 59677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pch_gbe_hal_init_hw(&adapter->hw)) 59777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Hardware Error\n"); 59877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 59977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 60077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 60177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_free_irq - Free an interrupt 60277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 60377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 60477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_free_irq(struct pch_gbe_adapter *adapter) 60577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 60677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 60777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 60877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake free_irq(adapter->pdev->irq, netdev); 60977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (adapter->have_msi) { 61077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_msi(adapter->pdev); 61177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("call pci_disable_msi\n"); 61277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 61377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 61477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 61577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 61677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_irq_disable - Mask off interrupt generation on the NIC 61777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 61877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 61977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_irq_disable(struct pch_gbe_adapter *adapter) 62077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 62177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 62277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 62377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake atomic_inc(&adapter->irq_sem); 62477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(0, &hw->reg->INT_EN); 62577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->INT_ST); 62677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake synchronize_irq(adapter->pdev->irq); 62777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 62877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN)); 62977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 63077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 63177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 63277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_irq_enable - Enable default interrupt generation settings 63377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 63477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 63577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_irq_enable(struct pch_gbe_adapter *adapter) 63677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 63777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 63877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 63977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (likely(atomic_dec_and_test(&adapter->irq_sem))) 64077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN); 64177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->INT_ST); 64277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN)); 64377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 64477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 64577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 64677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 64777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 64877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_setup_tctl - configure the Transmit control registers 64977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 65077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 65177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_setup_tctl(struct pch_gbe_adapter *adapter) 65277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 65377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 65477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 tx_mode, tcpip; 65577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 65677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_mode = PCH_GBE_TM_LONG_PKT | 65777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TM_ST_AND_FD | 65877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TM_SHORT_PKT | 65977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TM_TH_TX_STRT_8 | 66077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TM_TH_ALM_EMP_4 | PCH_GBE_TM_TH_ALM_FULL_8; 66177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 66277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tx_mode, &hw->reg->TX_MODE); 66377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 66477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcpip = ioread32(&hw->reg->TCPIP_ACC); 66577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcpip |= PCH_GBE_TX_TCPIPACC_EN; 66677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tcpip, &hw->reg->TCPIP_ACC); 66777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 66877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 66977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 67077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 67177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_configure_tx - Configure Transmit Unit after Reset 67277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 67377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 67477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_configure_tx(struct pch_gbe_adapter *adapter) 67577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 67677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 67777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 tdba, tdlen, dctrl; 67877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 67977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("dma addr = 0x%08llx size = 0x%08x\n", 68077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (unsigned long long)adapter->tx_ring->dma, 68177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->tx_ring->size); 68277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 68377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Setup the HW Tx Head and Tail descriptor pointers */ 68477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tdba = adapter->tx_ring->dma; 68577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tdlen = adapter->tx_ring->size - 0x10; 68677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tdba, &hw->reg->TX_DSC_BASE); 68777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tdlen, &hw->reg->TX_DSC_SIZE); 68877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tdba, &hw->reg->TX_DSC_SW_P); 68977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 69077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Enables Transmission DMA */ 69177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dctrl = ioread32(&hw->reg->DMA_CTRL); 69277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dctrl |= PCH_GBE_TX_DMA_EN; 69377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(dctrl, &hw->reg->DMA_CTRL); 69477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 69577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 69677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 69777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_setup_rctl - Configure the receive control registers 69877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 69977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 70077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_setup_rctl(struct pch_gbe_adapter *adapter) 70177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 70277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 70377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 rx_mode, tcpip; 70477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 70577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_mode = PCH_GBE_ADD_FIL_EN | PCH_GBE_MLT_FIL_EN | 70677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_RH_ALM_EMP_4 | PCH_GBE_RH_ALM_FULL_4 | PCH_GBE_RH_RD_TRG_8; 70777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 70877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rx_mode, &hw->reg->RX_MODE); 70977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 71077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcpip = ioread32(&hw->reg->TCPIP_ACC); 71177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 712124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada tcpip |= PCH_GBE_RX_TCPIPACC_OFF; 713124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada tcpip &= ~PCH_GBE_RX_TCPIPACC_EN; 71477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tcpip, &hw->reg->TCPIP_ACC); 71577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 71677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 71777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 71877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 71977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_configure_rx - Configure Receive Unit after Reset 72077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 72177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 72277555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_configure_rx(struct pch_gbe_adapter *adapter) 72377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 72477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 72577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 rdba, rdlen, rctl, rxdma; 72677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 72777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("dma adr = 0x%08llx size = 0x%08x\n", 72877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (unsigned long long)adapter->rx_ring->dma, 72977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_ring->size); 73077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 73177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_force_mac_fc(hw); 73277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 73377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Disables Receive MAC */ 73477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl = ioread32(&hw->reg->MAC_RX_EN); 73577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((rctl & ~PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN); 73677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 73777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Disables Receive DMA */ 73877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rxdma = ioread32(&hw->reg->DMA_CTRL); 73977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rxdma &= ~PCH_GBE_RX_DMA_EN; 74077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rxdma, &hw->reg->DMA_CTRL); 74177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 74277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("MAC_RX_EN reg = 0x%08x DMA_CTRL reg = 0x%08x\n", 74377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->MAC_RX_EN), 74477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->DMA_CTRL)); 74577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 74677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Setup the HW Rx Head and Tail Descriptor Pointers and 74777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * the Base and Length of the Rx Descriptor Ring */ 74877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rdba = adapter->rx_ring->dma; 74977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rdlen = adapter->rx_ring->size - 0x10; 75077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rdba, &hw->reg->RX_DSC_BASE); 75177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rdlen, &hw->reg->RX_DSC_SIZE); 75277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((rdba + rdlen), &hw->reg->RX_DSC_SW_P); 75377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 75477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 75577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 75677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_unmap_and_free_tx_resource - Unmap and free tx socket buffer 75777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 75877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @buffer_info: Buffer information structure 75977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 76077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_unmap_and_free_tx_resource( 76177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter, struct pch_gbe_buffer *buffer_info) 76277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 76377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->mapped) { 76477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 76577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, DMA_TO_DEVICE); 76677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = false; 76777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 76877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->skb) { 76977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_kfree_skb_any(buffer_info->skb); 77077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->skb = NULL; 77177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 77277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 77377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 77477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 77577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_unmap_and_free_rx_resource - Unmap and free rx socket buffer 77677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 77777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @buffer_info: Buffer information structure 77877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 77977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_unmap_and_free_rx_resource( 78077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter, 78177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info) 78277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 78377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->mapped) { 78477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 78577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, DMA_FROM_DEVICE); 78677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = false; 78777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 78877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->skb) { 78977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_kfree_skb_any(buffer_info->skb); 79077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->skb = NULL; 79177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 79277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 79377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 79477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 79577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_clean_tx_ring - Free Tx Buffers 79677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 79777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Ring to be cleaned 79877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 79977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_clean_tx_ring(struct pch_gbe_adapter *adapter, 80077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring) 80177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 80277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 80377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 80477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long size; 80577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 80677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 80777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Free all the Tx ring sk_buffs */ 80877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 0; i < tx_ring->count; i++) { 80977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &tx_ring->buffer_info[i]; 81077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_unmap_and_free_tx_resource(adapter, buffer_info); 81177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 81277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("call pch_gbe_unmap_and_free_tx_resource() %d count\n", i); 81377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 81477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (unsigned long)sizeof(struct pch_gbe_buffer) * tx_ring->count; 81577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(tx_ring->buffer_info, 0, size); 81677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 81777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Zero out the descriptor ring */ 81877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(tx_ring->desc, 0, tx_ring->size); 81977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use = 0; 82077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_clean = 0; 82177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tx_ring->dma, &hw->reg->TX_DSC_HW_P); 82277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((tx_ring->size - 0x10), &hw->reg->TX_DSC_SIZE); 82377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 82477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 82577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 82677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_clean_rx_ring - Free Rx Buffers 82777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 82877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @rx_ring: Ring to free buffers from 82977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 83077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void 83177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakepch_gbe_clean_rx_ring(struct pch_gbe_adapter *adapter, 83277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring) 83377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 83477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 83577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 83677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long size; 83777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 83877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 83977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Free all the Rx ring sk_buffs */ 84077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 0; i < rx_ring->count; i++) { 84177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &rx_ring->buffer_info[i]; 84277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_unmap_and_free_rx_resource(adapter, buffer_info); 84377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 84477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("call pch_gbe_unmap_and_free_rx_resource() %d count\n", i); 84577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (unsigned long)sizeof(struct pch_gbe_buffer) * rx_ring->count; 84677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(rx_ring->buffer_info, 0, size); 84777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 84877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Zero out the descriptor ring */ 84977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(rx_ring->desc, 0, rx_ring->size); 85077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_clean = 0; 85177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_use = 0; 85277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rx_ring->dma, &hw->reg->RX_DSC_HW_P); 85377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((rx_ring->size - 0x10), &hw->reg->RX_DSC_SIZE); 85477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 85577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 85677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_set_rgmii_ctrl(struct pch_gbe_adapter *adapter, u16 speed, 85777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u16 duplex) 85877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 85977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 86077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long rgmii = 0; 86177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 86277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set the RGMII control. */ 86377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef PCH_GBE_MAC_IFOP_RGMII 86477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake switch (speed) { 86577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_10: 86677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rgmii = (PCH_GBE_RGMII_RATE_2_5M | 86777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_MAC_RGMII_CTRL_SETTING); 86877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 86977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_100: 87077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rgmii = (PCH_GBE_RGMII_RATE_25M | 87177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_MAC_RGMII_CTRL_SETTING); 87277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 87377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_1000: 87477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rgmii = (PCH_GBE_RGMII_RATE_125M | 87577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_MAC_RGMII_CTRL_SETTING); 87677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 87777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 87877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rgmii, &hw->reg->RGMII_CTRL); 87977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#else /* GMII */ 88077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rgmii = 0; 88177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rgmii, &hw->reg->RGMII_CTRL); 88277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 88377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 88477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_set_mode(struct pch_gbe_adapter *adapter, u16 speed, 88577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u16 duplex) 88677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 88777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 88877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 88977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long mode = 0; 89077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 89177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set the communication mode */ 89277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake switch (speed) { 89377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_10: 89477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mode = PCH_GBE_MODE_MII_ETHER; 89577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->tx_queue_len = 10; 89677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 89777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_100: 89877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mode = PCH_GBE_MODE_MII_ETHER; 89977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->tx_queue_len = 100; 90077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 90177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake case SPEED_1000: 90277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mode = PCH_GBE_MODE_GMII_ETHER; 90377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 90477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 90577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (duplex == DUPLEX_FULL) 90677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mode |= PCH_GBE_MODE_FULL_DUPLEX; 90777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake else 90877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mode |= PCH_GBE_MODE_HALF_DUPLEX; 90977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(mode, &hw->reg->MODE); 91077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 91177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 91277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 91377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_watchdog - Watchdog process 91477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @data: Board private structure 91577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 91677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_watchdog(unsigned long data) 91777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 91877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = (struct pch_gbe_adapter *)data; 91977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 92077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 92177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 92277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("right now = %ld\n", jiffies); 92377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 92477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_update_stats(adapter); 92577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) { 9268ae6daca85c8bbd6a32c382db5e2a2a989f8bed2David Decotigny struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET }; 92777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->tx_queue_len = adapter->tx_queue_len; 92877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* mii library handles link maintenance tasks */ 92977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (mii_ethtool_gset(&adapter->mii, &cmd)) { 93077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("ethtool get setting Error\n"); 93177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mod_timer(&adapter->watchdog_timer, 93277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake round_jiffies(jiffies + 93377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_WATCHDOG_PERIOD)); 93477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 93577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 9368ae6daca85c8bbd6a32c382db5e2a2a989f8bed2David Decotigny hw->mac.link_speed = ethtool_cmd_speed(&cmd); 93777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex = cmd.duplex; 93877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set the RGMII control. */ 93977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed, 94077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex); 94177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set the communication mode */ 94277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_mode(adapter, hw->mac.link_speed, 94377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex); 94477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev_dbg(netdev, 94577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "Link is Up %d Mbps %s-Duplex\n", 9468ae6daca85c8bbd6a32c382db5e2a2a989f8bed2David Decotigny hw->mac.link_speed, 94777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cmd.duplex == DUPLEX_FULL ? "Full" : "Half"); 94877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_carrier_on(netdev); 94977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_wake_queue(netdev); 95077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((!mii_link_ok(&adapter->mii)) && 95177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (netif_carrier_ok(netdev))) { 95277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev_dbg(netdev, "NIC Link is Down\n"); 95377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_speed = SPEED_10; 95477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex = DUPLEX_HALF; 95577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_carrier_off(netdev); 95677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_stop_queue(netdev); 95777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 95877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mod_timer(&adapter->watchdog_timer, 95977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake round_jiffies(jiffies + PCH_GBE_WATCHDOG_PERIOD)); 96077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 96177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 96277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 96377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_tx_queue - Carry out queuing of the transmission data 96477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 96577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Tx descriptor ring structure 96677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @skb: Sockt buffer structure 96777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 96877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_tx_queue(struct pch_gbe_adapter *adapter, 96977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring, 97077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sk_buff *skb) 97177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 97277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 97377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_desc *tx_desc; 97477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 97577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sk_buff *tmp_skb; 97677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int frame_ctrl; 97777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int ring_num; 97877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long flags; 97977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 98077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /*-- Set frame control --*/ 98177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake frame_ctrl = 0; 98277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(skb->len < PCH_GBE_SHORT_PKT)) 98377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake frame_ctrl |= PCH_GBE_TXD_CTRL_APAD; 984756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław if (skb->ip_summed == CHECKSUM_NONE) 98577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake frame_ctrl |= PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF; 98677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 98777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Performs checksum processing */ 98877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* 98977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * It is because the hardware accelerator does not support a checksum, 99077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * when the received data size is less than 64 bytes. 99177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 992756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław if (skb->len < PCH_GBE_SHORT_PKT && skb->ip_summed != CHECKSUM_NONE) { 99377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake frame_ctrl |= PCH_GBE_TXD_CTRL_APAD | 99477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF; 99577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (skb->protocol == htons(ETH_P_IP)) { 99677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct iphdr *iph = ip_hdr(skb); 99777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int offset; 99877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iph->check = 0; 99977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iph->check = ip_fast_csum((u8 *) iph, iph->ihl); 100077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake offset = skb_transport_offset(skb); 100177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (iph->protocol == IPPROTO_TCP) { 100277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum = 0; 100377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcp_hdr(skb)->check = 0; 100477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum = skb_checksum(skb, offset, 100577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->len - offset, 0); 100677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcp_hdr(skb)->check = 100777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake csum_tcpudp_magic(iph->saddr, 100877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iph->daddr, 100977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->len - offset, 101077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake IPPROTO_TCP, 101177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum); 101277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if (iph->protocol == IPPROTO_UDP) { 101377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum = 0; 101477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake udp_hdr(skb)->check = 0; 101577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum = 101677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb_checksum(skb, offset, 101777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->len - offset, 0); 101877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake udp_hdr(skb)->check = 101977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake csum_tcpudp_magic(iph->saddr, 102077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iph->daddr, 102177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->len - offset, 102277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake IPPROTO_UDP, 102377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->csum); 102477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 102577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 102677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 102777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_irqsave(&tx_ring->tx_lock, flags); 102877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ring_num = tx_ring->next_to_use; 102977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely((ring_num + 1) == tx_ring->count)) 103077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use = 0; 103177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake else 103277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use = ring_num + 1; 103377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 103477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 103577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &tx_ring->buffer_info[ring_num]; 103677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp_skb = buffer_info->skb; 103777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 103877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* [Header:14][payload] ---> [Header:14][paddong:2][payload] */ 103977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(tmp_skb->data, skb->data, ETH_HLEN); 104077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp_skb->data[ETH_HLEN] = 0x00; 104177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp_skb->data[ETH_HLEN + 1] = 0x00; 104277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tmp_skb->len = skb->len; 104377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(&tmp_skb->data[ETH_HLEN + 2], &skb->data[ETH_HLEN], 104477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (skb->len - ETH_HLEN)); 104525985edcedea6396277003854657b5f3cb31a628Lucas De Marchi /*-- Set Buffer information --*/ 104677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length = tmp_skb->len; 104777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->dma = dma_map_single(&adapter->pdev->dev, tmp_skb->data, 104877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, 104977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake DMA_TO_DEVICE); 105077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) { 105177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("TX DMA map failed\n"); 105277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->dma = 0; 105377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->time_stamp = 0; 105477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use = ring_num; 105577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 105677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 105777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = true; 105877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->time_stamp = jiffies; 105977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 106077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /*-- Set Tx descriptor --*/ 106177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc = PCH_GBE_TX_DESC(*tx_ring, ring_num); 106277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->buffer_addr = (buffer_info->dma); 106377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->length = (tmp_skb->len); 106477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->tx_words_eob = ((tmp_skb->len + 3)); 106577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->tx_frame_ctrl = (frame_ctrl); 106677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->gbec_status = (DSC_INIT16); 106777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 106877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(++ring_num == tx_ring->count)) 106977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ring_num = 0; 107077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 107177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Update software pointer of TX descriptor */ 107277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(tx_ring->dma + 107377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (int)sizeof(struct pch_gbe_tx_desc) * ring_num, 107477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake &hw->reg->TX_DSC_SW_P); 107577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_kfree_skb_any(skb); 107677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 107777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 107877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 107977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_update_stats - Update the board statistics counters 108077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 108177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 108277555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_update_stats(struct pch_gbe_adapter *adapter) 108377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 108477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 108577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 108677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw_stats *stats = &adapter->stats; 108777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long flags; 108877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 108977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* 109077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Prevent stats update while adapter is being reset, or if the pci 109177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * connection is down. 109277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 109377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((pdev->error_state) && (pdev->error_state != pci_channel_io_normal)) 109477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 109577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 109677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_irqsave(&adapter->stats_lock, flags); 109777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 109877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Update device status "adapter->stats" */ 109977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stats->rx_errors = stats->rx_crc_errors + stats->rx_frame_errors; 110077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stats->tx_errors = stats->tx_length_errors + 110177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stats->tx_aborted_errors + 110277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake stats->tx_carrier_errors + stats->tx_timeout_count; 110377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 110477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Update network device status "adapter->net_stats" */ 110577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_packets = stats->rx_packets; 110677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_bytes = stats->rx_bytes; 110777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_dropped = stats->rx_dropped; 110877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_packets = stats->tx_packets; 110977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_bytes = stats->tx_bytes; 111077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_dropped = stats->tx_dropped; 111177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Fill out the OS statistics structure */ 111277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.multicast = stats->multicast; 111377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.collisions = stats->collisions; 111477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Rx Errors */ 111577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_errors = stats->rx_errors; 111677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_crc_errors = stats->rx_crc_errors; 111777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.rx_frame_errors = stats->rx_frame_errors; 111877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Tx Errors */ 111977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_errors = stats->tx_errors; 112077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_aborted_errors = stats->tx_aborted_errors; 112177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->stats.tx_carrier_errors = stats->tx_carrier_errors; 112277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 112377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&adapter->stats_lock, flags); 112477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 112577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 1126124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okadastatic void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter) 1127124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada{ 1128124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct pch_gbe_hw *hw = &adapter->hw; 1129124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada u32 rxdma; 1130124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada u16 value; 1131124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada int ret; 1132124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 1133124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Disable Receive DMA */ 1134124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rxdma = ioread32(&hw->reg->DMA_CTRL); 1135124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rxdma &= ~PCH_GBE_RX_DMA_EN; 1136124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada iowrite32(rxdma, &hw->reg->DMA_CTRL); 1137124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Wait Rx DMA BUS is IDLE */ 1138124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada ret = pch_gbe_wait_clr_bit_irq(&hw->reg->RX_DMA_ST, PCH_GBE_IDLE_CHECK); 1139124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (ret) { 1140124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Disable Bus master */ 1141124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pci_read_config_word(adapter->pdev, PCI_COMMAND, &value); 1142124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada value &= ~PCI_COMMAND_MASTER; 1143124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pci_write_config_word(adapter->pdev, PCI_COMMAND, value); 1144124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Stop Receive */ 1145124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_mac_reset_rx(hw); 1146124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Enable Bus master */ 1147124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada value |= PCI_COMMAND_MASTER; 1148124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pci_write_config_word(adapter->pdev, PCI_COMMAND, value); 1149124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } else { 1150124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Stop Receive */ 1151124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_mac_reset_rx(hw); 1152124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 1153124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada} 1154124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 11555229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okadastatic void pch_gbe_start_receive(struct pch_gbe_hw *hw) 11565229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada{ 11575229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada u32 rxdma; 11585229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada 11595229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada /* Enables Receive DMA */ 11605229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada rxdma = ioread32(&hw->reg->DMA_CTRL); 11615229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada rxdma |= PCH_GBE_RX_DMA_EN; 11625229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada iowrite32(rxdma, &hw->reg->DMA_CTRL); 11635229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada /* Enables Receive */ 11645229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada iowrite32(PCH_GBE_MRE_MAC_RX_EN, &hw->reg->MAC_RX_EN); 11655229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada return; 11665229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada} 11675229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada 116877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 116977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_intr - Interrupt Handler 117077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @irq: Interrupt number 117177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @data: Pointer to a network interface device structure 117277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 117377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * - IRQ_HANDLED: Our interrupt 117477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * - IRQ_NONE: Not our interrupt 117577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 117677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic irqreturn_t pch_gbe_intr(int irq, void *data) 117777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 117877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = data; 117977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 118077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 118177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 int_st; 118277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 int_en; 118377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 118477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Check request status */ 118577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int_st = ioread32(&hw->reg->INT_ST); 118677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int_st = int_st & ioread32(&hw->reg->INT_EN); 118777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* When request status is no interruption factor */ 118877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(!int_st)) 118977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return IRQ_NONE; /* Not our interrupt. End processing. */ 119077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("%s occur int_st = 0x%08x\n", __func__, int_st); 119177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_RX_FRAME_ERR) 119277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_rx_frame_err_count++; 119377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_RX_FIFO_ERR) 1194124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (!adapter->rx_stop_flag) { 1195124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->stats.intr_rx_fifo_err_count++; 1196124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pr_debug("Rx fifo over run\n"); 1197124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->rx_stop_flag = true; 1198124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada int_en = ioread32(&hw->reg->INT_EN); 1199124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR), 1200124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada &hw->reg->INT_EN); 1201124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_stop_receive(adapter); 1202805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada int_st |= ioread32(&hw->reg->INT_ST); 1203805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada int_st = int_st & ioread32(&hw->reg->INT_EN); 1204124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 120577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_RX_DMA_ERR) 120677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_rx_dma_err_count++; 120777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_TX_FIFO_ERR) 120877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_tx_fifo_err_count++; 120977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_TX_DMA_ERR) 121077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_tx_dma_err_count++; 121177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (int_st & PCH_GBE_INT_TCPIP_ERR) 121277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_tcpip_err_count++; 121377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* When Rx descriptor is empty */ 121477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((int_st & PCH_GBE_INT_RX_DSC_EMP)) { 121577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.intr_rx_dsc_empty_count++; 1216124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pr_debug("Rx descriptor is empty\n"); 121777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int_en = ioread32(&hw->reg->INT_EN); 121877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32((int_en & ~PCH_GBE_INT_RX_DSC_EMP), &hw->reg->INT_EN); 121977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (hw->mac.tx_fc_enable) { 122077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Set Pause packet */ 122177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_set_pause_packet(hw); 122277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 122377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 122477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 122577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* When request status is Receive interruption */ 1226805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if ((int_st & (PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT)) || 1227805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada (adapter->rx_stop_flag == true)) { 122877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (likely(napi_schedule_prep(&adapter->napi))) { 122977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Enable only Rx Descriptor empty */ 123077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake atomic_inc(&adapter->irq_sem); 123177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int_en = ioread32(&hw->reg->INT_EN); 123277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int_en &= 123377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ~(PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT); 123477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(int_en, &hw->reg->INT_EN); 123577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Start polling for NAPI */ 123677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake __napi_schedule(&adapter->napi); 123777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 123877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 123977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("return = 0x%08x INT_EN reg = 0x%08x\n", 124077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake IRQ_HANDLED, ioread32(&hw->reg->INT_EN)); 124177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return IRQ_HANDLED; 124277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 124377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 124477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 124577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_alloc_rx_buffers - Replace used receive buffers; legacy & extended 124677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 124777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @rx_ring: Rx descriptor ring 124877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @cleaned_count: Cleaned count 124977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 125077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void 125177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakepch_gbe_alloc_rx_buffers(struct pch_gbe_adapter *adapter, 125277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring, int cleaned_count) 125377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 125477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 125577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 125677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 125777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_desc *rx_desc; 125877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 125977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sk_buff *skb; 126077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 126177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int bufsz; 126277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 1263124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; 126477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = rx_ring->next_to_use; 126577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 126677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake while ((cleaned_count--)) { 126777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &rx_ring->buffer_info[i]; 1268124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada skb = netdev_alloc_skb(netdev, bufsz); 1269124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (unlikely(!skb)) { 1270124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* Better luck next round */ 1271124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->stats.rx_alloc_buff_failed++; 1272124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada break; 127377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 1274124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* align */ 1275124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada skb_reserve(skb, NET_IP_ALIGN); 1276124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info->skb = skb; 1277124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 127877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->dma = dma_map_single(&pdev->dev, 1279124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info->rx_buffer, 128077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, 128177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake DMA_FROM_DEVICE); 128277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) { 128377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_kfree_skb(skb); 128477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->skb = NULL; 128577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->dma = 0; 128677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_alloc_buff_failed++; 128777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; /* while !buffer_info->skb */ 128877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 128977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = true; 129077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc = PCH_GBE_RX_DESC(*rx_ring, i); 129177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc->buffer_addr = (buffer_info->dma); 129277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc->gbec_status = DSC_INIT16; 129377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 129477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("i = %d buffer_info->dma = 0x08%llx buffer_info->length = 0x%x\n", 129577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i, (unsigned long long)buffer_info->dma, 129677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length); 129777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 129877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(++i == rx_ring->count)) 129977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = 0; 130077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 130177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (likely(rx_ring->next_to_use != i)) { 130277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_use = i; 130377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(i-- == 0)) 130477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = (rx_ring->count - 1); 130577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rx_ring->dma + 130677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (int)sizeof(struct pch_gbe_rx_desc) * i, 130777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake &hw->reg->RX_DSC_SW_P); 130877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 130977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 131077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 131177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 1312124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okadastatic int 1313124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okadapch_gbe_alloc_rx_buffers_pool(struct pch_gbe_adapter *adapter, 1314124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct pch_gbe_rx_ring *rx_ring, int cleaned_count) 1315124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada{ 1316124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct pci_dev *pdev = adapter->pdev; 1317124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct pch_gbe_buffer *buffer_info; 1318124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada unsigned int i; 1319124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada unsigned int bufsz; 1320124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada unsigned int size; 1321124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 1322124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada bufsz = adapter->rx_buffer_len; 1323124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 1324124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada size = rx_ring->count * bufsz + PCH_GBE_RESERVE_MEMORY; 1325124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool = dma_alloc_coherent(&pdev->dev, size, 1326124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada &rx_ring->rx_buff_pool_logic, 1327124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada GFP_KERNEL); 1328124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (!rx_ring->rx_buff_pool) { 1329124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pr_err("Unable to allocate memory for the receive poll buffer\n"); 1330124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return -ENOMEM; 1331124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 1332124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada memset(rx_ring->rx_buff_pool, 0, size); 1333124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool_size = size; 1334124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada for (i = 0; i < rx_ring->count; i++) { 1335124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info = &rx_ring->buffer_info[i]; 1336124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info->rx_buffer = rx_ring->rx_buff_pool + bufsz * i; 1337124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info->length = bufsz; 1338124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 1339124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return 0; 1340124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada} 1341124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 134277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 134377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_alloc_tx_buffers - Allocate transmit buffers 134477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 134577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Tx descriptor ring 134677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 134777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_alloc_tx_buffers(struct pch_gbe_adapter *adapter, 134877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring) 134977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 135077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 135177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sk_buff *skb; 135277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 135377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int bufsz; 135477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_desc *tx_desc; 135577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 135677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bufsz = 135777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->hw.mac.max_frame_size + PCH_GBE_DMA_ALIGN + NET_IP_ALIGN; 135877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 135977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (i = 0; i < tx_ring->count; i++) { 136077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &tx_ring->buffer_info[i]; 136177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb = netdev_alloc_skb(adapter->netdev, bufsz); 136277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb_reserve(skb, PCH_GBE_DMA_ALIGN); 136377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->skb = skb; 136477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc = PCH_GBE_TX_DESC(*tx_ring, i); 136577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->gbec_status = (DSC_INIT16); 136677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 136777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 136877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 136977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 137077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 137177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_clean_tx - Reclaim resources after transmit completes 137277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 137377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Tx descriptor ring 137477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 137577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * true: Cleaned the descriptor 137677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * false: Not cleaned the descriptor 137777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 137877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic bool 137977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakepch_gbe_clean_tx(struct pch_gbe_adapter *adapter, 138077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring) 138177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 138277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_desc *tx_desc; 138377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 138477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sk_buff *skb; 138577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 138677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int cleaned_count = 0; 1387805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada bool cleaned = true; 138877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 138977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean); 139077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 139177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = tx_ring->next_to_clean; 139277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc = PCH_GBE_TX_DESC(*tx_ring, i); 139377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("gbec_status:0x%04x dma_status:0x%04x\n", 139477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->gbec_status, tx_desc->dma_status); 139577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 139677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake while ((tx_desc->gbec_status & DSC_INIT16) == 0x0000) { 139777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("gbec_status:0x%04x\n", tx_desc->gbec_status); 139877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &tx_ring->buffer_info[i]; 139977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb = buffer_info->skb; 140077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 140177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_ABT)) { 140277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_aborted_errors++; 140377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Transfer Abort Error\n"); 140477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CRSER) 140577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ) { 140677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_carrier_errors++; 140777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Transfer Carrier Sense Error\n"); 140877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_EXCOL) 140977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ) { 141077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_aborted_errors++; 141177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Transfer Collision Abort Error\n"); 141277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((tx_desc->gbec_status & 141377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (PCH_GBE_TXD_GMAC_STAT_SNGCOL | 141477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_TXD_GMAC_STAT_MLTCOL))) { 141577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.collisions++; 141677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_packets++; 141777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_bytes += skb->len; 141877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("Transfer Collision\n"); 141977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CMPLT) 142077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ) { 142177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_packets++; 142277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_bytes += skb->len; 142377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 142477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->mapped) { 142577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("unmap buffer_info->dma : %d\n", i); 142677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dma_unmap_single(&adapter->pdev->dev, buffer_info->dma, 142777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, DMA_TO_DEVICE); 142877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = false; 142977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 143077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (buffer_info->skb) { 143177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("trim buffer_info->skb : %d\n", i); 143277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb_trim(buffer_info->skb, 0); 143377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 143477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->gbec_status = DSC_INIT16; 143577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(++i == tx_ring->count)) 143677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = 0; 143777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc = PCH_GBE_TX_DESC(*tx_ring, i); 143877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 143977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* weight of a sort for tx, to avoid endless transmit cleanup */ 1440805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if (cleaned_count++ == PCH_GBE_TX_WEIGHT) { 1441805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada cleaned = false; 144277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 1443805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada } 144477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 144577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n", 144677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cleaned_count); 144777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Recover from running out of Tx resources in xmit_frame */ 144877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(cleaned && (netif_queue_stopped(adapter->netdev)))) { 144977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_wake_queue(adapter->netdev); 145077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_restart_count++; 145177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("Tx wake queue\n"); 145277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 145377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock(&adapter->tx_queue_lock); 145477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_clean = i; 145577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock(&adapter->tx_queue_lock); 145677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean); 145777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return cleaned; 145877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 145977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 146077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 146177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_clean_rx - Send received data up the network stack; legacy 146277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 146377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @rx_ring: Rx descriptor ring 146477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @work_done: Completed count 146577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @work_to_do: Request count 146677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 146777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * true: Cleaned the descriptor 146877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * false: Not cleaned the descriptor 146977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 147077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic bool 147177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakepch_gbe_clean_rx(struct pch_gbe_adapter *adapter, 147277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring, 147377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int *work_done, int work_to_do) 147477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 147577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 147677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 147777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_buffer *buffer_info; 147877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_desc *rx_desc; 147977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 length; 148077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int i; 148177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned int cleaned_count = 0; 148277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bool cleaned = false; 1483124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct sk_buff *skb; 148477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u8 dma_status; 148577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u16 gbec_status; 148677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 tcp_ip_status; 148777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 148877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = rx_ring->next_to_clean; 148977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 149077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake while (*work_done < work_to_do) { 149177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Check Rx descriptor status */ 149277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc = PCH_GBE_RX_DESC(*rx_ring, i); 149377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (rx_desc->gbec_status == DSC_INIT16) 149477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 149577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cleaned = true; 149677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cleaned_count++; 149777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 149877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dma_status = rx_desc->dma_status; 149977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake gbec_status = rx_desc->gbec_status; 150077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tcp_ip_status = rx_desc->tcp_ip_status; 150177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc->gbec_status = DSC_INIT16; 150277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info = &rx_ring->buffer_info[i]; 150377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb = buffer_info->skb; 1504124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada buffer_info->skb = NULL; 150577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 150677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* unmap dma */ 150777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dma_unmap_single(&pdev->dev, buffer_info->dma, 150877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->length, DMA_FROM_DEVICE); 150977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info->mapped = false; 151077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 151177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("RxDecNo = 0x%04x Status[DMA:0x%02x GBE:0x%04x " 151277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "TCP:0x%08x] BufInf = 0x%p\n", 151377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i, dma_status, gbec_status, tcp_ip_status, 151477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake buffer_info); 151577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Error check */ 151677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(gbec_status & PCH_GBE_RXD_GMAC_STAT_NOTOCTAL)) { 151777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_frame_errors++; 151877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Receive Not Octal Error\n"); 151977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if (unlikely(gbec_status & 152077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_RXD_GMAC_STAT_NBLERR)) { 152177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_frame_errors++; 152277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Receive Nibble Error\n"); 152377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if (unlikely(gbec_status & 152477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_RXD_GMAC_STAT_CRCERR)) { 152577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_crc_errors++; 152677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Receive CRC Error\n"); 152777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 152877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* get receive length */ 1529124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* length convert[-3], length includes FCS length */ 1530124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada length = (rx_desc->rx_words_eob) - 3 - ETH_FCS_LEN; 1531124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (rx_desc->rx_words_eob & 0x02) 1532124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada length = length - 4; 1533124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada /* 1534124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada * buffer_info->rx_buffer: [Header:14][payload] 1535124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada * skb->data: [Reserve:2][Header:14][payload] 1536124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada */ 1537124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada memcpy(skb->data, buffer_info->rx_buffer, length); 1538124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 153977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* update status of driver */ 154077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_bytes += length; 154177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.rx_packets++; 154277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((gbec_status & PCH_GBE_RXD_GMAC_STAT_MARMLT)) 154377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.multicast++; 154477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Write meta date of skb */ 154577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb_put(skb, length); 154677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->protocol = eth_type_trans(skb, netdev); 15475d05a04d283061b586e8dc819cfa6f4b8cfd5948Toshiharu Okada if (tcp_ip_status & PCH_GBE_RXD_ACC_STAT_TCPIPOK) 154877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->ip_summed = CHECKSUM_NONE; 15495d05a04d283061b586e8dc819cfa6f4b8cfd5948Toshiharu Okada else 15505d05a04d283061b586e8dc819cfa6f4b8cfd5948Toshiharu Okada skb->ip_summed = CHECKSUM_UNNECESSARY; 15515d05a04d283061b586e8dc819cfa6f4b8cfd5948Toshiharu Okada 155277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake napi_gro_receive(&adapter->napi, skb); 155377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (*work_done)++; 155477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("Receive skb->ip_summed: %d length: %d\n", 155577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->ip_summed, length); 155677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 155777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* return some buffers to hardware, one at a time is too slow */ 155877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(cleaned_count >= PCH_GBE_RX_BUFFER_WRITE)) { 155977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_alloc_rx_buffers(adapter, rx_ring, 156077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cleaned_count); 156177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake cleaned_count = 0; 156277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 156377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (++i == rx_ring->count) 156477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = 0; 156577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 156677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_clean = i; 156777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (cleaned_count) 156877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count); 156977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return cleaned; 157077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 157177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 157277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 157377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_setup_tx_resources - Allocate Tx resources (Descriptors) 157477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 157577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Tx descriptor ring (for a specific queue) to setup 157677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 157777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 157877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 157977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 158077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeint pch_gbe_setup_tx_resources(struct pch_gbe_adapter *adapter, 158177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring) 158277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 158377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 158477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_desc *tx_desc; 158577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int size; 158677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int desNo; 158777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 158877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (int)sizeof(struct pch_gbe_buffer) * tx_ring->count; 158989bf67f1f080c947c92f8773482d9e57767ca292Eric Dumazet tx_ring->buffer_info = vzalloc(size); 159077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!tx_ring->buffer_info) { 159125985edcedea6396277003854657b5f3cb31a628Lucas De Marchi pr_err("Unable to allocate memory for the buffer information\n"); 159277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 159377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 159477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 159577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->size = tx_ring->count * (int)sizeof(struct pch_gbe_tx_desc); 159677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 159777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size, 159877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake &tx_ring->dma, GFP_KERNEL); 159977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!tx_ring->desc) { 160077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake vfree(tx_ring->buffer_info); 160177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Unable to allocate memory for the transmit descriptor ring\n"); 160277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 160377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 160477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(tx_ring->desc, 0, tx_ring->size); 160577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 160677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use = 0; 160777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_clean = 0; 160877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_init(&tx_ring->tx_lock); 160977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 161077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (desNo = 0; desNo < tx_ring->count; desNo++) { 161177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc = PCH_GBE_TX_DESC(*tx_ring, desNo); 161277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_desc->gbec_status = DSC_INIT16; 161377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 161477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("tx_ring->desc = 0x%p tx_ring->dma = 0x%08llx\n" 161577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "next_to_clean = 0x%08x next_to_use = 0x%08x\n", 161677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->desc, (unsigned long long)tx_ring->dma, 161777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_clean, tx_ring->next_to_use); 161877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 161977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 162077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 162177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 162277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_setup_rx_resources - Allocate Rx resources (Descriptors) 162377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 162477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @rx_ring: Rx descriptor ring (for a specific queue) to setup 162577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 162677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 162777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 162877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 162977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeint pch_gbe_setup_rx_resources(struct pch_gbe_adapter *adapter, 163077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring) 163177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 163277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 163377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_desc *rx_desc; 163477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int size; 163577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int desNo; 163677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 163777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake size = (int)sizeof(struct pch_gbe_buffer) * rx_ring->count; 163889bf67f1f080c947c92f8773482d9e57767ca292Eric Dumazet rx_ring->buffer_info = vzalloc(size); 163977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!rx_ring->buffer_info) { 164077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Unable to allocate memory for the receive descriptor ring\n"); 164177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 164277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 164377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->size = rx_ring->count * (int)sizeof(struct pch_gbe_rx_desc); 164477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size, 164577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake &rx_ring->dma, GFP_KERNEL); 164677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 164777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!rx_ring->desc) { 164877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Unable to allocate memory for the receive descriptor ring\n"); 164977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake vfree(rx_ring->buffer_info); 165077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 165177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 165277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memset(rx_ring->desc, 0, rx_ring->size); 165377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_clean = 0; 165477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_use = 0; 165577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake for (desNo = 0; desNo < rx_ring->count; desNo++) { 165677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc = PCH_GBE_RX_DESC(*rx_ring, desNo); 165777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_desc->gbec_status = DSC_INIT16; 165877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 165977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("rx_ring->desc = 0x%p rx_ring->dma = 0x%08llx " 166077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "next_to_clean = 0x%08x next_to_use = 0x%08x\n", 166177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->desc, (unsigned long long)rx_ring->dma, 166277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->next_to_clean, rx_ring->next_to_use); 166377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 166477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 166577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 166677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 166777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_free_tx_resources - Free Tx Resources 166877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 166977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @tx_ring: Tx descriptor ring for a specific queue 167077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 167177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_free_tx_resources(struct pch_gbe_adapter *adapter, 167277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring) 167377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 167477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 167577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 167677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_clean_tx_ring(adapter, tx_ring); 167777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake vfree(tx_ring->buffer_info); 167877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->buffer_info = NULL; 167977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); 168077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->desc = NULL; 168177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 168277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 168377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 168477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_free_rx_resources - Free Rx Resources 168577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 168677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @rx_ring: Ring to clean the resources from 168777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 168877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_free_rx_resources(struct pch_gbe_adapter *adapter, 168977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring) 169077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 169177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = adapter->pdev; 169277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 169377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_clean_rx_ring(adapter, rx_ring); 169477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake vfree(rx_ring->buffer_info); 169577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->buffer_info = NULL; 169677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); 169777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rx_ring->desc = NULL; 169877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 169977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 170077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 170177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_request_irq - Allocate an interrupt line 170277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 170377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 170477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 170577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 170677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 170777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_request_irq(struct pch_gbe_adapter *adapter) 170877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 170977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 171077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int err; 171177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int flags; 171277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 171377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake flags = IRQF_SHARED; 171477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->have_msi = false; 171577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pci_enable_msi(adapter->pdev); 171677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("call pci_enable_msi\n"); 171777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) { 171877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("call pci_enable_msi - Error: %d\n", err); 171977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 172077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake flags = 0; 172177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->have_msi = true; 172277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 172377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = request_irq(adapter->pdev->irq, &pch_gbe_intr, 172477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake flags, netdev->name, netdev); 172577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) 172677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Unable to allocate interrupt Error: %d\n", err); 172777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("adapter->have_msi : %d flags : 0x%04x return : 0x%04x\n", 172877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->have_msi, flags, err); 172977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return err; 173077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 173177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 173277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 173377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_set_multi(struct net_device *netdev); 173477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 173577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_up - Up GbE network device 173677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 173777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 173877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 173977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 174077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 174177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeint pch_gbe_up(struct pch_gbe_adapter *adapter) 174277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 174377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 174477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; 174577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; 174677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int err; 174777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 17482b53d07891630dead46d65c8f896955fd3ae0302Darren Hart /* Ensure we have a valid MAC */ 17492b53d07891630dead46d65c8f896955fd3ae0302Darren Hart if (!is_valid_ether_addr(adapter->hw.mac.addr)) { 17502b53d07891630dead46d65c8f896955fd3ae0302Darren Hart pr_err("Error: Invalid MAC address\n"); 17512b53d07891630dead46d65c8f896955fd3ae0302Darren Hart return -EINVAL; 17522b53d07891630dead46d65c8f896955fd3ae0302Darren Hart } 17532b53d07891630dead46d65c8f896955fd3ae0302Darren Hart 175477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* hardware has been reset, we need to reload some things */ 175577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_multi(netdev); 175677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 175777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_setup_tctl(adapter); 175877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_configure_tx(adapter); 175977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_setup_rctl(adapter); 176077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_configure_rx(adapter); 176177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 176277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pch_gbe_request_irq(adapter); 176377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) { 176477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Error: can't bring device up\n"); 176577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return err; 176677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 1767124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count); 1768124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (err) { 1769124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pr_err("Error: can't bring device up\n"); 1770124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return err; 1771124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 177277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_alloc_tx_buffers(adapter, tx_ring); 177377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count); 177477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->tx_queue_len = netdev->tx_queue_len; 17755229d87edcd80a3bceb0708ebd767faff2e589a9Toshiharu Okada pch_gbe_start_receive(&adapter->hw); 177677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 177777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mod_timer(&adapter->watchdog_timer, jiffies); 177877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 177977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake napi_enable(&adapter->napi); 178077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_irq_enable(adapter); 178177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_start_queue(adapter->netdev); 178277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 178377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 178477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 178577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 178677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 178777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_down - Down GbE network device 178877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure 178977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 179077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakevoid pch_gbe_down(struct pch_gbe_adapter *adapter) 179177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 179277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 1793124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; 179477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 179577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* signal that we're down so the interrupt handler does not 179677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * reschedule our watchdog timer */ 179777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake napi_disable(&adapter->napi); 179877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake atomic_set(&adapter->irq_sem, 0); 179977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 180077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_irq_disable(adapter); 180177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_free_irq(adapter); 180277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 180377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake del_timer_sync(&adapter->watchdog_timer); 180477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 180577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->tx_queue_len = adapter->tx_queue_len; 180677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_carrier_off(netdev); 180777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_stop_queue(netdev); 180877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 180977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 181077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_clean_tx_ring(adapter, adapter->tx_ring); 181177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_clean_rx_ring(adapter, adapter->rx_ring); 1812124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada 1813124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pci_free_consistent(adapter->pdev, rx_ring->rx_buff_pool_size, 1814124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool, rx_ring->rx_buff_pool_logic); 1815124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool_logic = 0; 1816124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool_size = 0; 1817124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada rx_ring->rx_buff_pool = NULL; 181877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 181977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 182077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 182177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_sw_init - Initialize general software structures (struct pch_gbe_adapter) 182277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @adapter: Board private structure to initialize 182377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 182477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 182577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 182677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 182777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_sw_init(struct pch_gbe_adapter *adapter) 182877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 182977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 183077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = adapter->netdev; 183177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 183277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_2048; 183377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 183477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 183577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 183677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Initialize the hardware-specific values */ 183777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pch_gbe_hal_setup_init_funcs(hw)) { 183877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Hardware Initialization Failure\n"); 183977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -EIO; 184077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 184177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pch_gbe_alloc_queues(adapter)) { 184277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Unable to allocate memory for queues\n"); 184377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -ENOMEM; 184477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 184577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_init(&adapter->hw.miim_lock); 184677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_init(&adapter->tx_queue_lock); 184777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_init(&adapter->stats_lock); 184877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_lock_init(&adapter->ethtool_lock); 184977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake atomic_set(&adapter->irq_sem, 0); 185077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_irq_disable(adapter); 185177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 185277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_init_stats(adapter); 185377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 185477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("rx_buffer_len : %d mac.min_frame_size : %d mac.max_frame_size : %d\n", 185577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (u32) adapter->rx_buffer_len, 185677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.min_frame_size, hw->mac.max_frame_size); 185777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 185877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 185977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 186077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 186177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_open - Called when a network interface is made active 186277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 186377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 186477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 186577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 186677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 186777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_open(struct net_device *netdev) 186877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 186977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 187077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 187177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int err; 187277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 187377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* allocate transmit descriptors */ 187477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pch_gbe_setup_tx_resources(adapter, adapter->tx_ring); 187577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) 187677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_setup_tx; 187777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* allocate receive descriptors */ 187877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pch_gbe_setup_rx_resources(adapter, adapter->rx_ring); 187977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) 188077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_setup_rx; 188177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_up_phy(hw); 188277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pch_gbe_up(adapter); 188377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) 188477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_up; 188577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("Success End\n"); 188677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 188777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 188877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_up: 188977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!adapter->wake_up_evt) 189077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_down_phy(hw); 189177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_free_rx_resources(adapter, adapter->rx_ring); 189277555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_setup_rx: 189377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_free_tx_resources(adapter, adapter->tx_ring); 189477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_setup_tx: 189577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 189677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Error End\n"); 189777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return err; 189877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 189977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 190077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 190177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_stop - Disables a network interface 190277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 190377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 190477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 190577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 190677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_stop(struct net_device *netdev) 190777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 190877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 190977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 191077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 191177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_down(adapter); 191277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!adapter->wake_up_evt) 191377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_down_phy(hw); 191477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_free_tx_resources(adapter, adapter->tx_ring); 191577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_free_rx_resources(adapter, adapter->rx_ring); 191677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 191777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 191877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 191977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 192077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_xmit_frame - Packet transmitting start 192177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @skb: Socket buffer structure 192277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 192377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 192477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * - NETDEV_TX_OK: Normal end 192577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * - NETDEV_TX_BUSY: Error end 192677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 192777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 192877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 192977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 193077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; 193177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unsigned long flags; 193277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 193377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(skb->len > (adapter->hw.mac.max_frame_size - 4))) { 193477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Transfer length Error: skb len: %d > max: %d\n", 193577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake skb->len, adapter->hw.mac.max_frame_size); 1936419c20465d6319274e7286f0966e2390540e6e0aJiri Slaby dev_kfree_skb_any(skb); 193777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_length_errors++; 193877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return NETDEV_TX_OK; 193977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 194077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags)) { 194177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Collision - tell upper layer to requeue */ 194277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return NETDEV_TX_LOCKED; 194377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 194477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring))) { 194577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_stop_queue(netdev); 194677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 194777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("Return : BUSY next_to use : 0x%08x next_to clean : 0x%08x\n", 194877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake tx_ring->next_to_use, tx_ring->next_to_clean); 194977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return NETDEV_TX_BUSY; 195077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 195177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 195277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 195377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* CRC,ITAG no support */ 195477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_tx_queue(adapter, tx_ring, skb); 195577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return NETDEV_TX_OK; 195677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 195777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 195877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 195977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_get_stats - Get System Network Statistics 196077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 196177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns: The current stats 196277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 196377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic struct net_device_stats *pch_gbe_get_stats(struct net_device *netdev) 196477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 196577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* only return the current stats */ 196677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return &netdev->stats; 196777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 196877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 196977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 197077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_set_multi - Multicast and Promiscuous mode set 197177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 197277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 197377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_set_multi(struct net_device *netdev) 197477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 197577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 197677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 197777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct netdev_hw_addr *ha; 197877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u8 *mta_list; 197977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 rctl; 198077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int i; 198177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int mc_count; 198277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 198377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("netdev->flags : 0x%08x\n", netdev->flags); 198477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 198577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Check for Promiscuous and All Multicast modes */ 198677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl = ioread32(&hw->reg->RX_MODE); 198777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mc_count = netdev_mc_count(netdev); 198877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((netdev->flags & IFF_PROMISC)) { 198977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl &= ~PCH_GBE_ADD_FIL_EN; 199077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl &= ~PCH_GBE_MLT_FIL_EN; 199177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else if ((netdev->flags & IFF_ALLMULTI)) { 199277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* all the multicasting receive permissions */ 199377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl |= PCH_GBE_ADD_FIL_EN; 199477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl &= ~PCH_GBE_MLT_FIL_EN; 199577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 199677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (mc_count >= PCH_GBE_MAR_ENTRIES) { 199777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* all the multicasting receive permissions */ 199877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl |= PCH_GBE_ADD_FIL_EN; 199977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl &= ~PCH_GBE_MLT_FIL_EN; 200077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 200177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake rctl |= (PCH_GBE_ADD_FIL_EN | PCH_GBE_MLT_FIL_EN); 200277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 200377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 200477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iowrite32(rctl, &hw->reg->RX_MODE); 200577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 200677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (mc_count >= PCH_GBE_MAR_ENTRIES) 200777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 200877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake mta_list = kmalloc(mc_count * ETH_ALEN, GFP_ATOMIC); 200977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!mta_list) 201077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 201177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 201277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* The shared function expects a packed array of only addresses. */ 201377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake i = 0; 201477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev_for_each_mc_addr(ha, netdev) { 201577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (i == mc_count) 201677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake break; 201777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(mta_list + (i++ * ETH_ALEN), &ha->addr, ETH_ALEN); 201877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 201977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_mc_addr_list_update(hw, mta_list, i, 1, 202077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake PCH_GBE_MAR_ENTRIES); 202177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(mta_list); 202277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 202377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x netdev->mc_count : 0x%08x\n", 202477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&hw->reg->RX_MODE), mc_count); 202577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 202677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 202777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 202877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_set_mac - Change the Ethernet Address of the NIC 202977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 203077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @addr: Pointer to an address structure 203177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 203277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 203377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * -EADDRNOTAVAIL: Failed 203477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 203577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_set_mac(struct net_device *netdev, void *addr) 203677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 203777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 203877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct sockaddr *skaddr = addr; 203977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int ret_val; 204077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 204177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!is_valid_ether_addr(skaddr->sa_data)) { 204277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret_val = -EADDRNOTAVAIL; 204377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 204477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(netdev->dev_addr, skaddr->sa_data, netdev->addr_len); 204577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(adapter->hw.mac.addr, skaddr->sa_data, netdev->addr_len); 204677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_mar_set(&adapter->hw, adapter->hw.mac.addr, 0); 204777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret_val = 0; 204877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 204977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("ret_val : 0x%08x\n", ret_val); 205077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("dev_addr : %pM\n", netdev->dev_addr); 205177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("mac_addr : %pM\n", adapter->hw.mac.addr); 205277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("MAC_ADR1AB reg : 0x%08x 0x%08x\n", 205377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&adapter->hw.reg->mac_adr[0].high), 205477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ioread32(&adapter->hw.reg->mac_adr[0].low)); 205577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return ret_val; 205677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 205777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 205877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 205977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_change_mtu - Change the Maximum Transfer Unit 206077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 206177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @new_mtu: New value for maximum frame size 206277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 206377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 206477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * -EINVAL: Failed 206577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 206677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_change_mtu(struct net_device *netdev, int new_mtu) 206777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 206877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 206977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int max_frame; 2070124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada unsigned long old_rx_buffer_len = adapter->rx_buffer_len; 2071124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada int err; 207277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 207377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; 207477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || 207577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (max_frame > PCH_GBE_MAX_JUMBO_FRAME_SIZE)) { 207677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Invalid MTU setting\n"); 207777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return -EINVAL; 207877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 207977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (max_frame <= PCH_GBE_FRAME_SIZE_2048) 208077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_2048; 208177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake else if (max_frame <= PCH_GBE_FRAME_SIZE_4096) 208277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_4096; 208377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake else if (max_frame <= PCH_GBE_FRAME_SIZE_8192) 208477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->rx_buffer_len = PCH_GBE_FRAME_SIZE_8192; 208577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake else 2086124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->rx_buffer_len = PCH_GBE_MAX_RX_BUFFER_SIZE; 208777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2088124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (netif_running(netdev)) { 2089124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_down(adapter); 2090124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada err = pch_gbe_up(adapter); 2091124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (err) { 2092124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->rx_buffer_len = old_rx_buffer_len; 2093124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_up(adapter); 2094124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada return -ENOMEM; 2095124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } else { 2096124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada netdev->mtu = new_mtu; 2097124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->hw.mac.max_frame_size = max_frame; 2098124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 2099124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } else { 210077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 2101124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada netdev->mtu = new_mtu; 2102124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->hw.mac.max_frame_size = max_frame; 2103124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 210477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 210577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("max_frame : %d rx_buffer_len : %d mtu : %d max_frame_size : %d\n", 210677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake max_frame, (u32) adapter->rx_buffer_len, netdev->mtu, 210777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->hw.mac.max_frame_size); 210877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 210977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 211077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 211177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 2112756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław * pch_gbe_set_features - Reset device after features changed 2113756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław * @netdev: Network interface device structure 2114756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław * @features: New features 2115756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław * Returns 2116756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław * 0: HW state updated successfully 2117756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław */ 2118c8f44affb7244f2ac3e703cab13d55ede27621bbMichał Mirosławstatic int pch_gbe_set_features(struct net_device *netdev, 2119c8f44affb7244f2ac3e703cab13d55ede27621bbMichał Mirosław netdev_features_t features) 2120756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław{ 2121756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław struct pch_gbe_adapter *adapter = netdev_priv(netdev); 2122c8f44affb7244f2ac3e703cab13d55ede27621bbMichał Mirosław netdev_features_t changed = features ^ netdev->features; 2123756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław 2124756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław if (!(changed & NETIF_F_RXCSUM)) 2125756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław return 0; 2126756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław 2127756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław if (netif_running(netdev)) 2128756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław pch_gbe_reinit_locked(adapter); 2129756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław else 2130756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław pch_gbe_reset(adapter); 2131756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław 2132756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław return 0; 2133756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław} 2134756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław 2135756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław/** 213677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_ioctl - Controls register through a MII interface 213777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 213877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @ifr: Pointer to ifr structure 213977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @cmd: Control command 214077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 214177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * 0: Successfully 214277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Negative value: Failed 214377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 214477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 214577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 214677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 214777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 214877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("cmd : 0x%04x\n", cmd); 214977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 215077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL); 215177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 215277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 215377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 215477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_tx_timeout - Respond to a Tx Hang 215577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 215677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 215777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_tx_timeout(struct net_device *netdev) 215877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 215977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 216077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 216177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Do the reset outside of interrupt context */ 216277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->stats.tx_timeout_count++; 216377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake schedule_work(&adapter->reset_task); 216477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 216577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 216677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 216777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_napi_poll - NAPI receive and transfer polling callback 216877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @napi: Pointer of polling device struct 216977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @budget: The maximum number of a packet 217077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * Returns 217177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * false: Exit the polling mode 217277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * true: Continue the polling mode 217377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 217477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_napi_poll(struct napi_struct *napi, int budget) 217577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 217677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = 217777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake container_of(napi, struct pch_gbe_adapter, napi); 217877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int work_done = 0; 217977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bool poll_end_flag = false; 218077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake bool cleaned = false; 2181124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada u32 int_en; 218277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 218377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("budget : %d\n", budget); 218477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2185805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada pch_gbe_clean_rx(adapter, adapter->rx_ring, &work_done, budget); 2186805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada cleaned = pch_gbe_clean_tx(adapter, adapter->tx_ring); 2187805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada 2188805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if (!cleaned) 2189805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada work_done = budget; 2190805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada /* If no Tx and not enough Rx work done, 2191805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada * exit the polling mode 2192805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada */ 2193805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if (work_done < budget) 219477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake poll_end_flag = true; 2195805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada 2196805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if (poll_end_flag) { 2197805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada napi_complete(napi); 2198805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada if (adapter->rx_stop_flag) { 2199805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada adapter->rx_stop_flag = false; 2200805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada pch_gbe_start_receive(&adapter->hw); 2201805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada } 2202805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada pch_gbe_irq_enable(adapter); 2203805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada } else 2204124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada if (adapter->rx_stop_flag) { 2205124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada adapter->rx_stop_flag = false; 2206124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada pch_gbe_start_receive(&adapter->hw); 2207124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada int_en = ioread32(&adapter->hw.reg->INT_EN); 2208124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada iowrite32((int_en | PCH_GBE_INT_RX_FIFO_ERR), 2209805e969f6151eda7bc1a57e9c737054230acc3ccToshiharu Okada &adapter->hw.reg->INT_EN); 2210124d770a6459be21b84445f6ebf7dbfb60d43585Toshiharu Okada } 221177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 221277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("poll_end_flag : %d work_done : %d budget : %d\n", 221377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake poll_end_flag, work_done, budget); 221477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 221577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return work_done; 221677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 221777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 221877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef CONFIG_NET_POLL_CONTROLLER 221977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/** 222077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * pch_gbe_netpoll - Used by things like netconsole to send skbs 222177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake * @netdev: Network interface device structure 222277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake */ 222377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_netpoll(struct net_device *netdev) 222477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 222577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 222677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 222777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake disable_irq(adapter->pdev->irq); 222877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_intr(adapter->pdev->irq, netdev); 222977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake enable_irq(adapter->pdev->irq); 223077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 223177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 223277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 223377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic const struct net_device_ops pch_gbe_netdev_ops = { 223477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_open = pch_gbe_open, 223577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_stop = pch_gbe_stop, 223677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_start_xmit = pch_gbe_xmit_frame, 223777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_get_stats = pch_gbe_get_stats, 223877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_set_mac_address = pch_gbe_set_mac, 223977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_tx_timeout = pch_gbe_tx_timeout, 224077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_change_mtu = pch_gbe_change_mtu, 2241756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław .ndo_set_features = pch_gbe_set_features, 224277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_do_ioctl = pch_gbe_ioctl, 2243afc4b13df143122f99a0eb10bfefb216c2806de0Jiri Pirko .ndo_set_rx_mode = pch_gbe_set_multi, 224477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef CONFIG_NET_POLL_CONTROLLER 224577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .ndo_poll_controller = pch_gbe_netpoll, 224677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 224777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake}; 224877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 224977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic pci_ers_result_t pch_gbe_io_error_detected(struct pci_dev *pdev, 225077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_channel_state_t state) 225177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 225277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 225377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 225477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 225577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_device_detach(netdev); 225677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (netif_running(netdev)) 225777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_down(adapter); 225877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_device(pdev); 225977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Request a slot slot reset. */ 226077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return PCI_ERS_RESULT_NEED_RESET; 226177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 226277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 226377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic pci_ers_result_t pch_gbe_io_slot_reset(struct pci_dev *pdev) 226477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 226577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 226677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 226777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 226877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 226977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pci_enable_device(pdev)) { 227077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Cannot re-enable PCI device after reset\n"); 227177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return PCI_ERS_RESULT_DISCONNECT; 227277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 227377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_set_master(pdev); 227477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_enable_wake(pdev, PCI_D0, 0); 227577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_up_phy(hw); 227677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 227777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Clear wake up status */ 227877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_set_wol_event(hw, 0); 227977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 228077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return PCI_ERS_RESULT_RECOVERED; 228177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 228277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 228377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_io_resume(struct pci_dev *pdev) 228477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 228577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 228677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 228777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 228877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (netif_running(netdev)) { 228977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pch_gbe_up(adapter)) { 229077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_debug("can't bring device back up after reset\n"); 229177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return; 229277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 229377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 229477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_device_attach(netdev); 229577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 229677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 229777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int __pch_gbe_suspend(struct pci_dev *pdev) 229877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 229977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 230077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 230177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 230277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 wufc = adapter->wake_up_evt; 230377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int retval = 0; 230477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 230577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_device_detach(netdev); 230677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (netif_running(netdev)) 230777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_down(adapter); 230877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (wufc) { 230977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_multi(netdev); 231077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_setup_rctl(adapter); 231177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_configure_rx(adapter); 231277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_rgmii_ctrl(adapter, hw->mac.link_speed, 231377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex); 231477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_mode(adapter, hw->mac.link_speed, 231577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake hw->mac.link_duplex); 231677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_set_wol_event(hw, wufc); 231777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_device(pdev); 231877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 231977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_down_phy(hw); 232077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_set_wol_event(hw, wufc); 232177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_device(pdev); 232277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 232377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return retval; 232477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 232577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 232677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef CONFIG_PM 232777555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_suspend(struct device *device) 232877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 232977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = to_pci_dev(device); 233077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 233177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return __pch_gbe_suspend(pdev); 233277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 233377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 233477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_resume(struct device *device) 233577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 233677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pci_dev *pdev = to_pci_dev(device); 233777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 233877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 233977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_hw *hw = &adapter->hw; 234077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake u32 err; 234177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 234277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake err = pci_enable_device(pdev); 234377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (err) { 234477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_err("Cannot enable PCI device from suspend\n"); 234577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return err; 234677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 234777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_set_master(pdev); 234877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_power_up_phy(hw); 234977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 235077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Clear wake on lan control and status */ 235177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_set_wol_event(hw, 0); 235277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 235377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (netif_running(netdev)) 235477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_up(adapter); 235577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_device_attach(netdev); 235677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 235777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 235877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 235977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif /* CONFIG_PM */ 236077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 236177555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_shutdown(struct pci_dev *pdev) 236277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 236377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake __pch_gbe_suspend(pdev); 236477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (system_state == SYSTEM_POWER_OFF) { 236577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_wake_from_d3(pdev, true); 236677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_set_power_state(pdev, PCI_D3hot); 236777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 236877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 236977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 237077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void pch_gbe_remove(struct pci_dev *pdev) 237177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 237277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev = pci_get_drvdata(pdev); 237377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter = netdev_priv(netdev); 237477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 23752321f3b4afc7c017f34b0cad0624b3b9ebdf2ba4Tejun Heo cancel_work_sync(&adapter->reset_task); 237677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake unregister_netdev(netdev); 237777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 237877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_phy_hw_reset(&adapter->hw); 237977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 238077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(adapter->tx_ring); 238177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(adapter->rx_ring); 238277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 238377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iounmap(adapter->hw.reg); 238477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_release_regions(pdev); 238577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake free_netdev(netdev); 238677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_device(pdev); 238777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 238877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 238977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int pch_gbe_probe(struct pci_dev *pdev, 239077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake const struct pci_device_id *pci_id) 239177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 239277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct net_device *netdev; 239377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake struct pch_gbe_adapter *adapter; 239477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int ret; 239577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 239677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pci_enable_device(pdev); 239777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) 239877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return ret; 239977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 240077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) 240177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake || pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { 240277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 240377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) { 240477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pci_set_consistent_dma_mask(pdev, 240577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake DMA_BIT_MASK(32)); 240677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) { 240777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, "ERR: No usable DMA " 240877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "configuration, aborting\n"); 240977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_disable_device; 241077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 241177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 241277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 241377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 241477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pci_request_regions(pdev, KBUILD_MODNAME); 241577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) { 241677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, 241777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "ERR: Can't reserve PCI I/O and memory resources\n"); 241877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_disable_device; 241977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 242077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_set_master(pdev); 242177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 242277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev = alloc_etherdev((int)sizeof(struct pch_gbe_adapter)); 242377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!netdev) { 242477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = -ENOMEM; 242577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, 242677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "ERR: Can't allocate and set up an Ethernet device\n"); 242777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_release_pci; 242877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 242977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake SET_NETDEV_DEV(netdev, &pdev->dev); 243077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 243177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_set_drvdata(pdev, netdev); 243277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter = netdev_priv(netdev); 243377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->netdev = netdev; 243477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->pdev = pdev; 243577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->hw.back = adapter; 243677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->hw.reg = pci_iomap(pdev, PCH_GBE_PCI_BAR, 0); 243777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!adapter->hw.reg) { 243877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = -EIO; 243977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, "Can't ioremap\n"); 244077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_free_netdev; 244177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 244277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 244377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->netdev_ops = &pch_gbe_netdev_ops; 244477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netdev->watchdog_timeo = PCH_GBE_WATCHDOG_PERIOD; 244577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_napi_add(netdev, &adapter->napi, 244677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_napi_poll, PCH_GBE_RX_WEIGHT); 2447756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław netdev->hw_features = NETIF_F_RXCSUM | 2448756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 2449756a6b03da98903fa22ad7f10752de11782249fcMichał Mirosław netdev->features = netdev->hw_features; 245077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_set_ethtool_ops(netdev); 245177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 245298200ec28a66c8db5839ac26e9a895984206b50fToshiharu Okada pch_gbe_mac_load_mac_addr(&adapter->hw); 245377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_mac_reset_hw(&adapter->hw); 245477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 245577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* setup the private structure */ 245677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pch_gbe_sw_init(adapter); 245777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) 245877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_iounmap; 245977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 246077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Initialize PHY */ 246177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pch_gbe_init_phy(adapter); 246277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) { 246377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, "PHY initialize error\n"); 246477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_free_adapter; 246577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 246677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_get_bus_info(&adapter->hw); 246777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 246877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* Read the MAC address. and store to the private data */ 246977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = pch_gbe_hal_read_mac_addr(&adapter->hw); 247077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) { 247177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_err(&pdev->dev, "MAC address Read Error\n"); 247277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_free_adapter; 247377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 247477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 247577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len); 247677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (!is_valid_ether_addr(netdev->dev_addr)) { 24772b53d07891630dead46d65c8f896955fd3ae0302Darren Hart /* 24782b53d07891630dead46d65c8f896955fd3ae0302Darren Hart * If the MAC is invalid (or just missing), display a warning 24792b53d07891630dead46d65c8f896955fd3ae0302Darren Hart * but do not abort setting up the device. pch_gbe_up will 24802b53d07891630dead46d65c8f896955fd3ae0302Darren Hart * prevent the interface from being brought up until a valid MAC 24812b53d07891630dead46d65c8f896955fd3ae0302Darren Hart * is set. 24822b53d07891630dead46d65c8f896955fd3ae0302Darren Hart */ 24832b53d07891630dead46d65c8f896955fd3ae0302Darren Hart dev_err(&pdev->dev, "Invalid MAC address, " 24842b53d07891630dead46d65c8f896955fd3ae0302Darren Hart "interface disabled.\n"); 248577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 248677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake setup_timer(&adapter->watchdog_timer, pch_gbe_watchdog, 248777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake (unsigned long)adapter); 248877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 248977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake INIT_WORK(&adapter->reset_task, pch_gbe_reset_task); 249077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 249177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_check_options(adapter); 249277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 249377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* initialize the wol settings based on the eeprom settings */ 249477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake adapter->wake_up_evt = PCH_GBE_WL_INIT_SETTING; 249577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_info(&pdev->dev, "MAC address : %pM\n", netdev->dev_addr); 249677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 249777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* reset the hardware with the new settings */ 249877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_reset(adapter); 249977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 250077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake ret = register_netdev(netdev); 250177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (ret) 250277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake goto err_free_adapter; 250377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* tell the stack to leave us alone until pch_gbe_open() is called */ 250477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_carrier_off(netdev); 250577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake netif_stop_queue(netdev); 250677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 250777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake dev_dbg(&pdev->dev, "OKIsemi(R) PCH Network Connection\n"); 250877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 250977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake device_set_wakeup_enable(&pdev->dev, 1); 251077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return 0; 251177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 251277555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_free_adapter: 251377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pch_gbe_hal_phy_hw_reset(&adapter->hw); 251477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(adapter->tx_ring); 251577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake kfree(adapter->rx_ring); 251677555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_iounmap: 251777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake iounmap(adapter->hw.reg); 251877555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_free_netdev: 251977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake free_netdev(netdev); 252077555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_release_pci: 252177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_release_regions(pdev); 252277555ee7228234257957fd54daa0b69178906320Masayuki Ohtakeerr_disable_device: 252377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pci_disable_device(pdev); 252477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return ret; 252577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 252677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 25277fc4463309faa087f5e41569a987d43b1d71b982Joe Perchesstatic DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = { 252877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake {.vendor = PCI_VENDOR_ID_INTEL, 252977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .device = PCI_DEVICE_ID_INTEL_IOH1_GBE, 253077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .subvendor = PCI_ANY_ID, 253177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .subdevice = PCI_ANY_ID, 253277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .class = (PCI_CLASS_NETWORK_ETHERNET << 8), 253377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .class_mask = (0xFFFF00) 253477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake }, 2535b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya {.vendor = PCI_VENDOR_ID_ROHM, 2536b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya .device = PCI_DEVICE_ID_ROHM_ML7223_GBE, 2537b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya .subvendor = PCI_ANY_ID, 2538b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya .subdevice = PCI_ANY_ID, 2539b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya .class = (PCI_CLASS_NETWORK_ETHERNET << 8), 2540b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya .class_mask = (0xFFFF00) 2541b0e6baf5619a6fa3eaf43b55fdb4daa362c3c916Tomoya }, 25427756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada {.vendor = PCI_VENDOR_ID_ROHM, 25437756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada .device = PCI_DEVICE_ID_ROHM_ML7831_GBE, 25447756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada .subvendor = PCI_ANY_ID, 25457756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada .subdevice = PCI_ANY_ID, 25467756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada .class = (PCI_CLASS_NETWORK_ETHERNET << 8), 25477756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada .class_mask = (0xFFFF00) 25487756332f5b64c9c1535712b9679792e8bd4f0019Toshiharu Okada }, 254977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake /* required last entry */ 255077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake {0} 255177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake}; 255277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 255377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#ifdef CONFIG_PM 255477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic const struct dev_pm_ops pch_gbe_pm_ops = { 255577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .suspend = pch_gbe_suspend, 255677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .resume = pch_gbe_resume, 255777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .freeze = pch_gbe_suspend, 255877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .thaw = pch_gbe_resume, 255977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .poweroff = pch_gbe_suspend, 256077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .restore = pch_gbe_resume, 256177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake}; 256277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 256377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 256477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic struct pci_error_handlers pch_gbe_err_handler = { 256577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .error_detected = pch_gbe_io_error_detected, 256677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .slot_reset = pch_gbe_io_slot_reset, 256777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .resume = pch_gbe_io_resume 256877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake}; 256977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2570f7594d42944c0dfca90318f50978a4bdf8504086Randy Dunlapstatic struct pci_driver pch_gbe_driver = { 257177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .name = KBUILD_MODNAME, 257277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .id_table = pch_gbe_pcidev_id, 257377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .probe = pch_gbe_probe, 257477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .remove = pch_gbe_remove, 2575aa33860158114d0df3c7997bc1dd41c0168e1c2aRafael J. Wysocki#ifdef CONFIG_PM 257677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .driver.pm = &pch_gbe_pm_ops, 257777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake#endif 257877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .shutdown = pch_gbe_shutdown, 257977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake .err_handler = &pch_gbe_err_handler 258077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake}; 258177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 258277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 258377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic int __init pch_gbe_init_module(void) 258477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 258577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake int ret; 258677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2587f7594d42944c0dfca90318f50978a4bdf8504086Randy Dunlap ret = pci_register_driver(&pch_gbe_driver); 258877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (copybreak != PCH_GBE_COPYBREAK_DEFAULT) { 258977555ee7228234257957fd54daa0b69178906320Masayuki Ohtake if (copybreak == 0) { 259077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_info("copybreak disabled\n"); 259177555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } else { 259277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake pr_info("copybreak enabled for packets <= %u bytes\n", 259377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake copybreak); 259477555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 259577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake } 259677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake return ret; 259777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 259877555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 259977555ee7228234257957fd54daa0b69178906320Masayuki Ohtakestatic void __exit pch_gbe_exit_module(void) 260077555ee7228234257957fd54daa0b69178906320Masayuki Ohtake{ 2601f7594d42944c0dfca90318f50978a4bdf8504086Randy Dunlap pci_unregister_driver(&pch_gbe_driver); 260277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake} 260377555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 260477555ee7228234257957fd54daa0b69178906320Masayuki Ohtakemodule_init(pch_gbe_init_module); 260577555ee7228234257957fd54daa0b69178906320Masayuki Ohtakemodule_exit(pch_gbe_exit_module); 260677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 2607a1dcfcb7f2d08717325157ed3c1db2362d6eb8c9Toshiharu OkadaMODULE_DESCRIPTION("EG20T PCH Gigabit ethernet Driver"); 2608a1dcfcb7f2d08717325157ed3c1db2362d6eb8c9Toshiharu OkadaMODULE_AUTHOR("OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>"); 260977555ee7228234257957fd54daa0b69178906320Masayuki OhtakeMODULE_LICENSE("GPL"); 261077555ee7228234257957fd54daa0b69178906320Masayuki OhtakeMODULE_VERSION(DRV_VERSION); 261177555ee7228234257957fd54daa0b69178906320Masayuki OhtakeMODULE_DEVICE_TABLE(pci, pch_gbe_pcidev_id); 261277555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 261377555ee7228234257957fd54daa0b69178906320Masayuki Ohtakemodule_param(copybreak, uint, 0644); 261477555ee7228234257957fd54daa0b69178906320Masayuki OhtakeMODULE_PARM_DESC(copybreak, 261577555ee7228234257957fd54daa0b69178906320Masayuki Ohtake "Maximum size of packet that is copied to a new buffer on receive"); 261677555ee7228234257957fd54daa0b69178906320Masayuki Ohtake 261777555ee7228234257957fd54daa0b69178906320Masayuki Ohtake/* pch_gbe_main.c */ 2618