11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * All rights reserved. 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This software may be redistributed and/or modified under 61da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * the terms of the GNU General Public License as published by the Free 71da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Software Foundation; either version 2 of the License, or 81da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * any later version. 91da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * This program is distributed in the hope that it will be useful, but 111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * for more details. 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * File: via-velocity.h 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Purpose: Header file to define driver's private structures. 181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Author: Chuang Liang-Shing, AJ Jiang 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Date: Jan 24, 2003 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef VELOCITY_H 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_H 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_TX_CSUM_SUPPORT 291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_NAME "via-velocity" 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FULL_DRV_NAM "VIA Networking Velocity Family Gigabit Ethernet Adapter Driver" 321bda8aa86b89d4c9b668000127ff87172f2daa10Simon Kagstrom#define VELOCITY_VERSION "1.15" 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 34cabb7667dc150320ccd9d6f64fbd7a34766bc775Jeff Garzik#define VELOCITY_IO_SIZE 256 35dfff7144b14bab3d8baaeba8926fab371fa4a01eSimon Kagstrom#define VELOCITY_NAPI_WEIGHT 64 36cabb7667dc150320ccd9d6f64fbd7a34766bc775Jeff Garzik 371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_BUF_SZ 1540 381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_UNITS 8 401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define OPTION_DEFAULT { [0 ... MAX_UNITS-1] = -1} 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define REV_ID_VT6110 (0) 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BYTE_REG_BITS_ON(x,p) do { writeb(readb((p))|(x),(p));} while (0) 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WORD_REG_BITS_ON(x,p) do { writew(readw((p))|(x),(p));} while (0) 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DWORD_REG_BITS_ON(x,p) do { writel(readl((p))|(x),(p));} while (0) 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BYTE_REG_BITS_IS_ON(x,p) (readb((p)) & (x)) 491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WORD_REG_BITS_IS_ON(x,p) (readw((p)) & (x)) 501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DWORD_REG_BITS_IS_ON(x,p) (readl((p)) & (x)) 511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BYTE_REG_BITS_OFF(x,p) do { writeb(readb((p)) & (~(x)),(p));} while (0) 531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WORD_REG_BITS_OFF(x,p) do { writew(readw((p)) & (~(x)),(p));} while (0) 541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DWORD_REG_BITS_OFF(x,p) do { writel(readl((p)) & (~(x)),(p));} while (0) 551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BYTE_REG_BITS_SET(x,m,p) do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0) 571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WORD_REG_BITS_SET(x,m,p) do { writew( (readw((p)) & (~(m))) |(x),(p));} while (0) 581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DWORD_REG_BITS_SET(x,m,p) do { writel( (readl((p)) & (~(m)))|(x),(p));} while (0) 591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VAR_USED(p) do {(p)=(p);} while (0) 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Purpose: Structures for MAX RX/TX descriptors. 641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define B_OWNED_BY_CHIP 1 681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define B_OWNED_BY_HOST 0 691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the RSR0 register 721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 744a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_DETAG cpu_to_le16(0x0080) 754a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_SNTAG cpu_to_le16(0x0040) 764a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_RXER cpu_to_le16(0x0020) 774a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_RL cpu_to_le16(0x0010) 784a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_CE cpu_to_le16(0x0008) 794a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_FAE cpu_to_le16(0x0004) 804a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_CRC cpu_to_le16(0x0002) 814a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_VIDM cpu_to_le16(0x0001) 821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the RSR1 register 851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 874a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_RXOK cpu_to_le16(0x8000) // rx OK 884a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_PFT cpu_to_le16(0x4000) // Perfect filtering address match 894a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_MAR cpu_to_le16(0x2000) // MAC accept multicast address packet 904a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_BAR cpu_to_le16(0x1000) // MAC accept broadcast address packet 914a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_PHY cpu_to_le16(0x0800) // MAC accept physical address packet 924a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_VTAG cpu_to_le16(0x0400) // 802.1p/1q tagging packet indicator 934a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_STP cpu_to_le16(0x0200) // start of packet 944a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define RSR_EDP cpu_to_le16(0x0100) // end of packet 951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CSM register 981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1005a6338db37885af06760d40cad589316e48431e9Dave Jones#define CSM_IPOK 0x40 //IP Checksum validation ok 1015a6338db37885af06760d40cad589316e48431e9Dave Jones#define CSM_TUPOK 0x20 //TCP/UDP Checksum validation ok 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSM_FRAG 0x10 //Fragment IP datagram 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSM_IPKT 0x04 //Received an IP packet 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSM_TCPKT 0x02 //Received a TCP packet 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CSM_UDPKT 0x01 //Received a UDP packet 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the TSR0 register 1091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1114a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_ABT cpu_to_le16(0x0080) // Tx abort because of excessive collision 1124a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_OWT cpu_to_le16(0x0040) // Jumbo frame Tx abort 1134a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_OWC cpu_to_le16(0x0020) // Out of window collision 1144a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_COLS cpu_to_le16(0x0010) // experience collision in this transmit event 1154a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_NCR3 cpu_to_le16(0x0008) // collision retry counter[3] 1164a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_NCR2 cpu_to_le16(0x0004) // collision retry counter[2] 1174a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_NCR1 cpu_to_le16(0x0002) // collision retry counter[1] 1184a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_NCR0 cpu_to_le16(0x0001) // collision retry counter[0] 1194a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_TERR cpu_to_le16(0x8000) // 1204a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_FDX cpu_to_le16(0x4000) // current transaction is serviced by full duplex mode 1214a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_GMII cpu_to_le16(0x2000) // current transaction is serviced by GMII mode 1224a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_LNKFL cpu_to_le16(0x1000) // packet serviced during link down 1234a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_SHDN cpu_to_le16(0x0400) // shutdown case 1244a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_CRS cpu_to_le16(0x0200) // carrier sense lost 1254a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro#define TSR0_CDH cpu_to_le16(0x0100) // AQE test fail (CD heartbeat) 1261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// 1281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// Bits in the TCR0 register 1291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// 1301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_TIC 0x80 // assert interrupt immediately while descriptor has been send complete 1311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_PIC 0x40 // priority interrupt request, INA# is issued over adaptive interrupt scheme 1321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_VETAG 0x20 // enable VLAN tag 1331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_IPCK 0x10 // request IP checksum calculation. 1341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_UDPCK 0x08 // request UDP checksum calculation. 1351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_TCPCK 0x04 // request TCP checksum calculation. 1361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_JMBO 0x02 // indicate a jumbo packet in GMAC side 1371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR0_CRC 0x01 // disable CRC generation 1381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCPLS_NORMAL 3 1401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCPLS_START 2 1411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCPLS_END 1 1421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCPLS_MED 0 1431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// max transmit or receive buffer size 1461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_RX_BUF_SIZE 2048UL // max buffer size 1471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds // NOTE: must be multiple of 4 1481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_MAX_RD_NUM 512 // MAX # of RD 1501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_MAX_TD_NUM 256 // MAX # of TD 1511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_INIT_RD_NUM_3119 128 // init # of RD, for setup VT3119 1531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_INIT_TD_NUM_3119 64 // init # of TD, for setup VT3119 1541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_INIT_RD_NUM 128 // init # of RD, for setup default 1561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_INIT_TD_NUM 64 // init # of TD, for setup default 1571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// for 3119 1591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_TD_RING_NUM 4 // # of TD rings. 1601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_MAX_SEG_PER_PKT 7 // max data seg per packet (Tx) 1611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * If collisions excess 15 times , tx will abort, and 1651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * if tx fifo underflow, tx will fail 1661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * we should try to resend it 1671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CB_MAX_TX_ABORT_RETRY 3 1701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Receive descriptor 1731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 1741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct rdesc0 { 1764a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 RSR; /* Receive status */ 1774a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 len; /* bits 0--13; bit 15 - owner */ 1781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct rdesc1 { 1814a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 PQTAG; 1821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 CSM; 1831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 IPKT; 1841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 1851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1864a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viroenum { 18709640e6365c679b5642b1c41b6d7078f51689ddfHarvey Harrison RX_INTEN = cpu_to_le16(0x8000) 1884a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro}; 1894a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro 1901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct rx_desc { 1911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct rdesc0 rdesc0; 1921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct rdesc1 rdesc1; 1934a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le32 pa_low; /* Low 32 bit PCI address */ 1944a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 pa_high; /* Next 16 bit PCI address (48 total) */ 1954a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 size; /* bits 0--14 - frame size, bit 15 - enable int. */ 196ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 1971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 1991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Transmit descriptor 2001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct tdesc0 { 2034a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 TSR; /* Transmit status register */ 2044a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 len; /* bits 0--13 - size of frame, bit 15 - owner */ 2051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct tdesc1 { 2084a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 vlan; 2091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 TCR; 2104a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro u8 cmd; /* bits 0--1 - TCPLS, bits 4--7 - CMDZ */ 211ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 2121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2134a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viroenum { 21409640e6365c679b5642b1c41b6d7078f51689ddfHarvey Harrison TD_QUEUE = cpu_to_le16(0x8000) 2154a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro}; 2164a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro 2171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct td_buf { 2184a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le32 pa_low; 2194a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 pa_high; 2204a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __le16 size; /* bits 0--13 - size, bit 15 - queue */ 221ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 2221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct tx_desc { 2241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct tdesc0 tdesc0; 2251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct tdesc1 tdesc1; 2261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct td_buf td_buf[7]; 2271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_rd_info { 2301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct sk_buff *skb; 2311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t skb_dma; 2321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Used to track transmit side buffers. 2361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_td_info { 2391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct sk_buff *skb; 2401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int nskb_dma; 2411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t skb_dma[7]; 2421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum velocity_owner { 2451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds OWNED_BY_HOST = 0, 24609640e6365c679b5642b1c41b6d7078f51689ddfHarvey Harrison OWNED_BY_NIC = cpu_to_le16(0x8000) 2471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 2481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MAC registers and macros. 2521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCAM_SIZE 64 2561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VCAM_SIZE 64 2571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_QUEUE_NO 4 2581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAX_HW_MIB_COUNTER 32 26083055d46e5eddbb3574ef5e9c0d9c021bcb75c0bJay Cliburn#define VELOCITY_MIN_MTU (64) 2611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_MAX_MTU (9000) 2621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 2641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Registers in the MAC 2651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 2661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 2671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PAR 0x00 // physical address 2681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RCR 0x06 2691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TCR 0x07 2701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR0_SET 0x08 2711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR1_SET 0x09 2721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR2_SET 0x0A 2731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR3_SET 0x0B 2741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR0_CLR 0x0C 2751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR1_CLR 0x0D 2761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR2_CLR 0x0E 2771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CR3_CLR 0x0F 2781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MAR 0x10 2791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CAM 0x10 2801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_DEC_BASE_HI 0x18 2811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_DBF_BASE_HI 0x1C 2821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR_CTL 0x20 2831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR_HOTMR 0x20 2841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR_TSUPTHR 0x20 2851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR_RSUPTHR 0x20 2861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR_CTL1 0x21 2871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TXE_SR 0x22 2881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RXE_SR 0x23 2891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR 0x24 2901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR0 0x24 2911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR1 0x25 2921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR2 0x26 2931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_ISR3 0x27 2941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_IMR 0x28 2951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_IMR0 0x28 2961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_IMR1 0x29 2971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_IMR2 0x2A 2981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_IMR3 0x2B 2991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDCSR_SET 0x30 3001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RDCSR_SET 0x32 3011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDCSR_CLR 0x34 3021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RDCSR_CLR 0x36 3031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RDBASE_LO 0x38 3041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RDINDX 0x3C 3051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDBASE_LO 0x40 3061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RDCSIZE 0x50 3071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDCSIZE 0x52 3081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDINDX 0x54 3091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDIDX0 0x54 3101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDIDX1 0x56 3111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDIDX2 0x58 3121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TDIDX3 0x5A 3131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PAUSE_TIMER 0x5C 3141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RBRDU 0x5E 3151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_FIFO_TEST0 0x60 3161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_FIFO_TEST1 0x64 3171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CAMADDR 0x68 3181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CAMCR 0x69 3191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_GFTEST 0x6A 3201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_FTSTCMD 0x6B 3211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIICFG 0x6C 3221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIISR 0x6D 3231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PHYSR0 0x6E 3241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PHYSR1 0x6F 3251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIICR 0x70 3261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIIADR 0x71 3271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIIDATA 0x72 3281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_SOFT_TIMER0 0x74 3291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_SOFT_TIMER1 0x76 3301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CFGA 0x78 3311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CFGB 0x79 3321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CFGC 0x7A 3331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CFGD 0x7B 3341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_DCFG0 0x7C 3351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_DCFG1 0x7D 3361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MCFG0 0x7E 3371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MCFG1 0x7F 3381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 3391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TBIST 0x80 3401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_RBIST 0x81 3411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PMCC 0x82 3421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_STICKHW 0x83 3431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIBCR 0x84 3441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EERSV 0x85 3451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_REVID 0x86 3461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_MIBREAD 0x88 3471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BPMA 0x8C 3481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EEWR_DATA 0x8C 3491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BPMD_WR 0x8F 3501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BPCMD 0x90 3511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BPMD_RD 0x91 3521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EECHKSUM 0x92 3531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EECSR 0x93 3541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EERD_DATA 0x94 3551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EADDR 0x96 3561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_EMBCMD 0x97 3571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_JMPSR0 0x98 3581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_JMPSR1 0x99 3591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_JMPSR2 0x9A 3601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_JMPSR3 0x9B 3611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_CHIPGSR 0x9C 3621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_TESTCFG 0x9D 3631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_DEBUG 0x9E 3642ffa007eaa01cf5fedd6a71f7d43854339a831eefrançois romieu#define MAC_REG_CHIPGCR 0x9F /* Chip Operation and Diagnostic Control */ 3651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCR0_SET 0xA0 3661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCR1_SET 0xA1 3671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PWCFG_SET 0xA2 3681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCFG_SET 0xA3 3691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCR0_CLR 0xA4 3701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCR1_CLR 0xA5 3711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PWCFG_CLR 0xA6 3721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLCFG_CLR 0xA7 3731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLSR0_SET 0xA8 3741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLSR1_SET 0xA9 3751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLSR0_CLR 0xAC 3761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_WOLSR1_CLR 0xAD 3771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC0 0xB0 3781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC1 0xB2 3791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC2 0xB4 3801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC3 0xB6 3811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC4 0xB8 3821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC5 0xBA 3831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC6 0xBC 3841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_PATRN_CRC7 0xBE 3851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK0_0 0xC0 3861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK0_1 0xC4 3871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK0_2 0xC8 3881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK0_3 0xCC 3891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK1_0 0xD0 3901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK1_1 0xD4 3911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK1_2 0xD8 3921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK1_3 0xDC 3931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK2_0 0xE0 3941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK2_1 0xE4 3951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK2_2 0xE8 3961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK2_3 0xEC 3971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK3_0 0xF0 3981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK3_1 0xF4 3991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK3_2 0xF8 4001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_REG_BYTEMSK3_3 0xFC 4011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the RCR register 4041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AS 0x80 4071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AP 0x40 4081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AL 0x20 4091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_PROM 0x10 4101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AB 0x08 4111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AM 0x04 4121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_AR 0x02 4131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RCR_SEP 0x01 4141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the TCR register 4171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_TB2BDIS 0x80 4201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_COLTMC1 0x08 4211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_COLTMC0 0x04 4221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_LB1 0x02 /* loopback[1] */ 4231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCR_LB0 0x01 /* loopback[0] */ 4241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CR0 register 4271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_TXON 0x00000008UL 4301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_RXON 0x00000004UL 4311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_STOP 0x00000002UL /* stop MAC, default = 1 */ 4321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_STRT 0x00000001UL /* start MAC */ 4331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_SFRST 0x00008000UL /* software reset */ 4341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_TM1EN 0x00004000UL 4351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_TM0EN 0x00002000UL 4361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_DPOLL 0x00000800UL /* disable rx/tx auto polling */ 4371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_DISAU 0x00000100UL 4381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_XONEN 0x00800000UL 4391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_FDXTFCEN 0x00400000UL /* full-duplex TX flow control enable */ 4401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_FDXRFCEN 0x00200000UL /* full-duplex RX flow control enable */ 4411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_HDXFCEN 0x00100000UL /* half-duplex flow control enable */ 4421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_XHITH1 0x00080000UL /* TX XON high threshold 1 */ 4431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_XHITH0 0x00040000UL /* TX XON high threshold 0 */ 4441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_XLTH1 0x00020000UL /* TX pause frame low threshold 1 */ 4451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_XLTH0 0x00010000UL /* TX pause frame low threshold 0 */ 4461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_GSPRST 0x80000000UL 4471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_FORSRST 0x40000000UL 4481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_FPHYRST 0x20000000UL 4491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_DIAG 0x10000000UL 4501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_INTPCTL 0x04000000UL 4511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_GINTMSK1 0x02000000UL 4521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR0_GINTMSK0 0x01000000UL 4531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CR1 register 4561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR1_SFRST 0x80 /* software reset */ 4591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR1_TM1EN 0x40 4601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR1_TM0EN 0x20 4611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR1_DPOLL 0x08 /* disable rx/tx auto polling */ 4621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR1_DISAU 0x01 4631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CR2 register 4661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_XONEN 0x80 4691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_FDXTFCEN 0x40 /* full-duplex TX flow control enable */ 4701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_FDXRFCEN 0x20 /* full-duplex RX flow control enable */ 4711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_HDXFCEN 0x10 /* half-duplex flow control enable */ 4721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_XHITH1 0x08 /* TX XON high threshold 1 */ 4731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_XHITH0 0x04 /* TX XON high threshold 0 */ 4741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_XLTH1 0x02 /* TX pause frame low threshold 1 */ 4751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR2_XLTH0 0x01 /* TX pause frame low threshold 0 */ 4761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CR3 register 4791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 4801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_GSPRST 0x80 4821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_FORSRST 0x40 4831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_FPHYRST 0x20 4841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_DIAG 0x10 4851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_INTPCTL 0x04 4861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_GINTMSK1 0x02 4871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CR3_GINTMSK0 0x01 4881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_UDPINT 0x8000 4901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_TSUPDIS 0x4000 4911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_RSUPDIS 0x2000 4921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_PMSK1 0x1000 4931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_PMSK0 0x0800 4941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_INTPD 0x0400 4951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_HCRLD 0x0200 4961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL_SCRLD 0x0100 4971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 4981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 4991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the ISR_CTL1 register 5001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_UDPINT 0x80 5031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_TSUPDIS 0x40 5041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_RSUPDIS 0x20 5051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_PMSK1 0x10 5061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_PMSK0 0x08 5071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_INTPD 0x04 5081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_HCRLD 0x02 5091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISRCTL1_SCRLD 0x01 5101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the TXE_SR register 5131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TXESR_TFDBS 0x08 5161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TXESR_TDWBS 0x04 5171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TXESR_TDRBS 0x02 5181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TXESR_TDSTR 0x01 5191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the RXE_SR register 5221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RXESR_RFDBS 0x08 5251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RXESR_RDWBS 0x04 5261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RXESR_RDRBS 0x02 5271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RXESR_RDSTR 0x01 5281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the ISR register 5311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_ISR3 0x80000000UL 5341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_ISR2 0x40000000UL 5351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_ISR1 0x20000000UL 5361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_ISR0 0x10000000UL 5371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TXSTLI 0x02000000UL 5381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_RXSTLI 0x01000000UL 5391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_HFLD 0x00800000UL 5401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_UDPI 0x00400000UL 5411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_MIBFI 0x00200000UL 5421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_SHDNI 0x00100000UL 5431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PHYI 0x00080000UL 5441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PWEI 0x00040000UL 5451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TMR1I 0x00020000UL 5461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TMR0I 0x00010000UL 5471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_SRCI 0x00008000UL 5481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_LSTPEI 0x00004000UL 5491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_LSTEI 0x00002000UL 5501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_OVFI 0x00001000UL 5511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_FLONI 0x00000800UL 5521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_RACEI 0x00000400UL 5531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TXWB1I 0x00000200UL 5541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_TXWB0I 0x00000100UL 5551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PTX3I 0x00000080UL 5561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PTX2I 0x00000040UL 5571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PTX1I 0x00000020UL 5581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PTX0I 0x00000010UL 5591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PTXI 0x00000008UL 5601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PRXI 0x00000004UL 5611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PPTXI 0x00000002UL 5621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ISR_PPRXI 0x00000001UL 5631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 5651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the IMR register 5661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 5671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_TXSTLM 0x02000000UL 5691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_UDPIM 0x00400000UL 5701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MIBFIM 0x00200000UL 5711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_SHDNIM 0x00100000UL 5721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PHYIM 0x00080000UL 5731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PWEIM 0x00040000UL 5741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_TMR1IM 0x00020000UL 5751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_TMR0IM 0x00010000UL 5761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_SRCIM 0x00008000UL 5781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_LSTPEIM 0x00004000UL 5791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_LSTEIM 0x00002000UL 5801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_OVFIM 0x00001000UL 5811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_FLONIM 0x00000800UL 5821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_RACEIM 0x00000400UL 5831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_TXWB1IM 0x00000200UL 5841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_TXWB0IM 0x00000100UL 5851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PTX3IM 0x00000080UL 5871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PTX2IM 0x00000040UL 5881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PTX1IM 0x00000020UL 5891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PTX0IM 0x00000010UL 5901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PTXIM 0x00000008UL 5911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PRXIM 0x00000004UL 5921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PPTXIM 0x00000002UL 5931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_PPRXIM 0x00000001UL 5941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 0x0013FB0FUL = initial value of IMR */ 5961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 5971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define INT_MASK_DEF (IMR_PPTXIM|IMR_PPRXIM|IMR_PTXIM|IMR_PRXIM|\ 5981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds IMR_PWEIM|IMR_TXWB0IM|IMR_TXWB1IM|IMR_FLONIM|\ 5991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds IMR_OVFIM|IMR_LSTEIM|IMR_LSTPEIM|IMR_SRCIM|IMR_MIBFIM|\ 6001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds IMR_SHDNIM|IMR_TMR1IM|IMR_TMR0IM|IMR_TXSTLM) 6011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the TDCSR0/1, RDCSR0 register 6041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TRDCSR_DEAD 0x0008 6071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TRDCSR_WAK 0x0004 6081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TRDCSR_ACT 0x0002 6091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TRDCSR_RUN 0x0001 6101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CAMADDR register 6131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMADDR_CAMEN 0x80 6161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMADDR_VCAMSL 0x40 6171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CAMCR register 6201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_PS1 0x80 6231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_PS0 0x40 6241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_AITRPKT 0x20 6251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_AITR16 0x10 6261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_CAMRD 0x08 6271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_CAMWR 0x04 6281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_PS_CAM_MASK 0x40 6291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_PS_CAM_DATA 0x80 6301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CAMCR_PS_MAR 0x00 6311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MIICFG register 6341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICFG_MPO1 0x80 6371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICFG_MPO0 0x40 6381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICFG_MFDC 0x20 6391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MIISR register 6421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIISR_MIDLE 0x80 6451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the PHYSR0 register 6481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_PHYRST 0x80 6511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_LINKGD 0x40 6521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_FDPX 0x10 6531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_SPDG 0x08 6541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_SPD10 0x04 6551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_RXFLC 0x02 6561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR0_TXFLC 0x01 6571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the PHYSR1 register 6601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYSR1_PHYTBI 0x01 6631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MIICR register 6661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MAUTO 0x80 6691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_RCMD 0x40 6701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_WCMD 0x20 6711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MDPM 0x10 6721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MOUT 0x08 6731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MDO 0x04 6741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MDI 0x02 6751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIICR_MDC 0x01 6761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MIIADR register 6791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIIADR_SWMPL 0x80 6821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CFGA register 6851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGA_PMHCTG 0x08 6881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGA_GPIO1PD 0x04 6891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGA_ABSHDN 0x02 6901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGA_PACPI 0x01 6911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 6931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CFGB register 6941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 6951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 6961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_GTCKOPT 0x80 6971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_MIIOPT 0x40 6981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_CRSEOPT 0x20 6991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_OFSET 0x10 7001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_CRANDOM 0x08 7011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_CAP 0x04 7021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_MBA 0x02 7031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGB_BAKOPT 0x01 7041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CFGC register 7071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_EELOAD 0x80 7101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_BROPT 0x40 7111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_DLYEN 0x20 7121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_DTSEL 0x10 7131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_BTSEL 0x08 7141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_BPS2 0x04 /* bootrom select[2] */ 7151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_BPS1 0x02 /* bootrom select[1] */ 7161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGC_BPS0 0x01 /* bootrom select[0] */ 7171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the CFGD register 7201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGD_IODIS 0x80 7231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGD_MSLVDACEN 0x40 7241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGD_CFGDACEN 0x20 7251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGD_PCI64EN 0x10 7261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CFGD_HTMRL4 0x08 7271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the DCFG1 register 7301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_XMWI 0x8000 7331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_XMRM 0x4000 7341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_XMRL 0x2000 7351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_PERDIS 0x1000 7361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_MRWAIT 0x0400 7371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_MWWAIT 0x0200 7381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define DCFG_LATMEN 0x0100 7391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MCFG0 register 7421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_RXARB 0x0080 7451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_RFT1 0x0020 7461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_RFT0 0x0010 7471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_LOWTHOPT 0x0008 7481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_PQEN 0x0004 7491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_RTGOPT 0x0002 7501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_VIDFR 0x0001 7511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MCFG1 register 7541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_TXARB 0x8000 7571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_TXQBK1 0x0800 7581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_TXQBK0 0x0400 7591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_TXQNOBK 0x0200 7601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MCFG_SNAPOPT 0x0100 7611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the PMCC register 7641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_DSI 0x80 7671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D2_DIS 0x40 7681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D1_DIS 0x20 7691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D3C_EN 0x10 7701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D3H_EN 0x08 7711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D2_EN 0x04 7721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D1_EN 0x02 7731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PMCC_D0_EN 0x01 7741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in STICKHW 7771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STICKHW_SWPTAG 0x10 7801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STICKHW_WOLSR 0x08 7811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STICKHW_WOLEN 0x04 7821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STICKHW_DS1 0x02 /* R/W by software/cfg cycle */ 7831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define STICKHW_DS0 0x01 /* suspend well DS write port */ 7841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the MIBCR register 7871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 7881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBISTOK 0x80 7901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBISTGO 0x40 7911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBINC 0x20 7921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBHI 0x10 7931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBFRZ 0x08 7941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBFLSH 0x04 7951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MPTRINI 0x02 7961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MIBCR_MIBCLR 0x01 7971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 7981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 7991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the EERSV register 8001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_RPL ((u8) 0x01) /* Boot method selection for VT6110 */ 8031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_MASK ((u8) 0x06) 8051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_INT19 ((u8) 0x00) 8061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_INT18 ((u8) 0x02) 8071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_LOCAL ((u8) 0x04) 8081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EERSV_BOOT_BEV ((u8) 0x06) 8091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in BPCMD 8131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BPCMD_BPDNE 0x80 8161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BPCMD_EBPWR 0x02 8171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define BPCMD_EBPRD 0x01 8181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the EECSR register 8211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8235a6338db37885af06760d40cad589316e48431e9Dave Jones#define EECSR_EMBP 0x40 /* eeprom embedded programming */ 8241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_RELOAD 0x20 /* eeprom content reload */ 8251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_DPM 0x10 /* eeprom direct programming */ 8261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_ECS 0x08 /* eeprom CS pin */ 8271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_ECK 0x04 /* eeprom CK pin */ 8281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_EDI 0x02 /* eeprom DI pin */ 8291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EECSR_EDO 0x01 /* eeprom DO pin */ 8301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in the EMBCMD register 8331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMBCMD_EDONE 0x80 8361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMBCMD_EWDIS 0x08 8371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMBCMD_EWEN 0x04 8381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMBCMD_EWR 0x02 8391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define EMBCMD_ERD 0x01 8401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in TESTCFG register 8431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TESTCFG_HBDIS 0x80 8461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in CHIPGCR register 8491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8512ffa007eaa01cf5fedd6a71f7d43854339a831eefrançois romieu#define CHIPGCR_FCGMII 0x80 /* force GMII (else MII only) */ 8522ffa007eaa01cf5fedd6a71f7d43854339a831eefrançois romieu#define CHIPGCR_FCFDX 0x40 /* force full duplex */ 8531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CHIPGCR_FCRESV 0x20 8542ffa007eaa01cf5fedd6a71f7d43854339a831eefrançois romieu#define CHIPGCR_FCMODE 0x10 /* enable MAC forced mode */ 8551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CHIPGCR_LPSOPT 0x08 8561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CHIPGCR_TM1US 0x04 8571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CHIPGCR_TM0US 0x02 8581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CHIPGCR_PHYINTEN 0x01 8591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in WOLCR0 8621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN7 0x0080 /* enable pattern match filtering */ 8651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN6 0x0040 8661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN5 0x0020 8671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN4 0x0010 8681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN3 0x0008 8691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN2 0x0004 8701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN1 0x0002 8711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MSWOLEN0 0x0001 8721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_ARP_EN 0x0001 8731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in WOLCR1 8761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_LINKOFF_EN 0x0800 /* link off detected enable */ 8791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_LINKON_EN 0x0400 /* link on detected enable */ 8801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_MAGIC_EN 0x0200 /* magic packet filter enable */ 8811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCR_UNICAST_EN 0x0100 /* unicast filter enable */ 8821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in PWCFG 8861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 8871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_PHYPWOPT 0x80 /* internal MII I/F timing */ 8891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_PCISTICK 0x40 /* PCI sticky R/W enable */ 8901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_WOLTYPE 0x20 /* pulse(1) or button (0) */ 8911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_LEGCY_WOL 0x10 8921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_PMCSR_PME_SR 0x08 8931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_PMCSR_PME_EN 0x04 /* control by PCISTICK */ 8941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_LEGACY_WOLSR 0x02 /* Legacy WOL_SR shadow */ 8951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PWCFG_LEGACY_WOLEN 0x01 /* Legacy WOL_EN shadow */ 8961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 8971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 8981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in WOLCFG 8991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_PMEOVR 0x80 /* for legacy use, force PMEEN always */ 9021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_SAM 0x20 /* accept multicast case reset, default=0 */ 9031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_SAB 0x10 /* accept broadcast case reset, default=0 */ 9041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_SMIIACC 0x08 /* ?? */ 9051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_SGENWH 0x02 9061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLCFG_PHYINTEN 0x01 /* 0:PHYINT trigger enable, 1:use internal MII 9071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds to report status change */ 9081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Bits in WOLSR1 9101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLSR_LINKOFF_INT 0x0800 9131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLSR_LINKON_INT 0x0400 9141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLSR_MAGIC_INT 0x0200 9151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define WOLSR_UNICAST_INT 0x0100 9161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Ethernet address filter type 9191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_NONE 0x0000 /* Turn off receiver */ 9221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_DIRECTED 0x0001 /* obselete, directed address is always accepted */ 9231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_MULTICAST 0x0002 9241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_ALL_MULTICAST 0x0004 9251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_BROADCAST 0x0008 9261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_PROMISCUOUS 0x0020 9271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_LONG 0x2000 /* NOTE.... the definition of LONG is >2048 bytes in our chip */ 9281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_RUNT 0x4000 9291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PKT_TYPE_ERROR 0x8000 /* Accept error packets, e.g. CRC error */ 9301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Loopback mode 9331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_LB_NONE 0x00 9361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_LB_INTERNAL 0x01 9371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MAC_LB_EXTERNAL 0x02 9381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Enabled mask value of irq 9411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(_SIM) 9441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MASK_VALUE 0x0033FF0FUL /* initial value of IMR 9451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds set IMR0 to 0x0F according to spec */ 9461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 9481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IMR_MASK_VALUE 0x0013FB0FUL /* initial value of IMR 9491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ignore MIBFI,RACEI to 9501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds reduce intr. frequency 9511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds NOTE.... do not enable NoBuf int mask at driver driver 9521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds when (1) NoBuf -> RxThreshold = SF 9531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (2) OK -> RxThreshold = original value 9541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 9561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Revision id 9591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define REV_ID_VT3119_A0 0x00 9621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define REV_ID_VT3119_A1 0x01 9631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define REV_ID_VT3216_A0 0x10 9641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Max time out delay time 9671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define W_MAX_TIMEOUT 0x0FFFU 9701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 9731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * MAC registers as a structure. Cannot be directly accessed this 9741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * way but generates offsets for readl/writel() calls 9751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 9761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct mac_regs { 9781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PAR[6]; /* 0x00 */ 9791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 RCR; 9801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 TCR; 9811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9824a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 CR0Set; /* 0x08 */ 9834a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 CR0Clr; /* 0x0C */ 9841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MARCAM[8]; /* 0x10 */ 9861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9874a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 DecBaseHi; /* 0x18 */ 9884a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 DbfBaseHi; /* 0x1C */ 9894a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 reserved_1E; 9901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9914a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 ISRCTL; /* 0x20 */ 9921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 TXESR; 9931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 RXESR; 9941da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9954a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 ISR; /* 0x24 */ 9964a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 IMR; 9971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 9984a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 TDStatusPort; /* 0x2C */ 9991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10004a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 TDCSRSet; /* 0x30 */ 10011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 RDCSRSet; 10021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 reserved_33; 10034a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 TDCSRClr; 10041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 RDCSRClr; 10051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 reserved_37; 10061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10074a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 RDBaseLo; /* 0x38 */ 10084a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 RDIdx; /* 0x3C */ 10096dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom volatile u8 TQETMR; /* 0x3E, VT3216 and above only */ 10106dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom volatile u8 RQETMR; /* 0x3F, VT3216 and above only */ 10111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10124a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 TDBaseLo[4]; /* 0x40 */ 10131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10144a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 RDCSize; /* 0x50 */ 10154a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 TDCSize; /* 0x52 */ 10164a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 TDIdx[4]; /* 0x54 */ 10174a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 tx_pause_timer; /* 0x5C */ 10184a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 RBRDU; /* 0x5E */ 10191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10204a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 FIFOTest0; /* 0x60 */ 10214a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 FIFOTest1; /* 0x64 */ 10221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CAMADDR; /* 0x68 */ 10241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CAMCR; /* 0x69 */ 10251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 GFTEST; /* 0x6A */ 10261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 FTSTCMD; /* 0x6B */ 10271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MIICFG; /* 0x6C */ 10291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MIISR; 10301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PHYSR0; 10311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PHYSR1; 10321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MIICR; 10331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MIIADR; 10344a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 MIIDATA; 10351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10364a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 SoftTimer0; /* 0x74 */ 10374a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 SoftTimer1; 10381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CFGA; /* 0x78 */ 10401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CFGB; 10411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CFGC; 10421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CFGD; 10431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10444a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 DCFG; /* 0x7C */ 10454a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 MCFG; 10461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 TBIST; /* 0x80 */ 10481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 RBIST; 10491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PMCPORT; 10501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 STICKHW; 10511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 MIBCR; /* 0x84 */ 10531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 reserved_85; 10541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 rev_id; 10551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PORSTS; 10561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10574a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 MIBData; /* 0x88 */ 10581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10594a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 EEWrData; 10601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 reserved_8E; 10621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 BPMDWr; 10631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 BPCMD; 10641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 BPMDRd; 10651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 EECHKSUM; /* 0x92 */ 10671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 EECSR; 10681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10694a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 EERdData; /* 0x94 */ 10701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 EADDR; 10711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 EMBCMD; 10721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 JMPSR0; /* 0x98 */ 10751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 JMPSR1; 10761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 JMPSR2; 10771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 JMPSR3; 10781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CHIPGSR; /* 0x9C */ 10791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 TESTCFG; 10801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 DEBUG; 10811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 CHIPGCR; 10821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10834a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 WOLCRSet; /* 0xA0 */ 10841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PWCFGSet; 10851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 WOLCFGSet; 10861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10874a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 WOLCRClr; /* 0xA4 */ 10881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 PWCFGCLR; 10891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds volatile u8 WOLCFGClr; 10901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10914a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 WOLSRSet; /* 0xA8 */ 10924a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 reserved_AA; 10931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10944a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 WOLSRClr; /* 0xAC */ 10954a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 reserved_AE; 10961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10974a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le16 PatternCRC[8]; /* 0xB0 */ 10984a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro volatile __le32 ByteMask[4][4]; /* 0xC0 */ 1099d10358de8d70aaeb965a974d56e9b72f6c6dbb3aUlrich Hecht}; 11001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum hw_mib { 11031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxAllPkts = 0, 11041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxOkPkts, 11051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTxOkPkts, 11061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxErrorPkts, 11071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxRuntOkPkt, 11081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxRuntErrPkt, 11091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx64Pkts, 11101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx64Pkts, 11111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx65To127Pkts, 11121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx65To127Pkts, 11131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx128To255Pkts, 11141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx128To255Pkts, 11151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx256To511Pkts, 11161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx256To511Pkts, 11171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx512To1023Pkts, 11181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx512To1023Pkts, 11191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRx1024To1518Pkts, 11201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTx1024To1518Pkts, 11211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTxEtherCollisions, 11221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxPktCRCE, 11231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxJumboPkts, 11241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTxJumboPkts, 11251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxMacControlFrames, 11261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTxMacControlFrames, 11271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxPktFAE, 11281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxLongOkPkt, 11291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxLongPktErrPkt, 11301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifTXSQEErrors, 11311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxNobuf, 11321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifRxSymbolErrors, 11331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifInRangeLengthErrors, 11341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_ifLateCollisions, 11351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds HW_MIB_SIZE 11361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 11371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum chip_type { 11391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds CHIP_TYPE_VT6110 = 1, 11401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 11411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_info_tbl { 11431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds enum chip_type chip_id; 114401faccbf866195831af202de59f37e29467a3d74Stephen Hemminger const char *name; 11451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int txqueue; 11461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flags; 11471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 11481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_hw_mibs_init(regs) {\ 11501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_ON(MIBCR_MIBFRZ,&((regs)->MIBCR));\ 11511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_ON(MIBCR_MIBCLR,&((regs)->MIBCR));\ 11521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds do {}\ 11531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (BYTE_REG_BITS_IS_ON(MIBCR_MIBCLR,&((regs)->MIBCR)));\ 11541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_OFF(MIBCR_MIBFRZ,&((regs)->MIBCR));\ 11551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_read_isr(regs) readl(&((regs)->ISR)) 11581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_write_isr(regs, x) writel((x),&((regs)->ISR)) 11591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_clear_isr(regs) writel(0xffffffffL,&((regs)->ISR)) 11601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR)); 11621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_disable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Clr)) 11631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_enable_int(regs) writel(CR0_GINTMSK1,&((regs)->CR0Set)) 11641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_set_dma_length(regs, n) {\ 11661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\ 11671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_set_rx_thresh(regs, n) {\ 11701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_SET((n),(MCFG_RFT0|MCFG_RFT1),&((regs)->MCFG));\ 11711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_rx_queue_run(regs) {\ 11741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writeb(TRDCSR_RUN, &((regs)->RDCSRSet));\ 11751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_rx_queue_wake(regs) {\ 11781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writeb(TRDCSR_WAK, &((regs)->RDCSRSet));\ 11791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_tx_queue_run(regs, n) {\ 11821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writew(TRDCSR_RUN<<((n)*4),&((regs)->TDCSRSet));\ 11831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 11851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define mac_tx_queue_wake(regs, n) {\ 11861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writew(TRDCSR_WAK<<(n*4),&((regs)->TDCSRSet));\ 11871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 118901faccbf866195831af202de59f37e29467a3d74Stephen Hemmingerstatic inline void mac_eeprom_reload(struct mac_regs __iomem * regs) { 119001faccbf866195831af202de59f37e29467a3d74Stephen Hemminger int i=0; 11911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 119201faccbf866195831af202de59f37e29467a3d74Stephen Hemminger BYTE_REG_BITS_ON(EECSR_RELOAD,&(regs->EECSR)); 119301faccbf866195831af202de59f37e29467a3d74Stephen Hemminger do { 119401faccbf866195831af202de59f37e29467a3d74Stephen Hemminger udelay(10); 119501faccbf866195831af202de59f37e29467a3d74Stephen Hemminger if (i++>0x1000) 119601faccbf866195831af202de59f37e29467a3d74Stephen Hemminger break; 119701faccbf866195831af202de59f37e29467a3d74Stephen Hemminger } while (BYTE_REG_BITS_IS_ON(EECSR_RELOAD,&(regs->EECSR))); 11981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 11991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Header for WOL definitions. Used to compute hashes 12021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldstypedef u8 MCAM_ADDR[ETH_ALEN]; 12051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct arp_packet { 12071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 dest_mac[ETH_ALEN]; 12081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 src_mac[ETH_ALEN]; 12094a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __be16 type; 12104a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __be16 ar_hrd; 12114a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __be16 ar_pro; 12121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_hln; 12131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_pln; 12144a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __be16 ar_op; 12151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_sha[ETH_ALEN]; 12161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_sip[4]; 12171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_tha[ETH_ALEN]; 12181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ar_tip[4]; 1219ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 12201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct _magic_packet { 12221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 dest_mac[6]; 12231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 src_mac[6]; 12244a51c0d02c18ea2fea7611bcaf028e69201580d4Al Viro __be16 type; 12251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 MAC[16][6]; 12261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 password[6]; 1227ba2d3587912f82d1ab4367975b1df460db60fb1eEric Dumazet} __packed; 12281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Store for chip context when saving and restoring status. Not 12311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * all fields are saved/restored currently. 12321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_context { 12351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 mac_reg[256]; 12361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MCAM_ADDR cam_addr[MCAM_SIZE]; 12371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 vcam[VCAM_SIZE]; 12381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 cammask[2]; 12391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 patcrc[2]; 12401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 pattern[8]; 12411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 12421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Registers in the MII (offset unit is WORD) 12451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 12461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// Marvell 88E1000/88E1000S 12481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MII_REG_PSCR 0x10 // PHY specific control register 12491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// 12513a7f8681ffb27bcc540fb74cda15e39c9395737bFrancois Romieu// Bits in the Silicon revision register 12521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// 12531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TCSR_ECHODIS 0x2000 // 12551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define AUXCR_MDPPS 0x0004 // 12561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// Bits in the PLED register 12581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PLED_LALBE 0x0004 // 12591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds// Marvell 88E1000/88E1000S Bits in the PHY specific control register (10h) 12611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PSCR_ACRSTX 0x0800 // Assert CRS on Transmit 12621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_CICADA_CS8201 0x000FC410UL 12641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_VT3216_32BIT 0x000FC610UL 12651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_VT3216_64BIT 0x000FC600UL 12661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_MARVELL_1000 0x01410C50UL 12671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_MARVELL_1000S 0x01410C40UL 12681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_REV_ID_MASK 0x0000000FUL 12701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define PHYID_GET_PHY_ID(i) ((i) & ~PHYID_REV_ID_MASK) 12721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MII_REG_BITS_ON(x,i,p) do {\ 12741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 w;\ 12751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds velocity_mii_read((p),(i),&(w));\ 12761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (w)|=(x);\ 12771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds velocity_mii_write((p),(i),(w));\ 12781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 12791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MII_REG_BITS_OFF(x,i,p) do {\ 12811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 w;\ 12821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds velocity_mii_read((p),(i),&(w));\ 12831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (w)&=(~(x));\ 12841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds velocity_mii_write((p),(i),(w));\ 12851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} while (0) 12861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MII_REG_BITS_IS_ON(x,i,p) ({\ 12881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 w;\ 12891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds velocity_mii_read((p),(i),&(w));\ 12901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ((int) ((w) & (x)));}) 12911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define MII_GET_PHY_ID(p) ({\ 12931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 id;\ 12943a7f8681ffb27bcc540fb74cda15e39c9395737bFrancois Romieu velocity_mii_read((p),MII_PHYSID2,(u16 *) &id);\ 12953a7f8681ffb27bcc540fb74cda15e39c9395737bFrancois Romieu velocity_mii_read((p),MII_PHYSID1,((u16 *) &id)+1);\ 12961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds (id);}) 12971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 12981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 12991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Inline debug routine 13001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum velocity_msg_level { 13041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MSG_LEVEL_ERR = 0, //Errors that will cause abnormal operation. 13051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MSG_LEVEL_NOTICE = 1, //Some errors need users to be notified. 13061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MSG_LEVEL_INFO = 2, //Normal message. 13071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MSG_LEVEL_VERBOSE = 3, //Will report all trival errors. 13081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds MSG_LEVEL_DEBUG = 4 //Only for debug purpose. 13091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 13101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifdef VELOCITY_DEBUG 13121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ASSERT(x) { \ 13131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (!(x)) { \ 13141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk(KERN_ERR "assertion %s failed: file %s line %d\n", #x,\ 1315b39d66a81fb4f5ab555f86a2e49f3714f8369a3dHarvey Harrison __func__, __LINE__);\ 13161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BUG(); \ 13171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }\ 13181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_DBG(p,args...) printk(p, ##args) 13201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#else 13211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define ASSERT(x) 13221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_DBG(x) 13231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 13241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_PRT(l, p, args...) do {if (l<=msglevel) printk( p ,##args);} while (0) 13261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_PRT_CAMMASK(p,t) {\ 13281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i;\ 13291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if ((t)==VELOCITY_MULTICAST_CAM) {\ 13301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i=0;i<(MCAM_SIZE/8);i++)\ 13311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("%02X",(p)->mCAMmask[i]);\ 13321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }\ 13331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds else {\ 13341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i=0;i<(VCAM_SIZE/8);i++)\ 13351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("%02X",(p)->vCAMmask[i]);\ 13361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds }\ 13371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds printk("\n");\ 13381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 13391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_MAGIC 0x00000000UL 13431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_PHY 0x00000001UL 13441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_ARP 0x00000002UL 13451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_UCAST 0x00000004UL 13461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_BCAST 0x00000010UL 13471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_MCAST 0x00000020UL 13481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_WOL_MAGIC_SEC 0x00000040UL 13491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Flags for options 13521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_TAGGING 0x00000001UL 13551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_RX_CSUM 0x00000004UL 13561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_IP_ALIGN 0x00000008UL 13571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_VAL_PKT_LEN 0x00000010UL 13581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_FLOW_CTRL 0x01000000UL 13601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Flags for driver status 13631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_OPENED 0x00010000UL 13661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_VMNS_CONNECTED 0x00020000UL 13671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_VMNS_COMMITTED 0x00040000UL 13681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FLAGS_WOL_ENABLED 0x00080000UL 13691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Flags for MII status 13721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_LINK_FAIL 0x00000001UL 13751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_SPEED_10 0x00000002UL 13761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_SPEED_100 0x00000004UL 13771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_SPEED_1000 0x00000008UL 13781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_DUPLEX_FULL 0x00000010UL 13791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_AUTONEG_ENABLE 0x00000020UL 13801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_FORCED_BY_EEPROM 0x00000040UL 13811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 13831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * For velocity_set_media_duplex 13841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 13851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define VELOCITY_LINK_CHANGE 0x00000001UL 13871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum speed_opt { 13891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SPD_DPX_AUTO = 0, 13901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SPD_DPX_100_HALF = 1, 13911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SPD_DPX_100_FULL = 2, 13921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds SPD_DPX_10_HALF = 3, 139315419227f773b6c1b5fae44bde876078a9204caafrançois romieu SPD_DPX_10_FULL = 4, 139415419227f773b6c1b5fae44bde876078a9204caafrançois romieu SPD_DPX_1000_FULL = 5 13951da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 13961da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 13971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum velocity_init_type { 13981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds VELOCITY_INIT_COLD = 0, 13991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds VELOCITY_INIT_RESET, 14001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds VELOCITY_INIT_WOL 14011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 14021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsenum velocity_flow_cntl_type { 14041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds FLOW_CNTL_DEFAULT = 1, 14051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds FLOW_CNTL_TX, 14061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds FLOW_CNTL_RX, 14071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds FLOW_CNTL_TX_RX, 14081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds FLOW_CNTL_DISABLE, 14091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 14101da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_opt { 14121da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int numrx; /* Number of RX descriptors */ 14131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int numtx; /* Number of TX descriptors */ 14141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds enum speed_opt spd_dpx; /* Media link mode */ 1415501e4d247a7e35a4d3aa8e6973794b1586f6cb30Stephen Hemminger 14161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int DMA_length; /* DMA length */ 14171da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_thresh; /* RX_THRESH */ 14181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int flow_cntl; 14191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int wol_opts; /* Wake on lan options */ 14201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int td_int_count; 14211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int int_works; 14221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_bandwidth_hi; 14231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_bandwidth_lo; 14241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int rx_bandwidth_en; 14256dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom int rxqueue_timer; 14266dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom int txqueue_timer; 14276dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom int tx_intsup; 14286dfc4b95b29d89dbdb45de04b1b1ff493ec8016dSimon Kagstrom int rx_intsup; 14291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flags; 14301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 14311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14320fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu#define AVAIL_TD(p,q) ((p)->options.numtx-((p)->tx.used[(q)])) 14330fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu 14340fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu#define GET_RD_BY_IDX(vptr, idx) (vptr->rd_ring[idx]) 14350fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu 14361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct velocity_info { 14371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct pci_dev *pdev; 14381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct net_device *dev; 14391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 144073b54688815f76bdccb8b94b5d1fd2dd0af3ea70Jiri Pirko unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 14411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 ip_addr[4]; 14421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds enum chip_type chip_id; 14431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mac_regs __iomem * mac_regs; 14451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long memaddr; 14461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned long ioaddr; 14471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14480fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct tx_info { 14490fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int numq; 14500fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu 14510fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu /* FIXME: the locality of the data seems rather poor. */ 14520fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int used[TX_QUEUE_NO]; 14530fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int curr[TX_QUEUE_NO]; 14540fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int tail[TX_QUEUE_NO]; 14550fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct tx_desc *rings[TX_QUEUE_NO]; 14560fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct velocity_td_info *infos[TX_QUEUE_NO]; 14570fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu dma_addr_t pool_dma[TX_QUEUE_NO]; 14580fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu } tx; 14590fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu 14600fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct rx_info { 14610fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int buf_sz; 14620fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu 14630fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int dirty; 14640fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu int curr; 14650fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu u32 filled; 14660fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct rx_desc *ring; 14670fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu struct velocity_rd_info *info; /* It's an array */ 14680fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu dma_addr_t pool_dma; 14690fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu } rx; 14701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 mib_counter[MAX_HW_MIB_COUNTER]; 14721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct velocity_opt options; 14731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 int_mask; 14751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flags; 14771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 mii_status; 14791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 phy_id; 14801da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int multicast_limit; 14811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14821da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 vCAMmask[(VCAM_SIZE / 8)]; 14831da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 mCAMmask[(MCAM_SIZE / 8)]; 14841da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14851da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds spinlock_t lock; 14861da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14871da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int wol_opts; 14881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 wol_passwd[6]; 14891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct velocity_context context; 14911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 ticks; 14931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14940fe9f15ee8bd652242a778ddfd30aa6d97a98e23Francois Romieu u8 rev_id; 1495dfff7144b14bab3d8baaeba8926fab371fa4a01eSimon Kagstrom 1496dfff7144b14bab3d8baaeba8926fab371fa4a01eSimon Kagstrom struct napi_struct napi; 14971da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 14981da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 14991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/** 15001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * velocity_get_ip - find an IP address for the device 15011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @vptr: Velocity to query 15021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Dig out an IP address for this interface so that we can 15041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * configure wakeup with WOL for ARP. If there are multiple IP 15051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * addresses on this chain then we use the first - multi-IP WOL is not 15061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * supported. 15071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 15091da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151077933d7276ee8fa0e2947641941a6f7a100a327bJesper Juhlstatic inline int velocity_get_ip(struct velocity_info *vptr) 15111da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 151295ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet struct in_device *in_dev; 15131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct in_ifaddr *ifa; 151495ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet int res = -ENOENT; 15151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 151695ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet rcu_read_lock(); 151795ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet in_dev = __in_dev_get_rcu(vptr->dev); 15181da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (in_dev != NULL) { 15191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds ifa = (struct in_ifaddr *) in_dev->ifa_list; 15201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds if (ifa != NULL) { 15211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds memcpy(vptr->ip_addr, &ifa->ifa_address, 4); 152295ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet res = 0; 15231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 152595ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet rcu_read_unlock(); 152695ae6b228f814fc0528d0506ee9f18ac333d6851Eric Dumazet return res; 15271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15291da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/** 15301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * velocity_update_hw_mibs - fetch MIB counters from chip 15311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @vptr: velocity to update 15321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * The velocity hardware keeps certain counters in the hardware 15341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * side. We need to read these when the user asks for statistics 15351da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * or when they overflow (causing an interrupt). The read of the 15361da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * statistic clears it, so we keep running master counters in user 15371da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * space. 15381da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 15391da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15401da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void velocity_update_hw_mibs(struct velocity_info *vptr) 15411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15421da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 tmp; 15431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds int i; 15441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_ON(MIBCR_MIBFLSH, &(vptr->mac_regs->MIBCR)); 15451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds while (BYTE_REG_BITS_IS_ON(MIBCR_MIBFLSH, &(vptr->mac_regs->MIBCR))); 15471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds BYTE_REG_BITS_ON(MIBCR_MPTRINI, &(vptr->mac_regs->MIBCR)); 15491da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds for (i = 0; i < HW_MIB_SIZE; i++) { 15501da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds tmp = readl(&(vptr->mac_regs->MIBData)) & 0x00FFFFFFUL; 15511da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds vptr->mib_counter[i] += tmp; 15521da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds } 15531da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15541da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15551da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/** 15561da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * init_flow_control_register - set up flow control 15571da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * @vptr: velocity to configure 15581da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 15591da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Configure the flow control registers for this velocity device. 15601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 15611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15621da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstatic inline void init_flow_control_register(struct velocity_info *vptr) 15631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds{ 15641da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct mac_regs __iomem * regs = vptr->mac_regs; 15651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15661da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Set {XHITH1, XHITH0, XLTH1, XLTH0} in FlowCR1 to {1, 0, 1, 1} 15671da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds depend on RD=64, and Turn on XNOEN in FlowCR1 */ 15681da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((CR0_XONEN | CR0_XHITH1 | CR0_XLTH1 | CR0_XLTH0), ®s->CR0Set); 15691da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writel((CR0_FDXTFCEN | CR0_FDXRFCEN | CR0_HDXFCEN | CR0_XHITH0), ®s->CR0Clr); 15701da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15711da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Set TxPauseTimer to 0xFFFF */ 15721da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writew(0xFFFF, ®s->tx_pause_timer); 15731da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds /* Initialize RBRDU to Rx buffer count. */ 15751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds writew(vptr->options.numrx, ®s->RBRDU); 15761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds} 15771da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 15791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 1580