smsc75xx.c revision afc4b13df143122f99a0eb10bfefb216c2806de0
1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2010 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21#include <linux/module.h> 22#include <linux/kmod.h> 23#include <linux/init.h> 24#include <linux/netdevice.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/mii.h> 28#include <linux/usb.h> 29#include <linux/crc32.h> 30#include <linux/usb/usbnet.h> 31#include <linux/slab.h> 32#include "smsc75xx.h" 33 34#define SMSC_CHIPNAME "smsc75xx" 35#define SMSC_DRIVER_VERSION "1.0.0" 36#define HS_USB_PKT_SIZE (512) 37#define FS_USB_PKT_SIZE (64) 38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 40#define DEFAULT_BULK_IN_DELAY (0x00002000) 41#define MAX_SINGLE_PACKET_SIZE (9000) 42#define LAN75XX_EEPROM_MAGIC (0x7500) 43#define EEPROM_MAC_OFFSET (0x01) 44#define DEFAULT_TX_CSUM_ENABLE (true) 45#define DEFAULT_RX_CSUM_ENABLE (true) 46#define DEFAULT_TSO_ENABLE (true) 47#define SMSC75XX_INTERNAL_PHY_ID (1) 48#define SMSC75XX_TX_OVERHEAD (8) 49#define MAX_RX_FIFO_SIZE (20 * 1024) 50#define MAX_TX_FIFO_SIZE (12 * 1024) 51#define USB_VENDOR_ID_SMSC (0x0424) 52#define USB_PRODUCT_ID_LAN7500 (0x7500) 53#define USB_PRODUCT_ID_LAN7505 (0x7505) 54 55#define check_warn(ret, fmt, args...) \ 56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); }) 57 58#define check_warn_return(ret, fmt, args...) \ 59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } }) 60 61#define check_warn_goto_done(ret, fmt, args...) \ 62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } }) 63 64struct smsc75xx_priv { 65 struct usbnet *dev; 66 u32 rfe_ctl; 67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; 68 struct mutex dataport_mutex; 69 spinlock_t rfe_ctl_lock; 70 struct work_struct set_multicast; 71}; 72 73struct usb_context { 74 struct usb_ctrlrequest req; 75 struct usbnet *dev; 76}; 77 78static int turbo_mode = true; 79module_param(turbo_mode, bool, 0644); 80MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 81 82static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, 83 u32 *data) 84{ 85 u32 *buf = kmalloc(4, GFP_KERNEL); 86 int ret; 87 88 BUG_ON(!dev); 89 90 if (!buf) 91 return -ENOMEM; 92 93 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 94 USB_VENDOR_REQUEST_READ_REGISTER, 95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 96 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 97 98 if (unlikely(ret < 0)) 99 netdev_warn(dev->net, 100 "Failed to read register index 0x%08x", index); 101 102 le32_to_cpus(buf); 103 *data = *buf; 104 kfree(buf); 105 106 return ret; 107} 108 109static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, 110 u32 data) 111{ 112 u32 *buf = kmalloc(4, GFP_KERNEL); 113 int ret; 114 115 BUG_ON(!dev); 116 117 if (!buf) 118 return -ENOMEM; 119 120 *buf = data; 121 cpu_to_le32s(buf); 122 123 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 124 USB_VENDOR_REQUEST_WRITE_REGISTER, 125 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 126 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 127 128 if (unlikely(ret < 0)) 129 netdev_warn(dev->net, 130 "Failed to write register index 0x%08x", index); 131 132 kfree(buf); 133 134 return ret; 135} 136 137/* Loop until the read is completed with timeout 138 * called with phy_mutex held */ 139static int smsc75xx_phy_wait_not_busy(struct usbnet *dev) 140{ 141 unsigned long start_time = jiffies; 142 u32 val; 143 int ret; 144 145 do { 146 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val); 147 check_warn_return(ret, "Error reading MII_ACCESS"); 148 149 if (!(val & MII_ACCESS_BUSY)) 150 return 0; 151 } while (!time_after(jiffies, start_time + HZ)); 152 153 return -EIO; 154} 155 156static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 157{ 158 struct usbnet *dev = netdev_priv(netdev); 159 u32 val, addr; 160 int ret; 161 162 mutex_lock(&dev->phy_mutex); 163 164 /* confirm MII not busy */ 165 ret = smsc75xx_phy_wait_not_busy(dev); 166 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read"); 167 168 /* set the address, index & direction (read from PHY) */ 169 phy_id &= dev->mii.phy_id_mask; 170 idx &= dev->mii.reg_num_mask; 171 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 172 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 173 | MII_ACCESS_READ; 174 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 175 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 176 177 ret = smsc75xx_phy_wait_not_busy(dev); 178 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx); 179 180 ret = smsc75xx_read_reg(dev, MII_DATA, &val); 181 check_warn_goto_done(ret, "Error reading MII_DATA"); 182 183 ret = (u16)(val & 0xFFFF); 184 185done: 186 mutex_unlock(&dev->phy_mutex); 187 return ret; 188} 189 190static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 191 int regval) 192{ 193 struct usbnet *dev = netdev_priv(netdev); 194 u32 val, addr; 195 int ret; 196 197 mutex_lock(&dev->phy_mutex); 198 199 /* confirm MII not busy */ 200 ret = smsc75xx_phy_wait_not_busy(dev); 201 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write"); 202 203 val = regval; 204 ret = smsc75xx_write_reg(dev, MII_DATA, val); 205 check_warn_goto_done(ret, "Error writing MII_DATA"); 206 207 /* set the address, index & direction (write to PHY) */ 208 phy_id &= dev->mii.phy_id_mask; 209 idx &= dev->mii.reg_num_mask; 210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 212 | MII_ACCESS_WRITE; 213 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr); 214 check_warn_goto_done(ret, "Error writing MII_ACCESS"); 215 216 ret = smsc75xx_phy_wait_not_busy(dev); 217 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx); 218 219done: 220 mutex_unlock(&dev->phy_mutex); 221} 222 223static int smsc75xx_wait_eeprom(struct usbnet *dev) 224{ 225 unsigned long start_time = jiffies; 226 u32 val; 227 int ret; 228 229 do { 230 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 231 check_warn_return(ret, "Error reading E2P_CMD"); 232 233 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) 234 break; 235 udelay(40); 236 } while (!time_after(jiffies, start_time + HZ)); 237 238 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { 239 netdev_warn(dev->net, "EEPROM read operation timeout"); 240 return -EIO; 241 } 242 243 return 0; 244} 245 246static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) 247{ 248 unsigned long start_time = jiffies; 249 u32 val; 250 int ret; 251 252 do { 253 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 254 check_warn_return(ret, "Error reading E2P_CMD"); 255 256 if (!(val & E2P_CMD_BUSY)) 257 return 0; 258 259 udelay(40); 260 } while (!time_after(jiffies, start_time + HZ)); 261 262 netdev_warn(dev->net, "EEPROM is busy"); 263 return -EIO; 264} 265 266static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 267 u8 *data) 268{ 269 u32 val; 270 int i, ret; 271 272 BUG_ON(!dev); 273 BUG_ON(!data); 274 275 ret = smsc75xx_eeprom_confirm_not_busy(dev); 276 if (ret) 277 return ret; 278 279 for (i = 0; i < length; i++) { 280 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); 281 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 282 check_warn_return(ret, "Error writing E2P_CMD"); 283 284 ret = smsc75xx_wait_eeprom(dev); 285 if (ret < 0) 286 return ret; 287 288 ret = smsc75xx_read_reg(dev, E2P_DATA, &val); 289 check_warn_return(ret, "Error reading E2P_DATA"); 290 291 data[i] = val & 0xFF; 292 offset++; 293 } 294 295 return 0; 296} 297 298static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 299 u8 *data) 300{ 301 u32 val; 302 int i, ret; 303 304 BUG_ON(!dev); 305 BUG_ON(!data); 306 307 ret = smsc75xx_eeprom_confirm_not_busy(dev); 308 if (ret) 309 return ret; 310 311 /* Issue write/erase enable command */ 312 val = E2P_CMD_BUSY | E2P_CMD_EWEN; 313 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 314 check_warn_return(ret, "Error writing E2P_CMD"); 315 316 ret = smsc75xx_wait_eeprom(dev); 317 if (ret < 0) 318 return ret; 319 320 for (i = 0; i < length; i++) { 321 322 /* Fill data register */ 323 val = data[i]; 324 ret = smsc75xx_write_reg(dev, E2P_DATA, val); 325 check_warn_return(ret, "Error writing E2P_DATA"); 326 327 /* Send "write" command */ 328 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); 329 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 330 check_warn_return(ret, "Error writing E2P_CMD"); 331 332 ret = smsc75xx_wait_eeprom(dev); 333 if (ret < 0) 334 return ret; 335 336 offset++; 337 } 338 339 return 0; 340} 341 342static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) 343{ 344 int i, ret; 345 346 for (i = 0; i < 100; i++) { 347 u32 dp_sel; 348 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 349 check_warn_return(ret, "Error reading DP_SEL"); 350 351 if (dp_sel & DP_SEL_DPRDY) 352 return 0; 353 354 udelay(40); 355 } 356 357 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out"); 358 359 return -EIO; 360} 361 362static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, 363 u32 length, u32 *buf) 364{ 365 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 366 u32 dp_sel; 367 int i, ret; 368 369 mutex_lock(&pdata->dataport_mutex); 370 371 ret = smsc75xx_dataport_wait_not_busy(dev); 372 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry"); 373 374 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 375 check_warn_goto_done(ret, "Error reading DP_SEL"); 376 377 dp_sel &= ~DP_SEL_RSEL; 378 dp_sel |= ram_select; 379 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); 380 check_warn_goto_done(ret, "Error writing DP_SEL"); 381 382 for (i = 0; i < length; i++) { 383 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); 384 check_warn_goto_done(ret, "Error writing DP_ADDR"); 385 386 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); 387 check_warn_goto_done(ret, "Error writing DP_DATA"); 388 389 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); 390 check_warn_goto_done(ret, "Error writing DP_CMD"); 391 392 ret = smsc75xx_dataport_wait_not_busy(dev); 393 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout"); 394 } 395 396done: 397 mutex_unlock(&pdata->dataport_mutex); 398 return ret; 399} 400 401/* returns hash bit number for given MAC address */ 402static u32 smsc75xx_hash(char addr[ETH_ALEN]) 403{ 404 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 405} 406 407static void smsc75xx_deferred_multicast_write(struct work_struct *param) 408{ 409 struct smsc75xx_priv *pdata = 410 container_of(param, struct smsc75xx_priv, set_multicast); 411 struct usbnet *dev = pdata->dev; 412 int ret; 413 414 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x", 415 pdata->rfe_ctl); 416 417 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, 418 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); 419 420 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 421 check_warn(ret, "Error writing RFE_CRL"); 422} 423 424static void smsc75xx_set_multicast(struct net_device *netdev) 425{ 426 struct usbnet *dev = netdev_priv(netdev); 427 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 428 unsigned long flags; 429 int i; 430 431 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 432 433 pdata->rfe_ctl &= 434 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); 435 pdata->rfe_ctl |= RFE_CTL_AB; 436 437 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 438 pdata->multicast_hash_table[i] = 0; 439 440 if (dev->net->flags & IFF_PROMISC) { 441 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 442 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; 443 } else if (dev->net->flags & IFF_ALLMULTI) { 444 netif_dbg(dev, drv, dev->net, "receive all multicast enabled"); 445 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; 446 } else if (!netdev_mc_empty(dev->net)) { 447 struct netdev_hw_addr *ha; 448 449 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 450 451 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; 452 453 netdev_for_each_mc_addr(ha, netdev) { 454 u32 bitnum = smsc75xx_hash(ha->addr); 455 pdata->multicast_hash_table[bitnum / 32] |= 456 (1 << (bitnum % 32)); 457 } 458 } else { 459 netif_dbg(dev, drv, dev->net, "receive own packets only"); 460 pdata->rfe_ctl |= RFE_CTL_DPF; 461 } 462 463 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 464 465 /* defer register writes to a sleepable context */ 466 schedule_work(&pdata->set_multicast); 467} 468 469static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, 470 u16 lcladv, u16 rmtadv) 471{ 472 u32 flow = 0, fct_flow = 0; 473 int ret; 474 475 if (duplex == DUPLEX_FULL) { 476 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 477 478 if (cap & FLOW_CTRL_TX) { 479 flow = (FLOW_TX_FCEN | 0xFFFF); 480 /* set fct_flow thresholds to 20% and 80% */ 481 fct_flow = (8 << 8) | 32; 482 } 483 484 if (cap & FLOW_CTRL_RX) 485 flow |= FLOW_RX_FCEN; 486 487 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", 488 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 489 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 490 } else { 491 netif_dbg(dev, link, dev->net, "half duplex"); 492 } 493 494 ret = smsc75xx_write_reg(dev, FLOW, flow); 495 check_warn_return(ret, "Error writing FLOW"); 496 497 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); 498 check_warn_return(ret, "Error writing FCT_FLOW"); 499 500 return 0; 501} 502 503static int smsc75xx_link_reset(struct usbnet *dev) 504{ 505 struct mii_if_info *mii = &dev->mii; 506 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 507 u16 lcladv, rmtadv; 508 int ret; 509 510 /* clear interrupt status */ 511 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 512 check_warn_return(ret, "Error reading PHY_INT_SRC"); 513 514 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 515 check_warn_return(ret, "Error writing INT_STS"); 516 517 mii_check_media(mii, 1, 1); 518 mii_ethtool_gset(&dev->mii, &ecmd); 519 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 520 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 521 522 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x" 523 " rmtadv: %04x", ethtool_cmd_speed(&ecmd), 524 ecmd.duplex, lcladv, rmtadv); 525 526 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 527} 528 529static void smsc75xx_status(struct usbnet *dev, struct urb *urb) 530{ 531 u32 intdata; 532 533 if (urb->actual_length != 4) { 534 netdev_warn(dev->net, 535 "unexpected urb length %d", urb->actual_length); 536 return; 537 } 538 539 memcpy(&intdata, urb->transfer_buffer, 4); 540 le32_to_cpus(&intdata); 541 542 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata); 543 544 if (intdata & INT_ENP_PHY_INT) 545 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 546 else 547 netdev_warn(dev->net, 548 "unexpected interrupt, intdata=0x%08X", intdata); 549} 550 551static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) 552{ 553 return MAX_EEPROM_SIZE; 554} 555 556static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, 557 struct ethtool_eeprom *ee, u8 *data) 558{ 559 struct usbnet *dev = netdev_priv(netdev); 560 561 ee->magic = LAN75XX_EEPROM_MAGIC; 562 563 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); 564} 565 566static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, 567 struct ethtool_eeprom *ee, u8 *data) 568{ 569 struct usbnet *dev = netdev_priv(netdev); 570 571 if (ee->magic != LAN75XX_EEPROM_MAGIC) { 572 netdev_warn(dev->net, 573 "EEPROM: magic value mismatch: 0x%x", ee->magic); 574 return -EINVAL; 575 } 576 577 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); 578} 579 580static const struct ethtool_ops smsc75xx_ethtool_ops = { 581 .get_link = usbnet_get_link, 582 .nway_reset = usbnet_nway_reset, 583 .get_drvinfo = usbnet_get_drvinfo, 584 .get_msglevel = usbnet_get_msglevel, 585 .set_msglevel = usbnet_set_msglevel, 586 .get_settings = usbnet_get_settings, 587 .set_settings = usbnet_set_settings, 588 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, 589 .get_eeprom = smsc75xx_ethtool_get_eeprom, 590 .set_eeprom = smsc75xx_ethtool_set_eeprom, 591}; 592 593static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 594{ 595 struct usbnet *dev = netdev_priv(netdev); 596 597 if (!netif_running(netdev)) 598 return -EINVAL; 599 600 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 601} 602 603static void smsc75xx_init_mac_address(struct usbnet *dev) 604{ 605 /* try reading mac address from EEPROM */ 606 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 607 dev->net->dev_addr) == 0) { 608 if (is_valid_ether_addr(dev->net->dev_addr)) { 609 /* eeprom values are valid so use them */ 610 netif_dbg(dev, ifup, dev->net, 611 "MAC address read from EEPROM"); 612 return; 613 } 614 } 615 616 /* no eeprom, or eeprom values are invalid. generate random MAC */ 617 random_ether_addr(dev->net->dev_addr); 618 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr"); 619} 620 621static int smsc75xx_set_mac_address(struct usbnet *dev) 622{ 623 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 624 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 625 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 626 627 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); 628 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret); 629 630 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); 631 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret); 632 633 addr_hi |= ADDR_FILTX_FB_VALID; 634 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); 635 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret); 636 637 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); 638 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret); 639 640 return 0; 641} 642 643static int smsc75xx_phy_initialize(struct usbnet *dev) 644{ 645 int bmcr, timeout = 0; 646 647 /* Initialize MII structure */ 648 dev->mii.dev = dev->net; 649 dev->mii.mdio_read = smsc75xx_mdio_read; 650 dev->mii.mdio_write = smsc75xx_mdio_write; 651 dev->mii.phy_id_mask = 0x1f; 652 dev->mii.reg_num_mask = 0x1f; 653 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; 654 655 /* reset phy and wait for reset to complete */ 656 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 657 658 do { 659 msleep(10); 660 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 661 check_warn_return(bmcr, "Error reading MII_BMCR"); 662 timeout++; 663 } while ((bmcr & MII_BMCR) && (timeout < 100)); 664 665 if (timeout >= 100) { 666 netdev_warn(dev->net, "timeout on PHY Reset"); 667 return -EIO; 668 } 669 670 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 671 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 672 ADVERTISE_PAUSE_ASYM); 673 674 /* read to clear */ 675 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 676 check_warn_return(bmcr, "Error reading PHY_INT_SRC"); 677 678 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 679 PHY_INT_MASK_DEFAULT); 680 mii_nway_restart(&dev->mii); 681 682 netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); 683 return 0; 684} 685 686static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) 687{ 688 int ret = 0; 689 u32 buf; 690 bool rxenabled; 691 692 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 693 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 694 695 rxenabled = ((buf & MAC_RX_RXEN) != 0); 696 697 if (rxenabled) { 698 buf &= ~MAC_RX_RXEN; 699 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 700 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 701 } 702 703 /* add 4 to size for FCS */ 704 buf &= ~MAC_RX_MAX_SIZE; 705 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); 706 707 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 708 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 709 710 if (rxenabled) { 711 buf |= MAC_RX_RXEN; 712 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 714 } 715 716 return 0; 717} 718 719static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) 720{ 721 struct usbnet *dev = netdev_priv(netdev); 722 723 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu); 724 check_warn_return(ret, "Failed to set mac rx frame length"); 725 726 return usbnet_change_mtu(netdev, new_mtu); 727} 728 729/* Enable or disable Rx checksum offload engine */ 730static int smsc75xx_set_features(struct net_device *netdev, u32 features) 731{ 732 struct usbnet *dev = netdev_priv(netdev); 733 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 734 unsigned long flags; 735 int ret; 736 737 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 738 739 if (features & NETIF_F_RXCSUM) 740 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; 741 else 742 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); 743 744 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 745 /* it's racing here! */ 746 747 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 748 check_warn_return(ret, "Error writing RFE_CTL"); 749 750 return 0; 751} 752 753static int smsc75xx_reset(struct usbnet *dev) 754{ 755 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 756 u32 buf; 757 int ret = 0, timeout; 758 759 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset"); 760 761 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 762 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 763 764 buf |= HW_CFG_LRST; 765 766 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 767 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 768 769 timeout = 0; 770 do { 771 msleep(10); 772 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 773 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 774 timeout++; 775 } while ((buf & HW_CFG_LRST) && (timeout < 100)); 776 777 if (timeout >= 100) { 778 netdev_warn(dev->net, "timeout on completion of Lite Reset"); 779 return -EIO; 780 } 781 782 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY"); 783 784 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 785 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 786 787 buf |= PMT_CTL_PHY_RST; 788 789 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); 790 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret); 791 792 timeout = 0; 793 do { 794 msleep(10); 795 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 796 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret); 797 timeout++; 798 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); 799 800 if (timeout >= 100) { 801 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 802 return -EIO; 803 } 804 805 netif_dbg(dev, ifup, dev->net, "PHY reset complete"); 806 807 smsc75xx_init_mac_address(dev); 808 809 ret = smsc75xx_set_mac_address(dev); 810 check_warn_return(ret, "Failed to set mac address"); 811 812 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr); 813 814 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 815 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 816 817 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf); 818 819 buf |= HW_CFG_BIR; 820 821 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 822 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 823 824 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 825 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 826 827 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after " 828 "writing HW_CFG_BIR: 0x%08x", buf); 829 830 if (!turbo_mode) { 831 buf = 0; 832 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 833 } else if (dev->udev->speed == USB_SPEED_HIGH) { 834 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 835 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 836 } else { 837 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 838 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 839 } 840 841 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld", 842 (ulong)dev->rx_urb_size); 843 844 ret = smsc75xx_write_reg(dev, BURST_CAP, buf); 845 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret); 846 847 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); 848 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret); 849 850 netif_dbg(dev, ifup, dev->net, 851 "Read Value from BURST_CAP after writing: 0x%08x", buf); 852 853 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 854 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret); 855 856 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); 857 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret); 858 859 netif_dbg(dev, ifup, dev->net, 860 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf); 861 862 if (turbo_mode) { 863 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 864 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 865 866 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 867 868 buf |= (HW_CFG_MEF | HW_CFG_BCE); 869 870 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 871 check_warn_return(ret, "Failed to write HW_CFG: %d", ret); 872 873 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 874 check_warn_return(ret, "Failed to read HW_CFG: %d", ret); 875 876 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf); 877 } 878 879 /* set FIFO sizes */ 880 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 881 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); 882 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret); 883 884 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf); 885 886 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 887 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); 888 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret); 889 890 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf); 891 892 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 893 check_warn_return(ret, "Failed to write INT_STS: %d", ret); 894 895 ret = smsc75xx_read_reg(dev, ID_REV, &buf); 896 check_warn_return(ret, "Failed to read ID_REV: %d", ret); 897 898 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf); 899 900 /* Configure GPIO pins as LED outputs */ 901 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); 902 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret); 903 904 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); 905 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; 906 907 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); 908 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret); 909 910 ret = smsc75xx_write_reg(dev, FLOW, 0); 911 check_warn_return(ret, "Failed to write FLOW: %d", ret); 912 913 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); 914 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret); 915 916 /* Don't need rfe_ctl_lock during initialisation */ 917 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 918 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 919 920 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; 921 922 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 923 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret); 924 925 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 926 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret); 927 928 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl); 929 930 /* Enable or disable checksum offload engines */ 931 smsc75xx_set_features(dev->net, dev->net->features); 932 933 smsc75xx_set_multicast(dev->net); 934 935 ret = smsc75xx_phy_initialize(dev); 936 check_warn_return(ret, "Failed to initialize PHY: %d", ret); 937 938 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); 939 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret); 940 941 /* enable PHY interrupts */ 942 buf |= INT_ENP_PHY_INT; 943 944 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); 945 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret); 946 947 ret = smsc75xx_read_reg(dev, MAC_TX, &buf); 948 check_warn_return(ret, "Failed to read MAC_TX: %d", ret); 949 950 buf |= MAC_TX_TXEN; 951 952 ret = smsc75xx_write_reg(dev, MAC_TX, buf); 953 check_warn_return(ret, "Failed to write MAC_TX: %d", ret); 954 955 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf); 956 957 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); 958 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret); 959 960 buf |= FCT_TX_CTL_EN; 961 962 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); 963 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret); 964 965 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf); 966 967 ret = smsc75xx_set_rx_max_frame_length(dev, 1514); 968 check_warn_return(ret, "Failed to set max rx frame length"); 969 970 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 971 check_warn_return(ret, "Failed to read MAC_RX: %d", ret); 972 973 buf |= MAC_RX_RXEN; 974 975 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 976 check_warn_return(ret, "Failed to write MAC_RX: %d", ret); 977 978 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf); 979 980 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); 981 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret); 982 983 buf |= FCT_RX_CTL_EN; 984 985 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); 986 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret); 987 988 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf); 989 990 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0"); 991 return 0; 992} 993 994static const struct net_device_ops smsc75xx_netdev_ops = { 995 .ndo_open = usbnet_open, 996 .ndo_stop = usbnet_stop, 997 .ndo_start_xmit = usbnet_start_xmit, 998 .ndo_tx_timeout = usbnet_tx_timeout, 999 .ndo_change_mtu = smsc75xx_change_mtu, 1000 .ndo_set_mac_address = eth_mac_addr, 1001 .ndo_validate_addr = eth_validate_addr, 1002 .ndo_do_ioctl = smsc75xx_ioctl, 1003 .ndo_set_rx_mode = smsc75xx_set_multicast, 1004 .ndo_set_features = smsc75xx_set_features, 1005}; 1006 1007static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) 1008{ 1009 struct smsc75xx_priv *pdata = NULL; 1010 int ret; 1011 1012 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1013 1014 ret = usbnet_get_endpoints(dev, intf); 1015 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret); 1016 1017 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), 1018 GFP_KERNEL); 1019 1020 pdata = (struct smsc75xx_priv *)(dev->data[0]); 1021 if (!pdata) { 1022 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv"); 1023 return -ENOMEM; 1024 } 1025 1026 pdata->dev = dev; 1027 1028 spin_lock_init(&pdata->rfe_ctl_lock); 1029 mutex_init(&pdata->dataport_mutex); 1030 1031 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); 1032 1033 if (DEFAULT_TX_CSUM_ENABLE) { 1034 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 1035 if (DEFAULT_TSO_ENABLE) 1036 dev->net->features |= NETIF_F_SG | 1037 NETIF_F_TSO | NETIF_F_TSO6; 1038 } 1039 if (DEFAULT_RX_CSUM_ENABLE) 1040 dev->net->features |= NETIF_F_RXCSUM; 1041 1042 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1043 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM; 1044 1045 /* Init all registers */ 1046 ret = smsc75xx_reset(dev); 1047 1048 dev->net->netdev_ops = &smsc75xx_netdev_ops; 1049 dev->net->ethtool_ops = &smsc75xx_ethtool_ops; 1050 dev->net->flags |= IFF_MULTICAST; 1051 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; 1052 return 0; 1053} 1054 1055static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1056{ 1057 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1058 if (pdata) { 1059 netif_dbg(dev, ifdown, dev->net, "free pdata"); 1060 kfree(pdata); 1061 pdata = NULL; 1062 dev->data[0] = 0; 1063 } 1064} 1065 1066static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb, 1067 u32 rx_cmd_a, u32 rx_cmd_b) 1068{ 1069 if (!(dev->net->features & NETIF_F_RXCSUM) || 1070 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { 1071 skb->ip_summed = CHECKSUM_NONE; 1072 } else { 1073 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); 1074 skb->ip_summed = CHECKSUM_COMPLETE; 1075 } 1076} 1077 1078static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1079{ 1080 while (skb->len > 0) { 1081 u32 rx_cmd_a, rx_cmd_b, align_count, size; 1082 struct sk_buff *ax_skb; 1083 unsigned char *packet; 1084 1085 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); 1086 le32_to_cpus(&rx_cmd_a); 1087 skb_pull(skb, 4); 1088 1089 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); 1090 le32_to_cpus(&rx_cmd_b); 1091 skb_pull(skb, 4 + NET_IP_ALIGN); 1092 1093 packet = skb->data; 1094 1095 /* get the packet length */ 1096 size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN; 1097 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1098 1099 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { 1100 netif_dbg(dev, rx_err, dev->net, 1101 "Error rx_cmd_a=0x%08x", rx_cmd_a); 1102 dev->net->stats.rx_errors++; 1103 dev->net->stats.rx_dropped++; 1104 1105 if (rx_cmd_a & RX_CMD_A_FCS) 1106 dev->net->stats.rx_crc_errors++; 1107 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) 1108 dev->net->stats.rx_frame_errors++; 1109 } else { 1110 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1111 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1112 netif_dbg(dev, rx_err, dev->net, 1113 "size err rx_cmd_a=0x%08x", rx_cmd_a); 1114 return 0; 1115 } 1116 1117 /* last frame in this batch */ 1118 if (skb->len == size) { 1119 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, 1120 rx_cmd_b); 1121 1122 skb_trim(skb, skb->len - 4); /* remove fcs */ 1123 skb->truesize = size + sizeof(struct sk_buff); 1124 1125 return 1; 1126 } 1127 1128 ax_skb = skb_clone(skb, GFP_ATOMIC); 1129 if (unlikely(!ax_skb)) { 1130 netdev_warn(dev->net, "Error allocating skb"); 1131 return 0; 1132 } 1133 1134 ax_skb->len = size; 1135 ax_skb->data = packet; 1136 skb_set_tail_pointer(ax_skb, size); 1137 1138 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, 1139 rx_cmd_b); 1140 1141 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1142 ax_skb->truesize = size + sizeof(struct sk_buff); 1143 1144 usbnet_skb_return(dev, ax_skb); 1145 } 1146 1147 skb_pull(skb, size); 1148 1149 /* padding bytes before the next frame starts */ 1150 if (skb->len) 1151 skb_pull(skb, align_count); 1152 } 1153 1154 if (unlikely(skb->len < 0)) { 1155 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len); 1156 return 0; 1157 } 1158 1159 return 1; 1160} 1161 1162static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, 1163 struct sk_buff *skb, gfp_t flags) 1164{ 1165 u32 tx_cmd_a, tx_cmd_b; 1166 1167 skb_linearize(skb); 1168 1169 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) { 1170 struct sk_buff *skb2 = 1171 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags); 1172 dev_kfree_skb_any(skb); 1173 skb = skb2; 1174 if (!skb) 1175 return NULL; 1176 } 1177 1178 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; 1179 1180 if (skb->ip_summed == CHECKSUM_PARTIAL) 1181 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; 1182 1183 if (skb_is_gso(skb)) { 1184 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); 1185 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; 1186 1187 tx_cmd_a |= TX_CMD_A_LSO; 1188 } else { 1189 tx_cmd_b = 0; 1190 } 1191 1192 skb_push(skb, 4); 1193 cpu_to_le32s(&tx_cmd_b); 1194 memcpy(skb->data, &tx_cmd_b, 4); 1195 1196 skb_push(skb, 4); 1197 cpu_to_le32s(&tx_cmd_a); 1198 memcpy(skb->data, &tx_cmd_a, 4); 1199 1200 return skb; 1201} 1202 1203static const struct driver_info smsc75xx_info = { 1204 .description = "smsc75xx USB 2.0 Gigabit Ethernet", 1205 .bind = smsc75xx_bind, 1206 .unbind = smsc75xx_unbind, 1207 .link_reset = smsc75xx_link_reset, 1208 .reset = smsc75xx_reset, 1209 .rx_fixup = smsc75xx_rx_fixup, 1210 .tx_fixup = smsc75xx_tx_fixup, 1211 .status = smsc75xx_status, 1212 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1213}; 1214 1215static const struct usb_device_id products[] = { 1216 { 1217 /* SMSC7500 USB Gigabit Ethernet Device */ 1218 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), 1219 .driver_info = (unsigned long) &smsc75xx_info, 1220 }, 1221 { 1222 /* SMSC7500 USB Gigabit Ethernet Device */ 1223 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), 1224 .driver_info = (unsigned long) &smsc75xx_info, 1225 }, 1226 { }, /* END */ 1227}; 1228MODULE_DEVICE_TABLE(usb, products); 1229 1230static struct usb_driver smsc75xx_driver = { 1231 .name = SMSC_CHIPNAME, 1232 .id_table = products, 1233 .probe = usbnet_probe, 1234 .suspend = usbnet_suspend, 1235 .resume = usbnet_resume, 1236 .disconnect = usbnet_disconnect, 1237}; 1238 1239static int __init smsc75xx_init(void) 1240{ 1241 return usb_register(&smsc75xx_driver); 1242} 1243module_init(smsc75xx_init); 1244 1245static void __exit smsc75xx_exit(void) 1246{ 1247 usb_deregister(&smsc75xx_driver); 1248} 1249module_exit(smsc75xx_exit); 1250 1251MODULE_AUTHOR("Nancy Lin"); 1252MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1253MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); 1254MODULE_LICENSE("GPL"); 1255