vmxnet3_drv.c revision f9f2502626133e33599578a16ed54435733f062c
1/* 2 * Linux driver for VMware's vmxnet3 ethernet NIC. 3 * 4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; version 2 of the License and no later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more 14 * details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * The full GNU General Public License is included in this distribution in 21 * the file called "COPYING". 22 * 23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24 * 25 */ 26 27#include <net/ip6_checksum.h> 28 29#include "vmxnet3_int.h" 30 31char vmxnet3_driver_name[] = "vmxnet3"; 32#define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 33 34/* 35 * PCI Device ID Table 36 * Last entry must be all 0s 37 */ 38static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = { 39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 40 {0} 41}; 42 43MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 44 45static atomic_t devices_found; 46 47#define VMXNET3_MAX_DEVICES 10 48static int enable_mq = 1; 49static int irq_share_mode; 50 51static void 52vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac); 53 54/* 55 * Enable/Disable the given intr 56 */ 57static void 58vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 59{ 60 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 61} 62 63 64static void 65vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 66{ 67 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 68} 69 70 71/* 72 * Enable/Disable all intrs used by the device 73 */ 74static void 75vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 76{ 77 int i; 78 79 for (i = 0; i < adapter->intr.num_intrs; i++) 80 vmxnet3_enable_intr(adapter, i); 81 adapter->shared->devRead.intrConf.intrCtrl &= 82 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL); 83} 84 85 86static void 87vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 88{ 89 int i; 90 91 adapter->shared->devRead.intrConf.intrCtrl |= 92 cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 93 for (i = 0; i < adapter->intr.num_intrs; i++) 94 vmxnet3_disable_intr(adapter, i); 95} 96 97 98static void 99vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 100{ 101 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 102} 103 104 105static bool 106vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 107{ 108 return tq->stopped; 109} 110 111 112static void 113vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 114{ 115 tq->stopped = false; 116 netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue); 117} 118 119 120static void 121vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 122{ 123 tq->stopped = false; 124 netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 125} 126 127 128static void 129vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 130{ 131 tq->stopped = true; 132 tq->num_stop++; 133 netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue)); 134} 135 136 137/* 138 * Check the link state. This may start or stop the tx queue. 139 */ 140static void 141vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue) 142{ 143 u32 ret; 144 int i; 145 146 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 147 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 148 adapter->link_speed = ret >> 16; 149 if (ret & 1) { /* Link is up. */ 150 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 151 adapter->netdev->name, adapter->link_speed); 152 if (!netif_carrier_ok(adapter->netdev)) 153 netif_carrier_on(adapter->netdev); 154 155 if (affectTxQueue) { 156 for (i = 0; i < adapter->num_tx_queues; i++) 157 vmxnet3_tq_start(&adapter->tx_queue[i], 158 adapter); 159 } 160 } else { 161 printk(KERN_INFO "%s: NIC Link is Down\n", 162 adapter->netdev->name); 163 if (netif_carrier_ok(adapter->netdev)) 164 netif_carrier_off(adapter->netdev); 165 166 if (affectTxQueue) { 167 for (i = 0; i < adapter->num_tx_queues; i++) 168 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter); 169 } 170 } 171} 172 173static void 174vmxnet3_process_events(struct vmxnet3_adapter *adapter) 175{ 176 int i; 177 u32 events = le32_to_cpu(adapter->shared->ecr); 178 if (!events) 179 return; 180 181 vmxnet3_ack_events(adapter, events); 182 183 /* Check if link state has changed */ 184 if (events & VMXNET3_ECR_LINK) 185 vmxnet3_check_link(adapter, true); 186 187 /* Check if there is an error on xmit/recv queues */ 188 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 189 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 190 VMXNET3_CMD_GET_QUEUE_STATUS); 191 192 for (i = 0; i < adapter->num_tx_queues; i++) 193 if (adapter->tqd_start[i].status.stopped) 194 dev_err(&adapter->netdev->dev, 195 "%s: tq[%d] error 0x%x\n", 196 adapter->netdev->name, i, le32_to_cpu( 197 adapter->tqd_start[i].status.error)); 198 for (i = 0; i < adapter->num_rx_queues; i++) 199 if (adapter->rqd_start[i].status.stopped) 200 dev_err(&adapter->netdev->dev, 201 "%s: rq[%d] error 0x%x\n", 202 adapter->netdev->name, i, 203 adapter->rqd_start[i].status.error); 204 205 schedule_work(&adapter->work); 206 } 207} 208 209#ifdef __BIG_ENDIAN_BITFIELD 210/* 211 * The device expects the bitfields in shared structures to be written in 212 * little endian. When CPU is big endian, the following routines are used to 213 * correctly read and write into ABI. 214 * The general technique used here is : double word bitfields are defined in 215 * opposite order for big endian architecture. Then before reading them in 216 * driver the complete double word is translated using le32_to_cpu. Similarly 217 * After the driver writes into bitfields, cpu_to_le32 is used to translate the 218 * double words into required format. 219 * In order to avoid touching bits in shared structure more than once, temporary 220 * descriptors are used. These are passed as srcDesc to following functions. 221 */ 222static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 223 struct Vmxnet3_RxDesc *dstDesc) 224{ 225 u32 *src = (u32 *)srcDesc + 2; 226 u32 *dst = (u32 *)dstDesc + 2; 227 dstDesc->addr = le64_to_cpu(srcDesc->addr); 228 *dst = le32_to_cpu(*src); 229 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 230} 231 232static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 233 struct Vmxnet3_TxDesc *dstDesc) 234{ 235 int i; 236 u32 *src = (u32 *)(srcDesc + 1); 237 u32 *dst = (u32 *)(dstDesc + 1); 238 239 /* Working backwards so that the gen bit is set at the end. */ 240 for (i = 2; i > 0; i--) { 241 src--; 242 dst--; 243 *dst = cpu_to_le32(*src); 244 } 245} 246 247 248static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 249 struct Vmxnet3_RxCompDesc *dstDesc) 250{ 251 int i = 0; 252 u32 *src = (u32 *)srcDesc; 253 u32 *dst = (u32 *)dstDesc; 254 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 255 *dst = le32_to_cpu(*src); 256 src++; 257 dst++; 258 } 259} 260 261 262/* Used to read bitfield values from double words. */ 263static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 264{ 265 u32 temp = le32_to_cpu(*bitfield); 266 u32 mask = ((1 << size) - 1) << pos; 267 temp &= mask; 268 temp >>= pos; 269 return temp; 270} 271 272 273 274#endif /* __BIG_ENDIAN_BITFIELD */ 275 276#ifdef __BIG_ENDIAN_BITFIELD 277 278# define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 279 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 280 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 281# define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 282 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 283 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 284# define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 285 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 286 VMXNET3_TCD_GEN_SIZE) 287# define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 288 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 289# define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 290 (dstrcd) = (tmp); \ 291 vmxnet3_RxCompToCPU((rcd), (tmp)); \ 292 } while (0) 293# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 294 (dstrxd) = (tmp); \ 295 vmxnet3_RxDescToCPU((rxd), (tmp)); \ 296 } while (0) 297 298#else 299 300# define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 301# define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 302# define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 303# define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 304# define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 305# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 306 307#endif /* __BIG_ENDIAN_BITFIELD */ 308 309 310static void 311vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 312 struct pci_dev *pdev) 313{ 314 if (tbi->map_type == VMXNET3_MAP_SINGLE) 315 pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 316 PCI_DMA_TODEVICE); 317 else if (tbi->map_type == VMXNET3_MAP_PAGE) 318 pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 319 PCI_DMA_TODEVICE); 320 else 321 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 322 323 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 324} 325 326 327static int 328vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 329 struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 330{ 331 struct sk_buff *skb; 332 int entries = 0; 333 334 /* no out of order completion */ 335 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 336 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 337 338 skb = tq->buf_info[eop_idx].skb; 339 BUG_ON(skb == NULL); 340 tq->buf_info[eop_idx].skb = NULL; 341 342 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 343 344 while (tq->tx_ring.next2comp != eop_idx) { 345 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 346 pdev); 347 348 /* update next2comp w/o tx_lock. Since we are marking more, 349 * instead of less, tx ring entries avail, the worst case is 350 * that the tx routine incorrectly re-queues a pkt due to 351 * insufficient tx ring entries. 352 */ 353 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 354 entries++; 355 } 356 357 dev_kfree_skb_any(skb); 358 return entries; 359} 360 361 362static int 363vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 364 struct vmxnet3_adapter *adapter) 365{ 366 int completed = 0; 367 union Vmxnet3_GenericDesc *gdesc; 368 369 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 370 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 371 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 372 &gdesc->tcd), tq, adapter->pdev, 373 adapter); 374 375 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 376 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 377 } 378 379 if (completed) { 380 spin_lock(&tq->tx_lock); 381 if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 382 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 383 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 384 netif_carrier_ok(adapter->netdev))) { 385 vmxnet3_tq_wake(tq, adapter); 386 } 387 spin_unlock(&tq->tx_lock); 388 } 389 return completed; 390} 391 392 393static void 394vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 395 struct vmxnet3_adapter *adapter) 396{ 397 int i; 398 399 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 400 struct vmxnet3_tx_buf_info *tbi; 401 union Vmxnet3_GenericDesc *gdesc; 402 403 tbi = tq->buf_info + tq->tx_ring.next2comp; 404 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 405 406 vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 407 if (tbi->skb) { 408 dev_kfree_skb_any(tbi->skb); 409 tbi->skb = NULL; 410 } 411 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 412 } 413 414 /* sanity check, verify all buffers are indeed unmapped and freed */ 415 for (i = 0; i < tq->tx_ring.size; i++) { 416 BUG_ON(tq->buf_info[i].skb != NULL || 417 tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 418 } 419 420 tq->tx_ring.gen = VMXNET3_INIT_GEN; 421 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 422 423 tq->comp_ring.gen = VMXNET3_INIT_GEN; 424 tq->comp_ring.next2proc = 0; 425} 426 427 428static void 429vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 430 struct vmxnet3_adapter *adapter) 431{ 432 if (tq->tx_ring.base) { 433 pci_free_consistent(adapter->pdev, tq->tx_ring.size * 434 sizeof(struct Vmxnet3_TxDesc), 435 tq->tx_ring.base, tq->tx_ring.basePA); 436 tq->tx_ring.base = NULL; 437 } 438 if (tq->data_ring.base) { 439 pci_free_consistent(adapter->pdev, tq->data_ring.size * 440 sizeof(struct Vmxnet3_TxDataDesc), 441 tq->data_ring.base, tq->data_ring.basePA); 442 tq->data_ring.base = NULL; 443 } 444 if (tq->comp_ring.base) { 445 pci_free_consistent(adapter->pdev, tq->comp_ring.size * 446 sizeof(struct Vmxnet3_TxCompDesc), 447 tq->comp_ring.base, tq->comp_ring.basePA); 448 tq->comp_ring.base = NULL; 449 } 450 kfree(tq->buf_info); 451 tq->buf_info = NULL; 452} 453 454 455/* Destroy all tx queues */ 456void 457vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter) 458{ 459 int i; 460 461 for (i = 0; i < adapter->num_tx_queues; i++) 462 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter); 463} 464 465 466static void 467vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 468 struct vmxnet3_adapter *adapter) 469{ 470 int i; 471 472 /* reset the tx ring contents to 0 and reset the tx ring states */ 473 memset(tq->tx_ring.base, 0, tq->tx_ring.size * 474 sizeof(struct Vmxnet3_TxDesc)); 475 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 476 tq->tx_ring.gen = VMXNET3_INIT_GEN; 477 478 memset(tq->data_ring.base, 0, tq->data_ring.size * 479 sizeof(struct Vmxnet3_TxDataDesc)); 480 481 /* reset the tx comp ring contents to 0 and reset comp ring states */ 482 memset(tq->comp_ring.base, 0, tq->comp_ring.size * 483 sizeof(struct Vmxnet3_TxCompDesc)); 484 tq->comp_ring.next2proc = 0; 485 tq->comp_ring.gen = VMXNET3_INIT_GEN; 486 487 /* reset the bookkeeping data */ 488 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 489 for (i = 0; i < tq->tx_ring.size; i++) 490 tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 491 492 /* stats are not reset */ 493} 494 495 496static int 497vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 498 struct vmxnet3_adapter *adapter) 499{ 500 BUG_ON(tq->tx_ring.base || tq->data_ring.base || 501 tq->comp_ring.base || tq->buf_info); 502 503 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 504 * sizeof(struct Vmxnet3_TxDesc), 505 &tq->tx_ring.basePA); 506 if (!tq->tx_ring.base) { 507 printk(KERN_ERR "%s: failed to allocate tx ring\n", 508 adapter->netdev->name); 509 goto err; 510 } 511 512 tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 513 tq->data_ring.size * 514 sizeof(struct Vmxnet3_TxDataDesc), 515 &tq->data_ring.basePA); 516 if (!tq->data_ring.base) { 517 printk(KERN_ERR "%s: failed to allocate data ring\n", 518 adapter->netdev->name); 519 goto err; 520 } 521 522 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 523 tq->comp_ring.size * 524 sizeof(struct Vmxnet3_TxCompDesc), 525 &tq->comp_ring.basePA); 526 if (!tq->comp_ring.base) { 527 printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 528 adapter->netdev->name); 529 goto err; 530 } 531 532 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 533 GFP_KERNEL); 534 if (!tq->buf_info) { 535 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 536 adapter->netdev->name); 537 goto err; 538 } 539 540 return 0; 541 542err: 543 vmxnet3_tq_destroy(tq, adapter); 544 return -ENOMEM; 545} 546 547static void 548vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter) 549{ 550 int i; 551 552 for (i = 0; i < adapter->num_tx_queues; i++) 553 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter); 554} 555 556/* 557 * starting from ring->next2fill, allocate rx buffers for the given ring 558 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 559 * are allocated or allocation fails 560 */ 561 562static int 563vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 564 int num_to_alloc, struct vmxnet3_adapter *adapter) 565{ 566 int num_allocated = 0; 567 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 568 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 569 u32 val; 570 571 while (num_allocated < num_to_alloc) { 572 struct vmxnet3_rx_buf_info *rbi; 573 union Vmxnet3_GenericDesc *gd; 574 575 rbi = rbi_base + ring->next2fill; 576 gd = ring->base + ring->next2fill; 577 578 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 579 if (rbi->skb == NULL) { 580 rbi->skb = dev_alloc_skb(rbi->len + 581 NET_IP_ALIGN); 582 if (unlikely(rbi->skb == NULL)) { 583 rq->stats.rx_buf_alloc_failure++; 584 break; 585 } 586 rbi->skb->dev = adapter->netdev; 587 588 skb_reserve(rbi->skb, NET_IP_ALIGN); 589 rbi->dma_addr = pci_map_single(adapter->pdev, 590 rbi->skb->data, rbi->len, 591 PCI_DMA_FROMDEVICE); 592 } else { 593 /* rx buffer skipped by the device */ 594 } 595 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 596 } else { 597 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 598 rbi->len != PAGE_SIZE); 599 600 if (rbi->page == NULL) { 601 rbi->page = alloc_page(GFP_ATOMIC); 602 if (unlikely(rbi->page == NULL)) { 603 rq->stats.rx_buf_alloc_failure++; 604 break; 605 } 606 rbi->dma_addr = pci_map_page(adapter->pdev, 607 rbi->page, 0, PAGE_SIZE, 608 PCI_DMA_FROMDEVICE); 609 } else { 610 /* rx buffers skipped by the device */ 611 } 612 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 613 } 614 615 BUG_ON(rbi->dma_addr == 0); 616 gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 617 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 618 | val | rbi->len); 619 620 num_allocated++; 621 vmxnet3_cmd_ring_adv_next2fill(ring); 622 } 623 rq->uncommitted[ring_idx] += num_allocated; 624 625 dev_dbg(&adapter->netdev->dev, 626 "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 627 "%u, uncommited %u\n", num_allocated, ring->next2fill, 628 ring->next2comp, rq->uncommitted[ring_idx]); 629 630 /* so that the device can distinguish a full ring and an empty ring */ 631 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 632 633 return num_allocated; 634} 635 636 637static void 638vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 639 struct vmxnet3_rx_buf_info *rbi) 640{ 641 struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 642 skb_shinfo(skb)->nr_frags; 643 644 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 645 646 frag->page = rbi->page; 647 frag->page_offset = 0; 648 frag->size = rcd->len; 649 skb->data_len += frag->size; 650 skb_shinfo(skb)->nr_frags++; 651} 652 653 654static void 655vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 656 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 657 struct vmxnet3_adapter *adapter) 658{ 659 u32 dw2, len; 660 unsigned long buf_offset; 661 int i; 662 union Vmxnet3_GenericDesc *gdesc; 663 struct vmxnet3_tx_buf_info *tbi = NULL; 664 665 BUG_ON(ctx->copy_size > skb_headlen(skb)); 666 667 /* use the previous gen bit for the SOP desc */ 668 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 669 670 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 671 gdesc = ctx->sop_txd; /* both loops below can be skipped */ 672 673 /* no need to map the buffer if headers are copied */ 674 if (ctx->copy_size) { 675 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 676 tq->tx_ring.next2fill * 677 sizeof(struct Vmxnet3_TxDataDesc)); 678 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 679 ctx->sop_txd->dword[3] = 0; 680 681 tbi = tq->buf_info + tq->tx_ring.next2fill; 682 tbi->map_type = VMXNET3_MAP_NONE; 683 684 dev_dbg(&adapter->netdev->dev, 685 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 686 tq->tx_ring.next2fill, 687 le64_to_cpu(ctx->sop_txd->txd.addr), 688 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 689 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 690 691 /* use the right gen for non-SOP desc */ 692 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 693 } 694 695 /* linear part can use multiple tx desc if it's big */ 696 len = skb_headlen(skb) - ctx->copy_size; 697 buf_offset = ctx->copy_size; 698 while (len) { 699 u32 buf_size; 700 701 if (len < VMXNET3_MAX_TX_BUF_SIZE) { 702 buf_size = len; 703 dw2 |= len; 704 } else { 705 buf_size = VMXNET3_MAX_TX_BUF_SIZE; 706 /* spec says that for TxDesc.len, 0 == 2^14 */ 707 } 708 709 tbi = tq->buf_info + tq->tx_ring.next2fill; 710 tbi->map_type = VMXNET3_MAP_SINGLE; 711 tbi->dma_addr = pci_map_single(adapter->pdev, 712 skb->data + buf_offset, buf_size, 713 PCI_DMA_TODEVICE); 714 715 tbi->len = buf_size; 716 717 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 718 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 719 720 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 721 gdesc->dword[2] = cpu_to_le32(dw2); 722 gdesc->dword[3] = 0; 723 724 dev_dbg(&adapter->netdev->dev, 725 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 726 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 727 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 728 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 729 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 730 731 len -= buf_size; 732 buf_offset += buf_size; 733 } 734 735 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 736 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 737 738 tbi = tq->buf_info + tq->tx_ring.next2fill; 739 tbi->map_type = VMXNET3_MAP_PAGE; 740 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 741 frag->page_offset, frag->size, 742 PCI_DMA_TODEVICE); 743 744 tbi->len = frag->size; 745 746 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 747 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 748 749 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 750 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 751 gdesc->dword[3] = 0; 752 753 dev_dbg(&adapter->netdev->dev, 754 "txd[%u]: 0x%llu %u %u\n", 755 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 756 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 757 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 758 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 759 } 760 761 ctx->eop_txd = gdesc; 762 763 /* set the last buf_info for the pkt */ 764 tbi->skb = skb; 765 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 766} 767 768 769/* Init all tx queues */ 770static void 771vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter) 772{ 773 int i; 774 775 for (i = 0; i < adapter->num_tx_queues; i++) 776 vmxnet3_tq_init(&adapter->tx_queue[i], adapter); 777} 778 779 780/* 781 * parse and copy relevant protocol headers: 782 * For a tso pkt, relevant headers are L2/3/4 including options 783 * For a pkt requesting csum offloading, they are L2/3 and may include L4 784 * if it's a TCP/UDP pkt 785 * 786 * Returns: 787 * -1: error happens during parsing 788 * 0: protocol headers parsed, but too big to be copied 789 * 1: protocol headers parsed and copied 790 * 791 * Other effects: 792 * 1. related *ctx fields are updated. 793 * 2. ctx->copy_size is # of bytes copied 794 * 3. the portion copied is guaranteed to be in the linear part 795 * 796 */ 797static int 798vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 799 struct vmxnet3_tx_ctx *ctx, 800 struct vmxnet3_adapter *adapter) 801{ 802 struct Vmxnet3_TxDataDesc *tdd; 803 804 if (ctx->mss) { /* TSO */ 805 ctx->eth_ip_hdr_size = skb_transport_offset(skb); 806 ctx->l4_hdr_size = ((struct tcphdr *) 807 skb_transport_header(skb))->doff * 4; 808 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 809 } else { 810 unsigned int pull_size; 811 812 if (skb->ip_summed == CHECKSUM_PARTIAL) { 813 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 814 815 if (ctx->ipv4) { 816 struct iphdr *iph = (struct iphdr *) 817 skb_network_header(skb); 818 if (iph->protocol == IPPROTO_TCP) { 819 pull_size = ctx->eth_ip_hdr_size + 820 sizeof(struct tcphdr); 821 822 if (unlikely(!pskb_may_pull(skb, 823 pull_size))) { 824 goto err; 825 } 826 ctx->l4_hdr_size = ((struct tcphdr *) 827 skb_transport_header(skb))->doff * 4; 828 } else if (iph->protocol == IPPROTO_UDP) { 829 ctx->l4_hdr_size = 830 sizeof(struct udphdr); 831 } else { 832 ctx->l4_hdr_size = 0; 833 } 834 } else { 835 /* for simplicity, don't copy L4 headers */ 836 ctx->l4_hdr_size = 0; 837 } 838 ctx->copy_size = ctx->eth_ip_hdr_size + 839 ctx->l4_hdr_size; 840 } else { 841 ctx->eth_ip_hdr_size = 0; 842 ctx->l4_hdr_size = 0; 843 /* copy as much as allowed */ 844 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 845 , skb_headlen(skb)); 846 } 847 848 /* make sure headers are accessible directly */ 849 if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 850 goto err; 851 } 852 853 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 854 tq->stats.oversized_hdr++; 855 ctx->copy_size = 0; 856 return 0; 857 } 858 859 tdd = tq->data_ring.base + tq->tx_ring.next2fill; 860 861 memcpy(tdd->data, skb->data, ctx->copy_size); 862 dev_dbg(&adapter->netdev->dev, 863 "copy %u bytes to dataRing[%u]\n", 864 ctx->copy_size, tq->tx_ring.next2fill); 865 return 1; 866 867err: 868 return -1; 869} 870 871 872static void 873vmxnet3_prepare_tso(struct sk_buff *skb, 874 struct vmxnet3_tx_ctx *ctx) 875{ 876 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 877 if (ctx->ipv4) { 878 struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 879 iph->check = 0; 880 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 881 IPPROTO_TCP, 0); 882 } else { 883 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 884 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 885 IPPROTO_TCP, 0); 886 } 887} 888 889 890/* 891 * Transmits a pkt thru a given tq 892 * Returns: 893 * NETDEV_TX_OK: descriptors are setup successfully 894 * NETDEV_TX_OK: error occured, the pkt is dropped 895 * NETDEV_TX_BUSY: tx ring is full, queue is stopped 896 * 897 * Side-effects: 898 * 1. tx ring may be changed 899 * 2. tq stats may be updated accordingly 900 * 3. shared->txNumDeferred may be updated 901 */ 902 903static int 904vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 905 struct vmxnet3_adapter *adapter, struct net_device *netdev) 906{ 907 int ret; 908 u32 count; 909 unsigned long flags; 910 struct vmxnet3_tx_ctx ctx; 911 union Vmxnet3_GenericDesc *gdesc; 912#ifdef __BIG_ENDIAN_BITFIELD 913 /* Use temporary descriptor to avoid touching bits multiple times */ 914 union Vmxnet3_GenericDesc tempTxDesc; 915#endif 916 917 /* conservatively estimate # of descriptors to use */ 918 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 919 skb_shinfo(skb)->nr_frags + 1; 920 921 ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); 922 923 ctx.mss = skb_shinfo(skb)->gso_size; 924 if (ctx.mss) { 925 if (skb_header_cloned(skb)) { 926 if (unlikely(pskb_expand_head(skb, 0, 0, 927 GFP_ATOMIC) != 0)) { 928 tq->stats.drop_tso++; 929 goto drop_pkt; 930 } 931 tq->stats.copy_skb_header++; 932 } 933 vmxnet3_prepare_tso(skb, &ctx); 934 } else { 935 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 936 937 /* non-tso pkts must not use more than 938 * VMXNET3_MAX_TXD_PER_PKT entries 939 */ 940 if (skb_linearize(skb) != 0) { 941 tq->stats.drop_too_many_frags++; 942 goto drop_pkt; 943 } 944 tq->stats.linearized++; 945 946 /* recalculate the # of descriptors to use */ 947 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 948 } 949 } 950 951 spin_lock_irqsave(&tq->tx_lock, flags); 952 953 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 954 tq->stats.tx_ring_full++; 955 dev_dbg(&adapter->netdev->dev, 956 "tx queue stopped on %s, next2comp %u" 957 " next2fill %u\n", adapter->netdev->name, 958 tq->tx_ring.next2comp, tq->tx_ring.next2fill); 959 960 vmxnet3_tq_stop(tq, adapter); 961 spin_unlock_irqrestore(&tq->tx_lock, flags); 962 return NETDEV_TX_BUSY; 963 } 964 965 966 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 967 if (ret >= 0) { 968 BUG_ON(ret <= 0 && ctx.copy_size != 0); 969 /* hdrs parsed, check against other limits */ 970 if (ctx.mss) { 971 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 972 VMXNET3_MAX_TX_BUF_SIZE)) { 973 goto hdr_too_big; 974 } 975 } else { 976 if (skb->ip_summed == CHECKSUM_PARTIAL) { 977 if (unlikely(ctx.eth_ip_hdr_size + 978 skb->csum_offset > 979 VMXNET3_MAX_CSUM_OFFSET)) { 980 goto hdr_too_big; 981 } 982 } 983 } 984 } else { 985 tq->stats.drop_hdr_inspect_err++; 986 goto unlock_drop_pkt; 987 } 988 989 /* fill tx descs related to addr & len */ 990 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 991 992 /* setup the EOP desc */ 993 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 994 995 /* setup the SOP desc */ 996#ifdef __BIG_ENDIAN_BITFIELD 997 gdesc = &tempTxDesc; 998 gdesc->dword[2] = ctx.sop_txd->dword[2]; 999 gdesc->dword[3] = ctx.sop_txd->dword[3]; 1000#else 1001 gdesc = ctx.sop_txd; 1002#endif 1003 if (ctx.mss) { 1004 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 1005 gdesc->txd.om = VMXNET3_OM_TSO; 1006 gdesc->txd.msscof = ctx.mss; 1007 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 1008 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 1009 } else { 1010 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1011 gdesc->txd.hlen = ctx.eth_ip_hdr_size; 1012 gdesc->txd.om = VMXNET3_OM_CSUM; 1013 gdesc->txd.msscof = ctx.eth_ip_hdr_size + 1014 skb->csum_offset; 1015 } else { 1016 gdesc->txd.om = 0; 1017 gdesc->txd.msscof = 0; 1018 } 1019 le32_add_cpu(&tq->shared->txNumDeferred, 1); 1020 } 1021 1022 if (vlan_tx_tag_present(skb)) { 1023 gdesc->txd.ti = 1; 1024 gdesc->txd.tci = vlan_tx_tag_get(skb); 1025 } 1026 1027 /* finally flips the GEN bit of the SOP desc. */ 1028 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 1029 VMXNET3_TXD_GEN); 1030#ifdef __BIG_ENDIAN_BITFIELD 1031 /* Finished updating in bitfields of Tx Desc, so write them in original 1032 * place. 1033 */ 1034 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 1035 (struct Vmxnet3_TxDesc *)ctx.sop_txd); 1036 gdesc = ctx.sop_txd; 1037#endif 1038 dev_dbg(&adapter->netdev->dev, 1039 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 1040 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 1041 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 1042 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 1043 1044 spin_unlock_irqrestore(&tq->tx_lock, flags); 1045 1046 if (le32_to_cpu(tq->shared->txNumDeferred) >= 1047 le32_to_cpu(tq->shared->txThreshold)) { 1048 tq->shared->txNumDeferred = 0; 1049 VMXNET3_WRITE_BAR0_REG(adapter, 1050 VMXNET3_REG_TXPROD + tq->qid * 8, 1051 tq->tx_ring.next2fill); 1052 } 1053 1054 return NETDEV_TX_OK; 1055 1056hdr_too_big: 1057 tq->stats.drop_oversized_hdr++; 1058unlock_drop_pkt: 1059 spin_unlock_irqrestore(&tq->tx_lock, flags); 1060drop_pkt: 1061 tq->stats.drop_total++; 1062 dev_kfree_skb(skb); 1063 return NETDEV_TX_OK; 1064} 1065 1066 1067static netdev_tx_t 1068vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1069{ 1070 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1071 1072 BUG_ON(skb->queue_mapping > adapter->num_tx_queues); 1073 return vmxnet3_tq_xmit(skb, 1074 &adapter->tx_queue[skb->queue_mapping], 1075 adapter, netdev); 1076} 1077 1078 1079static void 1080vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1081 struct sk_buff *skb, 1082 union Vmxnet3_GenericDesc *gdesc) 1083{ 1084 if (!gdesc->rcd.cnc && adapter->rxcsum) { 1085 /* typical case: TCP/UDP over IP and both csums are correct */ 1086 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1087 VMXNET3_RCD_CSUM_OK) { 1088 skb->ip_summed = CHECKSUM_UNNECESSARY; 1089 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1090 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1091 BUG_ON(gdesc->rcd.frg); 1092 } else { 1093 if (gdesc->rcd.csum) { 1094 skb->csum = htons(gdesc->rcd.csum); 1095 skb->ip_summed = CHECKSUM_PARTIAL; 1096 } else { 1097 skb_checksum_none_assert(skb); 1098 } 1099 } 1100 } else { 1101 skb_checksum_none_assert(skb); 1102 } 1103} 1104 1105 1106static void 1107vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1108 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1109{ 1110 rq->stats.drop_err++; 1111 if (!rcd->fcs) 1112 rq->stats.drop_fcs++; 1113 1114 rq->stats.drop_total++; 1115 1116 /* 1117 * We do not unmap and chain the rx buffer to the skb. 1118 * We basically pretend this buffer is not used and will be recycled 1119 * by vmxnet3_rq_alloc_rx_buf() 1120 */ 1121 1122 /* 1123 * ctx->skb may be NULL if this is the first and the only one 1124 * desc for the pkt 1125 */ 1126 if (ctx->skb) 1127 dev_kfree_skb_irq(ctx->skb); 1128 1129 ctx->skb = NULL; 1130} 1131 1132 1133static int 1134vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1135 struct vmxnet3_adapter *adapter, int quota) 1136{ 1137 static const u32 rxprod_reg[2] = { 1138 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2 1139 }; 1140 u32 num_rxd = 0; 1141 struct Vmxnet3_RxCompDesc *rcd; 1142 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1143#ifdef __BIG_ENDIAN_BITFIELD 1144 struct Vmxnet3_RxDesc rxCmdDesc; 1145 struct Vmxnet3_RxCompDesc rxComp; 1146#endif 1147 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1148 &rxComp); 1149 while (rcd->gen == rq->comp_ring.gen) { 1150 struct vmxnet3_rx_buf_info *rbi; 1151 struct sk_buff *skb; 1152 int num_to_alloc; 1153 struct Vmxnet3_RxDesc *rxd; 1154 u32 idx, ring_idx; 1155 1156 if (num_rxd >= quota) { 1157 /* we may stop even before we see the EOP desc of 1158 * the current pkt 1159 */ 1160 break; 1161 } 1162 num_rxd++; 1163 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2); 1164 idx = rcd->rxdIdx; 1165 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1; 1166 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1167 &rxCmdDesc); 1168 rbi = rq->buf_info[ring_idx] + idx; 1169 1170 BUG_ON(rxd->addr != rbi->dma_addr || 1171 rxd->len != rbi->len); 1172 1173 if (unlikely(rcd->eop && rcd->err)) { 1174 vmxnet3_rx_error(rq, rcd, ctx, adapter); 1175 goto rcd_done; 1176 } 1177 1178 if (rcd->sop) { /* first buf of the pkt */ 1179 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1180 rcd->rqID != rq->qid); 1181 1182 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1183 BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1184 1185 if (unlikely(rcd->len == 0)) { 1186 /* Pretend the rx buffer is skipped. */ 1187 BUG_ON(!(rcd->sop && rcd->eop)); 1188 dev_dbg(&adapter->netdev->dev, 1189 "rxRing[%u][%u] 0 length\n", 1190 ring_idx, idx); 1191 goto rcd_done; 1192 } 1193 1194 ctx->skb = rbi->skb; 1195 rbi->skb = NULL; 1196 1197 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1198 PCI_DMA_FROMDEVICE); 1199 1200 skb_put(ctx->skb, rcd->len); 1201 } else { 1202 BUG_ON(ctx->skb == NULL); 1203 /* non SOP buffer must be type 1 in most cases */ 1204 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1205 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1206 1207 if (rcd->len) { 1208 pci_unmap_page(adapter->pdev, 1209 rbi->dma_addr, rbi->len, 1210 PCI_DMA_FROMDEVICE); 1211 1212 vmxnet3_append_frag(ctx->skb, rcd, rbi); 1213 rbi->page = NULL; 1214 } 1215 } else { 1216 /* 1217 * The only time a non-SOP buffer is type 0 is 1218 * when it's EOP and error flag is raised, which 1219 * has already been handled. 1220 */ 1221 BUG_ON(true); 1222 } 1223 } 1224 1225 skb = ctx->skb; 1226 if (rcd->eop) { 1227 skb->len += skb->data_len; 1228 skb->truesize += skb->data_len; 1229 1230 vmxnet3_rx_csum(adapter, skb, 1231 (union Vmxnet3_GenericDesc *)rcd); 1232 skb->protocol = eth_type_trans(skb, adapter->netdev); 1233 1234 if (unlikely(adapter->vlan_grp && rcd->ts)) { 1235 vlan_hwaccel_receive_skb(skb, 1236 adapter->vlan_grp, rcd->tci); 1237 } else { 1238 netif_receive_skb(skb); 1239 } 1240 1241 ctx->skb = NULL; 1242 } 1243 1244rcd_done: 1245 /* device may skip some rx descs */ 1246 rq->rx_ring[ring_idx].next2comp = idx; 1247 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1248 rq->rx_ring[ring_idx].size); 1249 1250 /* refill rx buffers frequently to avoid starving the h/w */ 1251 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1252 ring_idx); 1253 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1254 ring_idx, adapter))) { 1255 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1256 adapter); 1257 1258 /* if needed, update the register */ 1259 if (unlikely(rq->shared->updateRxProd)) { 1260 VMXNET3_WRITE_BAR0_REG(adapter, 1261 rxprod_reg[ring_idx] + rq->qid * 8, 1262 rq->rx_ring[ring_idx].next2fill); 1263 rq->uncommitted[ring_idx] = 0; 1264 } 1265 } 1266 1267 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1268 vmxnet3_getRxComp(rcd, 1269 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1270 } 1271 1272 return num_rxd; 1273} 1274 1275 1276static void 1277vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1278 struct vmxnet3_adapter *adapter) 1279{ 1280 u32 i, ring_idx; 1281 struct Vmxnet3_RxDesc *rxd; 1282 1283 for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1284 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1285#ifdef __BIG_ENDIAN_BITFIELD 1286 struct Vmxnet3_RxDesc rxDesc; 1287#endif 1288 vmxnet3_getRxDesc(rxd, 1289 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1290 1291 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1292 rq->buf_info[ring_idx][i].skb) { 1293 pci_unmap_single(adapter->pdev, rxd->addr, 1294 rxd->len, PCI_DMA_FROMDEVICE); 1295 dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1296 rq->buf_info[ring_idx][i].skb = NULL; 1297 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1298 rq->buf_info[ring_idx][i].page) { 1299 pci_unmap_page(adapter->pdev, rxd->addr, 1300 rxd->len, PCI_DMA_FROMDEVICE); 1301 put_page(rq->buf_info[ring_idx][i].page); 1302 rq->buf_info[ring_idx][i].page = NULL; 1303 } 1304 } 1305 1306 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1307 rq->rx_ring[ring_idx].next2fill = 1308 rq->rx_ring[ring_idx].next2comp = 0; 1309 rq->uncommitted[ring_idx] = 0; 1310 } 1311 1312 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1313 rq->comp_ring.next2proc = 0; 1314} 1315 1316 1317static void 1318vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter) 1319{ 1320 int i; 1321 1322 for (i = 0; i < adapter->num_rx_queues; i++) 1323 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter); 1324} 1325 1326 1327void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1328 struct vmxnet3_adapter *adapter) 1329{ 1330 int i; 1331 int j; 1332 1333 /* all rx buffers must have already been freed */ 1334 for (i = 0; i < 2; i++) { 1335 if (rq->buf_info[i]) { 1336 for (j = 0; j < rq->rx_ring[i].size; j++) 1337 BUG_ON(rq->buf_info[i][j].page != NULL); 1338 } 1339 } 1340 1341 1342 kfree(rq->buf_info[0]); 1343 1344 for (i = 0; i < 2; i++) { 1345 if (rq->rx_ring[i].base) { 1346 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1347 * sizeof(struct Vmxnet3_RxDesc), 1348 rq->rx_ring[i].base, 1349 rq->rx_ring[i].basePA); 1350 rq->rx_ring[i].base = NULL; 1351 } 1352 rq->buf_info[i] = NULL; 1353 } 1354 1355 if (rq->comp_ring.base) { 1356 pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1357 sizeof(struct Vmxnet3_RxCompDesc), 1358 rq->comp_ring.base, rq->comp_ring.basePA); 1359 rq->comp_ring.base = NULL; 1360 } 1361} 1362 1363 1364static int 1365vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1366 struct vmxnet3_adapter *adapter) 1367{ 1368 int i; 1369 1370 /* initialize buf_info */ 1371 for (i = 0; i < rq->rx_ring[0].size; i++) { 1372 1373 /* 1st buf for a pkt is skbuff */ 1374 if (i % adapter->rx_buf_per_pkt == 0) { 1375 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1376 rq->buf_info[0][i].len = adapter->skb_buf_size; 1377 } else { /* subsequent bufs for a pkt is frag */ 1378 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1379 rq->buf_info[0][i].len = PAGE_SIZE; 1380 } 1381 } 1382 for (i = 0; i < rq->rx_ring[1].size; i++) { 1383 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1384 rq->buf_info[1][i].len = PAGE_SIZE; 1385 } 1386 1387 /* reset internal state and allocate buffers for both rings */ 1388 for (i = 0; i < 2; i++) { 1389 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1390 rq->uncommitted[i] = 0; 1391 1392 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1393 sizeof(struct Vmxnet3_RxDesc)); 1394 rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1395 } 1396 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1397 adapter) == 0) { 1398 /* at least has 1 rx buffer for the 1st ring */ 1399 return -ENOMEM; 1400 } 1401 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1402 1403 /* reset the comp ring */ 1404 rq->comp_ring.next2proc = 0; 1405 memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1406 sizeof(struct Vmxnet3_RxCompDesc)); 1407 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1408 1409 /* reset rxctx */ 1410 rq->rx_ctx.skb = NULL; 1411 1412 /* stats are not reset */ 1413 return 0; 1414} 1415 1416 1417static int 1418vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter) 1419{ 1420 int i, err = 0; 1421 1422 for (i = 0; i < adapter->num_rx_queues; i++) { 1423 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter); 1424 if (unlikely(err)) { 1425 dev_err(&adapter->netdev->dev, "%s: failed to " 1426 "initialize rx queue%i\n", 1427 adapter->netdev->name, i); 1428 break; 1429 } 1430 } 1431 return err; 1432 1433} 1434 1435 1436static int 1437vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1438{ 1439 int i; 1440 size_t sz; 1441 struct vmxnet3_rx_buf_info *bi; 1442 1443 for (i = 0; i < 2; i++) { 1444 1445 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1446 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1447 &rq->rx_ring[i].basePA); 1448 if (!rq->rx_ring[i].base) { 1449 printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1450 adapter->netdev->name, i); 1451 goto err; 1452 } 1453 } 1454 1455 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1456 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1457 &rq->comp_ring.basePA); 1458 if (!rq->comp_ring.base) { 1459 printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1460 adapter->netdev->name); 1461 goto err; 1462 } 1463 1464 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1465 rq->rx_ring[1].size); 1466 bi = kzalloc(sz, GFP_KERNEL); 1467 if (!bi) { 1468 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1469 adapter->netdev->name); 1470 goto err; 1471 } 1472 rq->buf_info[0] = bi; 1473 rq->buf_info[1] = bi + rq->rx_ring[0].size; 1474 1475 return 0; 1476 1477err: 1478 vmxnet3_rq_destroy(rq, adapter); 1479 return -ENOMEM; 1480} 1481 1482 1483static int 1484vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter) 1485{ 1486 int i, err = 0; 1487 1488 for (i = 0; i < adapter->num_rx_queues; i++) { 1489 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter); 1490 if (unlikely(err)) { 1491 dev_err(&adapter->netdev->dev, 1492 "%s: failed to create rx queue%i\n", 1493 adapter->netdev->name, i); 1494 goto err_out; 1495 } 1496 } 1497 return err; 1498err_out: 1499 vmxnet3_rq_destroy_all(adapter); 1500 return err; 1501 1502} 1503 1504/* Multiple queue aware polling function for tx and rx */ 1505 1506static int 1507vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1508{ 1509 int rcd_done = 0, i; 1510 if (unlikely(adapter->shared->ecr)) 1511 vmxnet3_process_events(adapter); 1512 for (i = 0; i < adapter->num_tx_queues; i++) 1513 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter); 1514 1515 for (i = 0; i < adapter->num_rx_queues; i++) 1516 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i], 1517 adapter, budget); 1518 return rcd_done; 1519} 1520 1521 1522static int 1523vmxnet3_poll(struct napi_struct *napi, int budget) 1524{ 1525 struct vmxnet3_rx_queue *rx_queue = container_of(napi, 1526 struct vmxnet3_rx_queue, napi); 1527 int rxd_done; 1528 1529 rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget); 1530 1531 if (rxd_done < budget) { 1532 napi_complete(napi); 1533 vmxnet3_enable_all_intrs(rx_queue->adapter); 1534 } 1535 return rxd_done; 1536} 1537 1538/* 1539 * NAPI polling function for MSI-X mode with multiple Rx queues 1540 * Returns the # of the NAPI credit consumed (# of rx descriptors processed) 1541 */ 1542 1543static int 1544vmxnet3_poll_rx_only(struct napi_struct *napi, int budget) 1545{ 1546 struct vmxnet3_rx_queue *rq = container_of(napi, 1547 struct vmxnet3_rx_queue, napi); 1548 struct vmxnet3_adapter *adapter = rq->adapter; 1549 int rxd_done; 1550 1551 /* When sharing interrupt with corresponding tx queue, process 1552 * tx completions in that queue as well 1553 */ 1554 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) { 1555 struct vmxnet3_tx_queue *tq = 1556 &adapter->tx_queue[rq - adapter->rx_queue]; 1557 vmxnet3_tq_tx_complete(tq, adapter); 1558 } 1559 1560 rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget); 1561 1562 if (rxd_done < budget) { 1563 napi_complete(napi); 1564 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx); 1565 } 1566 return rxd_done; 1567} 1568 1569 1570#ifdef CONFIG_PCI_MSI 1571 1572/* 1573 * Handle completion interrupts on tx queues 1574 * Returns whether or not the intr is handled 1575 */ 1576 1577static irqreturn_t 1578vmxnet3_msix_tx(int irq, void *data) 1579{ 1580 struct vmxnet3_tx_queue *tq = data; 1581 struct vmxnet3_adapter *adapter = tq->adapter; 1582 1583 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1584 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx); 1585 1586 /* Handle the case where only one irq is allocate for all tx queues */ 1587 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 1588 int i; 1589 for (i = 0; i < adapter->num_tx_queues; i++) { 1590 struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i]; 1591 vmxnet3_tq_tx_complete(txq, adapter); 1592 } 1593 } else { 1594 vmxnet3_tq_tx_complete(tq, adapter); 1595 } 1596 vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx); 1597 1598 return IRQ_HANDLED; 1599} 1600 1601 1602/* 1603 * Handle completion interrupts on rx queues. Returns whether or not the 1604 * intr is handled 1605 */ 1606 1607static irqreturn_t 1608vmxnet3_msix_rx(int irq, void *data) 1609{ 1610 struct vmxnet3_rx_queue *rq = data; 1611 struct vmxnet3_adapter *adapter = rq->adapter; 1612 1613 /* disable intr if needed */ 1614 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1615 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx); 1616 napi_schedule(&rq->napi); 1617 1618 return IRQ_HANDLED; 1619} 1620 1621/* 1622 *---------------------------------------------------------------------------- 1623 * 1624 * vmxnet3_msix_event -- 1625 * 1626 * vmxnet3 msix event intr handler 1627 * 1628 * Result: 1629 * whether or not the intr is handled 1630 * 1631 *---------------------------------------------------------------------------- 1632 */ 1633 1634static irqreturn_t 1635vmxnet3_msix_event(int irq, void *data) 1636{ 1637 struct net_device *dev = data; 1638 struct vmxnet3_adapter *adapter = netdev_priv(dev); 1639 1640 /* disable intr if needed */ 1641 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1642 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx); 1643 1644 if (adapter->shared->ecr) 1645 vmxnet3_process_events(adapter); 1646 1647 vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx); 1648 1649 return IRQ_HANDLED; 1650} 1651 1652#endif /* CONFIG_PCI_MSI */ 1653 1654 1655/* Interrupt handler for vmxnet3 */ 1656static irqreturn_t 1657vmxnet3_intr(int irq, void *dev_id) 1658{ 1659 struct net_device *dev = dev_id; 1660 struct vmxnet3_adapter *adapter = netdev_priv(dev); 1661 1662 if (adapter->intr.type == VMXNET3_IT_INTX) { 1663 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1664 if (unlikely(icr == 0)) 1665 /* not ours */ 1666 return IRQ_NONE; 1667 } 1668 1669 1670 /* disable intr if needed */ 1671 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1672 vmxnet3_disable_all_intrs(adapter); 1673 1674 napi_schedule(&adapter->rx_queue[0].napi); 1675 1676 return IRQ_HANDLED; 1677} 1678 1679#ifdef CONFIG_NET_POLL_CONTROLLER 1680 1681/* netpoll callback. */ 1682static void 1683vmxnet3_netpoll(struct net_device *netdev) 1684{ 1685 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1686 1687 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1688 vmxnet3_disable_all_intrs(adapter); 1689 1690 vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size); 1691 vmxnet3_enable_all_intrs(adapter); 1692 1693} 1694#endif /* CONFIG_NET_POLL_CONTROLLER */ 1695 1696static int 1697vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1698{ 1699 struct vmxnet3_intr *intr = &adapter->intr; 1700 int err = 0, i; 1701 int vector = 0; 1702 1703#ifdef CONFIG_PCI_MSI 1704 if (adapter->intr.type == VMXNET3_IT_MSIX) { 1705 for (i = 0; i < adapter->num_tx_queues; i++) { 1706 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 1707 sprintf(adapter->tx_queue[i].name, "%s-tx-%d", 1708 adapter->netdev->name, vector); 1709 err = request_irq( 1710 intr->msix_entries[vector].vector, 1711 vmxnet3_msix_tx, 0, 1712 adapter->tx_queue[i].name, 1713 &adapter->tx_queue[i]); 1714 } else { 1715 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d", 1716 adapter->netdev->name, vector); 1717 } 1718 if (err) { 1719 dev_err(&adapter->netdev->dev, 1720 "Failed to request irq for MSIX, %s, " 1721 "error %d\n", 1722 adapter->tx_queue[i].name, err); 1723 return err; 1724 } 1725 1726 /* Handle the case where only 1 MSIx was allocated for 1727 * all tx queues */ 1728 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) { 1729 for (; i < adapter->num_tx_queues; i++) 1730 adapter->tx_queue[i].comp_ring.intr_idx 1731 = vector; 1732 vector++; 1733 break; 1734 } else { 1735 adapter->tx_queue[i].comp_ring.intr_idx 1736 = vector++; 1737 } 1738 } 1739 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) 1740 vector = 0; 1741 1742 for (i = 0; i < adapter->num_rx_queues; i++) { 1743 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) 1744 sprintf(adapter->rx_queue[i].name, "%s-rx-%d", 1745 adapter->netdev->name, vector); 1746 else 1747 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d", 1748 adapter->netdev->name, vector); 1749 err = request_irq(intr->msix_entries[vector].vector, 1750 vmxnet3_msix_rx, 0, 1751 adapter->rx_queue[i].name, 1752 &(adapter->rx_queue[i])); 1753 if (err) { 1754 printk(KERN_ERR "Failed to request irq for MSIX" 1755 ", %s, error %d\n", 1756 adapter->rx_queue[i].name, err); 1757 return err; 1758 } 1759 1760 adapter->rx_queue[i].comp_ring.intr_idx = vector++; 1761 } 1762 1763 sprintf(intr->event_msi_vector_name, "%s-event-%d", 1764 adapter->netdev->name, vector); 1765 err = request_irq(intr->msix_entries[vector].vector, 1766 vmxnet3_msix_event, 0, 1767 intr->event_msi_vector_name, adapter->netdev); 1768 intr->event_intr_idx = vector; 1769 1770 } else if (intr->type == VMXNET3_IT_MSI) { 1771 adapter->num_rx_queues = 1; 1772 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1773 adapter->netdev->name, adapter->netdev); 1774 } else { 1775#endif 1776 adapter->num_rx_queues = 1; 1777 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1778 IRQF_SHARED, adapter->netdev->name, 1779 adapter->netdev); 1780#ifdef CONFIG_PCI_MSI 1781 } 1782#endif 1783 intr->num_intrs = vector + 1; 1784 if (err) { 1785 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 1786 ":%d\n", adapter->netdev->name, intr->type, err); 1787 } else { 1788 /* Number of rx queues will not change after this */ 1789 for (i = 0; i < adapter->num_rx_queues; i++) { 1790 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 1791 rq->qid = i; 1792 rq->qid2 = i + adapter->num_rx_queues; 1793 } 1794 1795 1796 1797 /* init our intr settings */ 1798 for (i = 0; i < intr->num_intrs; i++) 1799 intr->mod_levels[i] = UPT1_IML_ADAPTIVE; 1800 if (adapter->intr.type != VMXNET3_IT_MSIX) { 1801 adapter->intr.event_intr_idx = 0; 1802 for (i = 0; i < adapter->num_tx_queues; i++) 1803 adapter->tx_queue[i].comp_ring.intr_idx = 0; 1804 adapter->rx_queue[0].comp_ring.intr_idx = 0; 1805 } 1806 1807 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 1808 "allocated\n", adapter->netdev->name, intr->type, 1809 intr->mask_mode, intr->num_intrs); 1810 } 1811 1812 return err; 1813} 1814 1815 1816static void 1817vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1818{ 1819 struct vmxnet3_intr *intr = &adapter->intr; 1820 BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0); 1821 1822 switch (intr->type) { 1823#ifdef CONFIG_PCI_MSI 1824 case VMXNET3_IT_MSIX: 1825 { 1826 int i, vector = 0; 1827 1828 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) { 1829 for (i = 0; i < adapter->num_tx_queues; i++) { 1830 free_irq(intr->msix_entries[vector++].vector, 1831 &(adapter->tx_queue[i])); 1832 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) 1833 break; 1834 } 1835 } 1836 1837 for (i = 0; i < adapter->num_rx_queues; i++) { 1838 free_irq(intr->msix_entries[vector++].vector, 1839 &(adapter->rx_queue[i])); 1840 } 1841 1842 free_irq(intr->msix_entries[vector].vector, 1843 adapter->netdev); 1844 BUG_ON(vector >= intr->num_intrs); 1845 break; 1846 } 1847#endif 1848 case VMXNET3_IT_MSI: 1849 free_irq(adapter->pdev->irq, adapter->netdev); 1850 break; 1851 case VMXNET3_IT_INTX: 1852 free_irq(adapter->pdev->irq, adapter->netdev); 1853 break; 1854 default: 1855 BUG_ON(true); 1856 } 1857} 1858 1859static void 1860vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1861{ 1862 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1863 struct Vmxnet3_DriverShared *shared = adapter->shared; 1864 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1865 1866 if (grp) { 1867 /* add vlan rx stripping. */ 1868 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1869 int i; 1870 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1871 adapter->vlan_grp = grp; 1872 1873 /* update FEATURES to device */ 1874 devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 1875 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1876 VMXNET3_CMD_UPDATE_FEATURE); 1877 /* 1878 * Clear entire vfTable; then enable untagged pkts. 1879 * Note: setting one entry in vfTable to non-zero turns 1880 * on VLAN rx filtering. 1881 */ 1882 for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1883 vfTable[i] = 0; 1884 1885 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1886 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1887 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1888 } else { 1889 printk(KERN_ERR "%s: vlan_rx_register when device has " 1890 "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1891 } 1892 } else { 1893 /* remove vlan rx stripping. */ 1894 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1895 adapter->vlan_grp = NULL; 1896 1897 if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { 1898 int i; 1899 1900 for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1901 /* clear entire vfTable; this also disables 1902 * VLAN rx filtering 1903 */ 1904 vfTable[i] = 0; 1905 } 1906 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1907 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1908 1909 /* update FEATURES to device */ 1910 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN; 1911 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1912 VMXNET3_CMD_UPDATE_FEATURE); 1913 } 1914 } 1915} 1916 1917 1918static void 1919vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1920{ 1921 if (adapter->vlan_grp) { 1922 u16 vid; 1923 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1924 bool activeVlan = false; 1925 1926 for (vid = 0; vid < VLAN_N_VID; vid++) { 1927 if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1928 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1929 activeVlan = true; 1930 } 1931 } 1932 if (activeVlan) { 1933 /* continue to allow untagged pkts */ 1934 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1935 } 1936 } 1937} 1938 1939 1940static void 1941vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1942{ 1943 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1944 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1945 1946 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1947 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1948 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1949} 1950 1951 1952static void 1953vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1954{ 1955 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1956 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1957 1958 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1959 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1960 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1961} 1962 1963 1964static u8 * 1965vmxnet3_copy_mc(struct net_device *netdev) 1966{ 1967 u8 *buf = NULL; 1968 u32 sz = netdev_mc_count(netdev) * ETH_ALEN; 1969 1970 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1971 if (sz <= 0xffff) { 1972 /* We may be called with BH disabled */ 1973 buf = kmalloc(sz, GFP_ATOMIC); 1974 if (buf) { 1975 struct netdev_hw_addr *ha; 1976 int i = 0; 1977 1978 netdev_for_each_mc_addr(ha, netdev) 1979 memcpy(buf + i++ * ETH_ALEN, ha->addr, 1980 ETH_ALEN); 1981 } 1982 } 1983 return buf; 1984} 1985 1986 1987static void 1988vmxnet3_set_mc(struct net_device *netdev) 1989{ 1990 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1991 struct Vmxnet3_RxFilterConf *rxConf = 1992 &adapter->shared->devRead.rxFilterConf; 1993 u8 *new_table = NULL; 1994 u32 new_mode = VMXNET3_RXM_UCAST; 1995 1996 if (netdev->flags & IFF_PROMISC) 1997 new_mode |= VMXNET3_RXM_PROMISC; 1998 1999 if (netdev->flags & IFF_BROADCAST) 2000 new_mode |= VMXNET3_RXM_BCAST; 2001 2002 if (netdev->flags & IFF_ALLMULTI) 2003 new_mode |= VMXNET3_RXM_ALL_MULTI; 2004 else 2005 if (!netdev_mc_empty(netdev)) { 2006 new_table = vmxnet3_copy_mc(netdev); 2007 if (new_table) { 2008 new_mode |= VMXNET3_RXM_MCAST; 2009 rxConf->mfTableLen = cpu_to_le16( 2010 netdev_mc_count(netdev) * ETH_ALEN); 2011 rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 2012 new_table)); 2013 } else { 2014 printk(KERN_INFO "%s: failed to copy mcast list" 2015 ", setting ALL_MULTI\n", netdev->name); 2016 new_mode |= VMXNET3_RXM_ALL_MULTI; 2017 } 2018 } 2019 2020 2021 if (!(new_mode & VMXNET3_RXM_MCAST)) { 2022 rxConf->mfTableLen = 0; 2023 rxConf->mfTablePA = 0; 2024 } 2025 2026 if (new_mode != rxConf->rxMode) { 2027 rxConf->rxMode = cpu_to_le32(new_mode); 2028 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2029 VMXNET3_CMD_UPDATE_RX_MODE); 2030 } 2031 2032 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2033 VMXNET3_CMD_UPDATE_MAC_FILTERS); 2034 2035 kfree(new_table); 2036} 2037 2038void 2039vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter) 2040{ 2041 int i; 2042 2043 for (i = 0; i < adapter->num_rx_queues; i++) 2044 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter); 2045} 2046 2047 2048/* 2049 * Set up driver_shared based on settings in adapter. 2050 */ 2051 2052static void 2053vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 2054{ 2055 struct Vmxnet3_DriverShared *shared = adapter->shared; 2056 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 2057 struct Vmxnet3_TxQueueConf *tqc; 2058 struct Vmxnet3_RxQueueConf *rqc; 2059 int i; 2060 2061 memset(shared, 0, sizeof(*shared)); 2062 2063 /* driver settings */ 2064 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 2065 devRead->misc.driverInfo.version = cpu_to_le32( 2066 VMXNET3_DRIVER_VERSION_NUM); 2067 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 2068 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 2069 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 2070 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 2071 *((u32 *)&devRead->misc.driverInfo.gos)); 2072 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 2073 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 2074 2075 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 2076 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 2077 2078 /* set up feature flags */ 2079 if (adapter->rxcsum) 2080 devRead->misc.uptFeatures |= UPT1_F_RXCSUM; 2081 2082 if (adapter->lro) { 2083 devRead->misc.uptFeatures |= UPT1_F_LRO; 2084 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2085 } 2086 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && 2087 adapter->vlan_grp) { 2088 devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2089 } 2090 2091 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2092 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2093 devRead->misc.queueDescLen = cpu_to_le32( 2094 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) + 2095 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc)); 2096 2097 /* tx queue settings */ 2098 devRead->misc.numTxQueues = adapter->num_tx_queues; 2099 for (i = 0; i < adapter->num_tx_queues; i++) { 2100 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 2101 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL); 2102 tqc = &adapter->tqd_start[i].conf; 2103 tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA); 2104 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA); 2105 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA); 2106 tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info)); 2107 tqc->txRingSize = cpu_to_le32(tq->tx_ring.size); 2108 tqc->dataRingSize = cpu_to_le32(tq->data_ring.size); 2109 tqc->compRingSize = cpu_to_le32(tq->comp_ring.size); 2110 tqc->ddLen = cpu_to_le32( 2111 sizeof(struct vmxnet3_tx_buf_info) * 2112 tqc->txRingSize); 2113 tqc->intrIdx = tq->comp_ring.intr_idx; 2114 } 2115 2116 /* rx queue settings */ 2117 devRead->misc.numRxQueues = adapter->num_rx_queues; 2118 for (i = 0; i < adapter->num_rx_queues; i++) { 2119 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 2120 rqc = &adapter->rqd_start[i].conf; 2121 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA); 2122 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA); 2123 rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA); 2124 rqc->ddPA = cpu_to_le64(virt_to_phys( 2125 rq->buf_info)); 2126 rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size); 2127 rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size); 2128 rqc->compRingSize = cpu_to_le32(rq->comp_ring.size); 2129 rqc->ddLen = cpu_to_le32( 2130 sizeof(struct vmxnet3_rx_buf_info) * 2131 (rqc->rxRingSize[0] + 2132 rqc->rxRingSize[1])); 2133 rqc->intrIdx = rq->comp_ring.intr_idx; 2134 } 2135 2136#ifdef VMXNET3_RSS 2137 memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf)); 2138 2139 if (adapter->rss) { 2140 struct UPT1_RSSConf *rssConf = adapter->rss_conf; 2141 devRead->misc.uptFeatures |= UPT1_F_RSS; 2142 devRead->misc.numRxQueues = adapter->num_rx_queues; 2143 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 | 2144 UPT1_RSS_HASH_TYPE_IPV4 | 2145 UPT1_RSS_HASH_TYPE_TCP_IPV6 | 2146 UPT1_RSS_HASH_TYPE_IPV6; 2147 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ; 2148 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE; 2149 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE; 2150 get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize); 2151 for (i = 0; i < rssConf->indTableSize; i++) 2152 rssConf->indTable[i] = i % adapter->num_rx_queues; 2153 2154 devRead->rssConfDesc.confVer = 1; 2155 devRead->rssConfDesc.confLen = sizeof(*rssConf); 2156 devRead->rssConfDesc.confPA = virt_to_phys(rssConf); 2157 } 2158 2159#endif /* VMXNET3_RSS */ 2160 2161 /* intr settings */ 2162 devRead->intrConf.autoMask = adapter->intr.mask_mode == 2163 VMXNET3_IMM_AUTO; 2164 devRead->intrConf.numIntrs = adapter->intr.num_intrs; 2165 for (i = 0; i < adapter->intr.num_intrs; i++) 2166 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 2167 2168 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 2169 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL); 2170 2171 /* rx filter settings */ 2172 devRead->rxFilterConf.rxMode = 0; 2173 vmxnet3_restore_vlan(adapter); 2174 vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr); 2175 2176 /* the rest are already zeroed */ 2177} 2178 2179 2180int 2181vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 2182{ 2183 int err, i; 2184 u32 ret; 2185 2186 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 2187 " ring sizes %u %u %u\n", adapter->netdev->name, 2188 adapter->skb_buf_size, adapter->rx_buf_per_pkt, 2189 adapter->tx_queue[0].tx_ring.size, 2190 adapter->rx_queue[0].rx_ring[0].size, 2191 adapter->rx_queue[0].rx_ring[1].size); 2192 2193 vmxnet3_tq_init_all(adapter); 2194 err = vmxnet3_rq_init_all(adapter); 2195 if (err) { 2196 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 2197 adapter->netdev->name, err); 2198 goto rq_err; 2199 } 2200 2201 err = vmxnet3_request_irqs(adapter); 2202 if (err) { 2203 printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 2204 adapter->netdev->name, err); 2205 goto irq_err; 2206 } 2207 2208 vmxnet3_setup_driver_shared(adapter); 2209 2210 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 2211 adapter->shared_pa)); 2212 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2213 adapter->shared_pa)); 2214 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2215 VMXNET3_CMD_ACTIVATE_DEV); 2216 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2217 2218 if (ret != 0) { 2219 printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2220 adapter->netdev->name, ret); 2221 err = -EINVAL; 2222 goto activate_err; 2223 } 2224 2225 for (i = 0; i < adapter->num_rx_queues; i++) { 2226 VMXNET3_WRITE_BAR0_REG(adapter, 2227 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN, 2228 adapter->rx_queue[i].rx_ring[0].next2fill); 2229 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 + 2230 (i * VMXNET3_REG_ALIGN)), 2231 adapter->rx_queue[i].rx_ring[1].next2fill); 2232 } 2233 2234 /* Apply the rx filter settins last. */ 2235 vmxnet3_set_mc(adapter->netdev); 2236 2237 /* 2238 * Check link state when first activating device. It will start the 2239 * tx queue if the link is up. 2240 */ 2241 vmxnet3_check_link(adapter, true); 2242 for (i = 0; i < adapter->num_rx_queues; i++) 2243 napi_enable(&adapter->rx_queue[i].napi); 2244 vmxnet3_enable_all_intrs(adapter); 2245 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2246 return 0; 2247 2248activate_err: 2249 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 2250 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 2251 vmxnet3_free_irqs(adapter); 2252irq_err: 2253rq_err: 2254 /* free up buffers we allocated */ 2255 vmxnet3_rq_cleanup_all(adapter); 2256 return err; 2257} 2258 2259 2260void 2261vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2262{ 2263 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 2264} 2265 2266 2267int 2268vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2269{ 2270 int i; 2271 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2272 return 0; 2273 2274 2275 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2276 VMXNET3_CMD_QUIESCE_DEV); 2277 vmxnet3_disable_all_intrs(adapter); 2278 2279 for (i = 0; i < adapter->num_rx_queues; i++) 2280 napi_disable(&adapter->rx_queue[i].napi); 2281 netif_tx_disable(adapter->netdev); 2282 adapter->link_speed = 0; 2283 netif_carrier_off(adapter->netdev); 2284 2285 vmxnet3_tq_cleanup_all(adapter); 2286 vmxnet3_rq_cleanup_all(adapter); 2287 vmxnet3_free_irqs(adapter); 2288 return 0; 2289} 2290 2291 2292static void 2293vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2294{ 2295 u32 tmp; 2296 2297 tmp = *(u32 *)mac; 2298 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 2299 2300 tmp = (mac[5] << 8) | mac[4]; 2301 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 2302} 2303 2304 2305static int 2306vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 2307{ 2308 struct sockaddr *addr = p; 2309 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2310 2311 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2312 vmxnet3_write_mac_addr(adapter, addr->sa_data); 2313 2314 return 0; 2315} 2316 2317 2318/* ==================== initialization and cleanup routines ============ */ 2319 2320static int 2321vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 2322{ 2323 int err; 2324 unsigned long mmio_start, mmio_len; 2325 struct pci_dev *pdev = adapter->pdev; 2326 2327 err = pci_enable_device(pdev); 2328 if (err) { 2329 printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 2330 pci_name(pdev), err); 2331 return err; 2332 } 2333 2334 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 2335 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 2336 printk(KERN_ERR "pci_set_consistent_dma_mask failed " 2337 "for adapter %s\n", pci_name(pdev)); 2338 err = -EIO; 2339 goto err_set_mask; 2340 } 2341 *dma64 = true; 2342 } else { 2343 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2344 printk(KERN_ERR "pci_set_dma_mask failed for adapter " 2345 "%s\n", pci_name(pdev)); 2346 err = -EIO; 2347 goto err_set_mask; 2348 } 2349 *dma64 = false; 2350 } 2351 2352 err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2353 vmxnet3_driver_name); 2354 if (err) { 2355 printk(KERN_ERR "Failed to request region for adapter %s: " 2356 "error %d\n", pci_name(pdev), err); 2357 goto err_set_mask; 2358 } 2359 2360 pci_set_master(pdev); 2361 2362 mmio_start = pci_resource_start(pdev, 0); 2363 mmio_len = pci_resource_len(pdev, 0); 2364 adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2365 if (!adapter->hw_addr0) { 2366 printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2367 pci_name(pdev)); 2368 err = -EIO; 2369 goto err_ioremap; 2370 } 2371 2372 mmio_start = pci_resource_start(pdev, 1); 2373 mmio_len = pci_resource_len(pdev, 1); 2374 adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2375 if (!adapter->hw_addr1) { 2376 printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2377 pci_name(pdev)); 2378 err = -EIO; 2379 goto err_bar1; 2380 } 2381 return 0; 2382 2383err_bar1: 2384 iounmap(adapter->hw_addr0); 2385err_ioremap: 2386 pci_release_selected_regions(pdev, (1 << 2) - 1); 2387err_set_mask: 2388 pci_disable_device(pdev); 2389 return err; 2390} 2391 2392 2393static void 2394vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2395{ 2396 BUG_ON(!adapter->pdev); 2397 2398 iounmap(adapter->hw_addr0); 2399 iounmap(adapter->hw_addr1); 2400 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2401 pci_disable_device(adapter->pdev); 2402} 2403 2404 2405static void 2406vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2407{ 2408 size_t sz, i, ring0_size, ring1_size, comp_size; 2409 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0]; 2410 2411 2412 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2413 VMXNET3_MAX_ETH_HDR_SIZE) { 2414 adapter->skb_buf_size = adapter->netdev->mtu + 2415 VMXNET3_MAX_ETH_HDR_SIZE; 2416 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2417 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2418 2419 adapter->rx_buf_per_pkt = 1; 2420 } else { 2421 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2422 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2423 VMXNET3_MAX_ETH_HDR_SIZE; 2424 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2425 } 2426 2427 /* 2428 * for simplicity, force the ring0 size to be a multiple of 2429 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2430 */ 2431 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2432 ring0_size = adapter->rx_queue[0].rx_ring[0].size; 2433 ring0_size = (ring0_size + sz - 1) / sz * sz; 2434 ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE / 2435 sz * sz); 2436 ring1_size = adapter->rx_queue[0].rx_ring[1].size; 2437 comp_size = ring0_size + ring1_size; 2438 2439 for (i = 0; i < adapter->num_rx_queues; i++) { 2440 rq = &adapter->rx_queue[i]; 2441 rq->rx_ring[0].size = ring0_size; 2442 rq->rx_ring[1].size = ring1_size; 2443 rq->comp_ring.size = comp_size; 2444 } 2445} 2446 2447 2448int 2449vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2450 u32 rx_ring_size, u32 rx_ring2_size) 2451{ 2452 int err = 0, i; 2453 2454 for (i = 0; i < adapter->num_tx_queues; i++) { 2455 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i]; 2456 tq->tx_ring.size = tx_ring_size; 2457 tq->data_ring.size = tx_ring_size; 2458 tq->comp_ring.size = tx_ring_size; 2459 tq->shared = &adapter->tqd_start[i].ctrl; 2460 tq->stopped = true; 2461 tq->adapter = adapter; 2462 tq->qid = i; 2463 err = vmxnet3_tq_create(tq, adapter); 2464 /* 2465 * Too late to change num_tx_queues. We cannot do away with 2466 * lesser number of queues than what we asked for 2467 */ 2468 if (err) 2469 goto queue_err; 2470 } 2471 2472 adapter->rx_queue[0].rx_ring[0].size = rx_ring_size; 2473 adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size; 2474 vmxnet3_adjust_rx_ring_size(adapter); 2475 for (i = 0; i < adapter->num_rx_queues; i++) { 2476 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i]; 2477 /* qid and qid2 for rx queues will be assigned later when num 2478 * of rx queues is finalized after allocating intrs */ 2479 rq->shared = &adapter->rqd_start[i].ctrl; 2480 rq->adapter = adapter; 2481 err = vmxnet3_rq_create(rq, adapter); 2482 if (err) { 2483 if (i == 0) { 2484 printk(KERN_ERR "Could not allocate any rx" 2485 "queues. Aborting.\n"); 2486 goto queue_err; 2487 } else { 2488 printk(KERN_INFO "Number of rx queues changed " 2489 "to : %d.\n", i); 2490 adapter->num_rx_queues = i; 2491 err = 0; 2492 break; 2493 } 2494 } 2495 } 2496 return err; 2497queue_err: 2498 vmxnet3_tq_destroy_all(adapter); 2499 return err; 2500} 2501 2502static int 2503vmxnet3_open(struct net_device *netdev) 2504{ 2505 struct vmxnet3_adapter *adapter; 2506 int err, i; 2507 2508 adapter = netdev_priv(netdev); 2509 2510 for (i = 0; i < adapter->num_tx_queues; i++) 2511 spin_lock_init(&adapter->tx_queue[i].tx_lock); 2512 2513 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2514 VMXNET3_DEF_RX_RING_SIZE, 2515 VMXNET3_DEF_RX_RING_SIZE); 2516 if (err) 2517 goto queue_err; 2518 2519 err = vmxnet3_activate_dev(adapter); 2520 if (err) 2521 goto activate_err; 2522 2523 return 0; 2524 2525activate_err: 2526 vmxnet3_rq_destroy_all(adapter); 2527 vmxnet3_tq_destroy_all(adapter); 2528queue_err: 2529 return err; 2530} 2531 2532 2533static int 2534vmxnet3_close(struct net_device *netdev) 2535{ 2536 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2537 2538 /* 2539 * Reset_work may be in the middle of resetting the device, wait for its 2540 * completion. 2541 */ 2542 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2543 msleep(1); 2544 2545 vmxnet3_quiesce_dev(adapter); 2546 2547 vmxnet3_rq_destroy_all(adapter); 2548 vmxnet3_tq_destroy_all(adapter); 2549 2550 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2551 2552 2553 return 0; 2554} 2555 2556 2557void 2558vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2559{ 2560 int i; 2561 2562 /* 2563 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2564 * vmxnet3_close() will deadlock. 2565 */ 2566 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2567 2568 /* we need to enable NAPI, otherwise dev_close will deadlock */ 2569 for (i = 0; i < adapter->num_rx_queues; i++) 2570 napi_enable(&adapter->rx_queue[i].napi); 2571 dev_close(adapter->netdev); 2572} 2573 2574 2575static int 2576vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2577{ 2578 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2579 int err = 0; 2580 2581 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2582 return -EINVAL; 2583 2584 if (new_mtu > 1500 && !adapter->jumbo_frame) 2585 return -EINVAL; 2586 2587 netdev->mtu = new_mtu; 2588 2589 /* 2590 * Reset_work may be in the middle of resetting the device, wait for its 2591 * completion. 2592 */ 2593 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2594 msleep(1); 2595 2596 if (netif_running(netdev)) { 2597 vmxnet3_quiesce_dev(adapter); 2598 vmxnet3_reset_dev(adapter); 2599 2600 /* we need to re-create the rx queue based on the new mtu */ 2601 vmxnet3_rq_destroy_all(adapter); 2602 vmxnet3_adjust_rx_ring_size(adapter); 2603 err = vmxnet3_rq_create_all(adapter); 2604 if (err) { 2605 printk(KERN_ERR "%s: failed to re-create rx queues," 2606 " error %d. Closing it.\n", netdev->name, err); 2607 goto out; 2608 } 2609 2610 err = vmxnet3_activate_dev(adapter); 2611 if (err) { 2612 printk(KERN_ERR "%s: failed to re-activate, error %d. " 2613 "Closing it\n", netdev->name, err); 2614 goto out; 2615 } 2616 } 2617 2618out: 2619 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2620 if (err) 2621 vmxnet3_force_close(adapter); 2622 2623 return err; 2624} 2625 2626 2627static void 2628vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2629{ 2630 struct net_device *netdev = adapter->netdev; 2631 2632 netdev->features = NETIF_F_SG | 2633 NETIF_F_HW_CSUM | 2634 NETIF_F_HW_VLAN_TX | 2635 NETIF_F_HW_VLAN_RX | 2636 NETIF_F_HW_VLAN_FILTER | 2637 NETIF_F_TSO | 2638 NETIF_F_TSO6 | 2639 NETIF_F_LRO; 2640 2641 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro"); 2642 2643 adapter->rxcsum = true; 2644 adapter->jumbo_frame = true; 2645 adapter->lro = true; 2646 2647 if (dma64) { 2648 netdev->features |= NETIF_F_HIGHDMA; 2649 printk(" highDMA"); 2650 } 2651 2652 netdev->vlan_features = netdev->features; 2653 printk("\n"); 2654} 2655 2656 2657static void 2658vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2659{ 2660 u32 tmp; 2661 2662 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2663 *(u32 *)mac = tmp; 2664 2665 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2666 mac[4] = tmp & 0xff; 2667 mac[5] = (tmp >> 8) & 0xff; 2668} 2669 2670#ifdef CONFIG_PCI_MSI 2671 2672/* 2673 * Enable MSIx vectors. 2674 * Returns : 2675 * 0 on successful enabling of required vectors, 2676 * VMXNET3_LINUX_MIN_MSIX_VECT when only minumum number of vectors required 2677 * could be enabled. 2678 * number of vectors which can be enabled otherwise (this number is smaller 2679 * than VMXNET3_LINUX_MIN_MSIX_VECT) 2680 */ 2681 2682static int 2683vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, 2684 int vectors) 2685{ 2686 int err = 0, vector_threshold; 2687 vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT; 2688 2689 while (vectors >= vector_threshold) { 2690 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 2691 vectors); 2692 if (!err) { 2693 adapter->intr.num_intrs = vectors; 2694 return 0; 2695 } else if (err < 0) { 2696 printk(KERN_ERR "Failed to enable MSI-X for %s, error" 2697 " %d\n", adapter->netdev->name, err); 2698 vectors = 0; 2699 } else if (err < vector_threshold) { 2700 break; 2701 } else { 2702 /* If fails to enable required number of MSI-x vectors 2703 * try enabling 3 of them. One each for rx, tx and event 2704 */ 2705 vectors = vector_threshold; 2706 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 2707 " %d instead\n", vectors, adapter->netdev->name, 2708 vector_threshold); 2709 } 2710 } 2711 2712 printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi" 2713 " are lower than min threshold required.\n"); 2714 return err; 2715} 2716 2717 2718#endif /* CONFIG_PCI_MSI */ 2719 2720static void 2721vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2722{ 2723 u32 cfg; 2724 2725 /* intr settings */ 2726 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2727 VMXNET3_CMD_GET_CONF_INTR); 2728 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2729 adapter->intr.type = cfg & 0x3; 2730 adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2731 2732 if (adapter->intr.type == VMXNET3_IT_AUTO) { 2733 adapter->intr.type = VMXNET3_IT_MSIX; 2734 } 2735 2736#ifdef CONFIG_PCI_MSI 2737 if (adapter->intr.type == VMXNET3_IT_MSIX) { 2738 int vector, err = 0; 2739 2740 adapter->intr.num_intrs = (adapter->share_intr == 2741 VMXNET3_INTR_TXSHARE) ? 1 : 2742 adapter->num_tx_queues; 2743 adapter->intr.num_intrs += (adapter->share_intr == 2744 VMXNET3_INTR_BUDDYSHARE) ? 0 : 2745 adapter->num_rx_queues; 2746 adapter->intr.num_intrs += 1; /* for link event */ 2747 2748 adapter->intr.num_intrs = (adapter->intr.num_intrs > 2749 VMXNET3_LINUX_MIN_MSIX_VECT 2750 ? adapter->intr.num_intrs : 2751 VMXNET3_LINUX_MIN_MSIX_VECT); 2752 2753 for (vector = 0; vector < adapter->intr.num_intrs; vector++) 2754 adapter->intr.msix_entries[vector].entry = vector; 2755 2756 err = vmxnet3_acquire_msix_vectors(adapter, 2757 adapter->intr.num_intrs); 2758 /* If we cannot allocate one MSIx vector per queue 2759 * then limit the number of rx queues to 1 2760 */ 2761 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 2762 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 2763 || adapter->num_rx_queues != 2) { 2764 adapter->share_intr = VMXNET3_INTR_TXSHARE; 2765 printk(KERN_ERR "Number of rx queues : 1\n"); 2766 adapter->num_rx_queues = 1; 2767 adapter->intr.num_intrs = 2768 VMXNET3_LINUX_MIN_MSIX_VECT; 2769 } 2770 return; 2771 } 2772 if (!err) 2773 return; 2774 2775 /* If we cannot allocate MSIx vectors use only one rx queue */ 2776 printk(KERN_INFO "Failed to enable MSI-X for %s, error %d." 2777 "#rx queues : 1, try MSI\n", adapter->netdev->name, err); 2778 2779 adapter->intr.type = VMXNET3_IT_MSI; 2780 } 2781 2782 if (adapter->intr.type == VMXNET3_IT_MSI) { 2783 int err; 2784 err = pci_enable_msi(adapter->pdev); 2785 if (!err) { 2786 adapter->num_rx_queues = 1; 2787 adapter->intr.num_intrs = 1; 2788 return; 2789 } 2790 } 2791#endif /* CONFIG_PCI_MSI */ 2792 2793 adapter->num_rx_queues = 1; 2794 printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n"); 2795 adapter->intr.type = VMXNET3_IT_INTX; 2796 2797 /* INT-X related setting */ 2798 adapter->intr.num_intrs = 1; 2799} 2800 2801 2802static void 2803vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2804{ 2805 if (adapter->intr.type == VMXNET3_IT_MSIX) 2806 pci_disable_msix(adapter->pdev); 2807 else if (adapter->intr.type == VMXNET3_IT_MSI) 2808 pci_disable_msi(adapter->pdev); 2809 else 2810 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2811} 2812 2813 2814static void 2815vmxnet3_tx_timeout(struct net_device *netdev) 2816{ 2817 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2818 adapter->tx_timeout_count++; 2819 2820 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2821 schedule_work(&adapter->work); 2822 netif_wake_queue(adapter->netdev); 2823} 2824 2825 2826static void 2827vmxnet3_reset_work(struct work_struct *data) 2828{ 2829 struct vmxnet3_adapter *adapter; 2830 2831 adapter = container_of(data, struct vmxnet3_adapter, work); 2832 2833 /* if another thread is resetting the device, no need to proceed */ 2834 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2835 return; 2836 2837 /* if the device is closed, we must leave it alone */ 2838 rtnl_lock(); 2839 if (netif_running(adapter->netdev)) { 2840 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2841 vmxnet3_quiesce_dev(adapter); 2842 vmxnet3_reset_dev(adapter); 2843 vmxnet3_activate_dev(adapter); 2844 } else { 2845 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2846 } 2847 rtnl_unlock(); 2848 2849 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2850} 2851 2852 2853static int __devinit 2854vmxnet3_probe_device(struct pci_dev *pdev, 2855 const struct pci_device_id *id) 2856{ 2857 static const struct net_device_ops vmxnet3_netdev_ops = { 2858 .ndo_open = vmxnet3_open, 2859 .ndo_stop = vmxnet3_close, 2860 .ndo_start_xmit = vmxnet3_xmit_frame, 2861 .ndo_set_mac_address = vmxnet3_set_mac_addr, 2862 .ndo_change_mtu = vmxnet3_change_mtu, 2863 .ndo_get_stats = vmxnet3_get_stats, 2864 .ndo_tx_timeout = vmxnet3_tx_timeout, 2865 .ndo_set_multicast_list = vmxnet3_set_mc, 2866 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2867 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2868 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2869#ifdef CONFIG_NET_POLL_CONTROLLER 2870 .ndo_poll_controller = vmxnet3_netpoll, 2871#endif 2872 }; 2873 int err; 2874 bool dma64 = false; /* stupid gcc */ 2875 u32 ver; 2876 struct net_device *netdev; 2877 struct vmxnet3_adapter *adapter; 2878 u8 mac[ETH_ALEN]; 2879 int size; 2880 int num_tx_queues; 2881 int num_rx_queues; 2882 2883#ifdef VMXNET3_RSS 2884 if (enable_mq) 2885 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 2886 (int)num_online_cpus()); 2887 else 2888#endif 2889 num_rx_queues = 1; 2890 2891 if (enable_mq) 2892 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES, 2893 (int)num_online_cpus()); 2894 else 2895 num_tx_queues = 1; 2896 2897 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter), 2898 max(num_tx_queues, num_rx_queues)); 2899 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n", 2900 num_tx_queues, num_rx_queues); 2901 2902 if (!netdev) { 2903 printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2904 "%s\n", pci_name(pdev)); 2905 return -ENOMEM; 2906 } 2907 2908 pci_set_drvdata(pdev, netdev); 2909 adapter = netdev_priv(netdev); 2910 adapter->netdev = netdev; 2911 adapter->pdev = pdev; 2912 2913 adapter->shared = pci_alloc_consistent(adapter->pdev, 2914 sizeof(struct Vmxnet3_DriverShared), 2915 &adapter->shared_pa); 2916 if (!adapter->shared) { 2917 printk(KERN_ERR "Failed to allocate memory for %s\n", 2918 pci_name(pdev)); 2919 err = -ENOMEM; 2920 goto err_alloc_shared; 2921 } 2922 2923 adapter->num_rx_queues = num_rx_queues; 2924 adapter->num_tx_queues = num_tx_queues; 2925 2926 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 2927 size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; 2928 adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size, 2929 &adapter->queue_desc_pa); 2930 2931 if (!adapter->tqd_start) { 2932 printk(KERN_ERR "Failed to allocate memory for %s\n", 2933 pci_name(pdev)); 2934 err = -ENOMEM; 2935 goto err_alloc_queue_desc; 2936 } 2937 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start + 2938 adapter->num_tx_queues); 2939 2940 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2941 if (adapter->pm_conf == NULL) { 2942 printk(KERN_ERR "Failed to allocate memory for %s\n", 2943 pci_name(pdev)); 2944 err = -ENOMEM; 2945 goto err_alloc_pm; 2946 } 2947 2948#ifdef VMXNET3_RSS 2949 2950 adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL); 2951 if (adapter->rss_conf == NULL) { 2952 printk(KERN_ERR "Failed to allocate memory for %s\n", 2953 pci_name(pdev)); 2954 err = -ENOMEM; 2955 goto err_alloc_rss; 2956 } 2957#endif /* VMXNET3_RSS */ 2958 2959 err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2960 if (err < 0) 2961 goto err_alloc_pci; 2962 2963 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2964 if (ver & 1) { 2965 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2966 } else { 2967 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2968 " %s\n", ver, pci_name(pdev)); 2969 err = -EBUSY; 2970 goto err_ver; 2971 } 2972 2973 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2974 if (ver & 1) { 2975 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2976 } else { 2977 printk(KERN_ERR "Incompatible upt version (0x%x) for " 2978 "adapter %s\n", ver, pci_name(pdev)); 2979 err = -EBUSY; 2980 goto err_ver; 2981 } 2982 2983 vmxnet3_declare_features(adapter, dma64); 2984 2985 adapter->dev_number = atomic_read(&devices_found); 2986 2987 adapter->share_intr = irq_share_mode; 2988 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE && 2989 adapter->num_tx_queues != adapter->num_rx_queues) 2990 adapter->share_intr = VMXNET3_INTR_DONTSHARE; 2991 2992 vmxnet3_alloc_intr_resources(adapter); 2993 2994#ifdef VMXNET3_RSS 2995 if (adapter->num_rx_queues > 1 && 2996 adapter->intr.type == VMXNET3_IT_MSIX) { 2997 adapter->rss = true; 2998 printk(KERN_INFO "RSS is enabled.\n"); 2999 } else { 3000 adapter->rss = false; 3001 } 3002#endif 3003 3004 vmxnet3_read_mac_addr(adapter, mac); 3005 memcpy(netdev->dev_addr, mac, netdev->addr_len); 3006 3007 netdev->netdev_ops = &vmxnet3_netdev_ops; 3008 vmxnet3_set_ethtool_ops(netdev); 3009 netdev->watchdog_timeo = 5 * HZ; 3010 3011 INIT_WORK(&adapter->work, vmxnet3_reset_work); 3012 3013 if (adapter->intr.type == VMXNET3_IT_MSIX) { 3014 int i; 3015 for (i = 0; i < adapter->num_rx_queues; i++) { 3016 netif_napi_add(adapter->netdev, 3017 &adapter->rx_queue[i].napi, 3018 vmxnet3_poll_rx_only, 64); 3019 } 3020 } else { 3021 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi, 3022 vmxnet3_poll, 64); 3023 } 3024 3025 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues); 3026 netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues); 3027 3028 SET_NETDEV_DEV(netdev, &pdev->dev); 3029 err = register_netdev(netdev); 3030 3031 if (err) { 3032 printk(KERN_ERR "Failed to register adapter %s\n", 3033 pci_name(pdev)); 3034 goto err_register; 3035 } 3036 3037 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 3038 vmxnet3_check_link(adapter, false); 3039 atomic_inc(&devices_found); 3040 return 0; 3041 3042err_register: 3043 vmxnet3_free_intr_resources(adapter); 3044err_ver: 3045 vmxnet3_free_pci_resources(adapter); 3046err_alloc_pci: 3047#ifdef VMXNET3_RSS 3048 kfree(adapter->rss_conf); 3049err_alloc_rss: 3050#endif 3051 kfree(adapter->pm_conf); 3052err_alloc_pm: 3053 pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 3054 adapter->queue_desc_pa); 3055err_alloc_queue_desc: 3056 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3057 adapter->shared, adapter->shared_pa); 3058err_alloc_shared: 3059 pci_set_drvdata(pdev, NULL); 3060 free_netdev(netdev); 3061 return err; 3062} 3063 3064 3065static void __devexit 3066vmxnet3_remove_device(struct pci_dev *pdev) 3067{ 3068 struct net_device *netdev = pci_get_drvdata(pdev); 3069 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3070 int size = 0; 3071 int num_rx_queues; 3072 3073#ifdef VMXNET3_RSS 3074 if (enable_mq) 3075 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES, 3076 (int)num_online_cpus()); 3077 else 3078#endif 3079 num_rx_queues = 1; 3080 3081 cancel_work_sync(&adapter->work); 3082 3083 unregister_netdev(netdev); 3084 3085 vmxnet3_free_intr_resources(adapter); 3086 vmxnet3_free_pci_resources(adapter); 3087#ifdef VMXNET3_RSS 3088 kfree(adapter->rss_conf); 3089#endif 3090 kfree(adapter->pm_conf); 3091 3092 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; 3093 size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues; 3094 pci_free_consistent(adapter->pdev, size, adapter->tqd_start, 3095 adapter->queue_desc_pa); 3096 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 3097 adapter->shared, adapter->shared_pa); 3098 free_netdev(netdev); 3099} 3100 3101 3102#ifdef CONFIG_PM 3103 3104static int 3105vmxnet3_suspend(struct device *device) 3106{ 3107 struct pci_dev *pdev = to_pci_dev(device); 3108 struct net_device *netdev = pci_get_drvdata(pdev); 3109 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3110 struct Vmxnet3_PMConf *pmConf; 3111 struct ethhdr *ehdr; 3112 struct arphdr *ahdr; 3113 u8 *arpreq; 3114 struct in_device *in_dev; 3115 struct in_ifaddr *ifa; 3116 int i = 0; 3117 3118 if (!netif_running(netdev)) 3119 return 0; 3120 3121 vmxnet3_disable_all_intrs(adapter); 3122 vmxnet3_free_irqs(adapter); 3123 vmxnet3_free_intr_resources(adapter); 3124 3125 netif_device_detach(netdev); 3126 netif_tx_stop_all_queues(netdev); 3127 3128 /* Create wake-up filters. */ 3129 pmConf = adapter->pm_conf; 3130 memset(pmConf, 0, sizeof(*pmConf)); 3131 3132 if (adapter->wol & WAKE_UCAST) { 3133 pmConf->filters[i].patternSize = ETH_ALEN; 3134 pmConf->filters[i].maskSize = 1; 3135 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 3136 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 3137 3138 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3139 i++; 3140 } 3141 3142 if (adapter->wol & WAKE_ARP) { 3143 in_dev = in_dev_get(netdev); 3144 if (!in_dev) 3145 goto skip_arp; 3146 3147 ifa = (struct in_ifaddr *)in_dev->ifa_list; 3148 if (!ifa) 3149 goto skip_arp; 3150 3151 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 3152 sizeof(struct arphdr) + /* ARP header */ 3153 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 3154 2 * sizeof(u32); /*2 IPv4 addresses */ 3155 pmConf->filters[i].maskSize = 3156 (pmConf->filters[i].patternSize - 1) / 8 + 1; 3157 3158 /* ETH_P_ARP in Ethernet header. */ 3159 ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 3160 ehdr->h_proto = htons(ETH_P_ARP); 3161 3162 /* ARPOP_REQUEST in ARP header. */ 3163 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 3164 ahdr->ar_op = htons(ARPOP_REQUEST); 3165 arpreq = (u8 *)(ahdr + 1); 3166 3167 /* The Unicast IPv4 address in 'tip' field. */ 3168 arpreq += 2 * ETH_ALEN + sizeof(u32); 3169 *(u32 *)arpreq = ifa->ifa_address; 3170 3171 /* The mask for the relevant bits. */ 3172 pmConf->filters[i].mask[0] = 0x00; 3173 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 3174 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 3175 pmConf->filters[i].mask[3] = 0x00; 3176 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 3177 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 3178 in_dev_put(in_dev); 3179 3180 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; 3181 i++; 3182 } 3183 3184skip_arp: 3185 if (adapter->wol & WAKE_MAGIC) 3186 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; 3187 3188 pmConf->numFilters = i; 3189 3190 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3191 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3192 *pmConf)); 3193 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3194 pmConf)); 3195 3196 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3197 VMXNET3_CMD_UPDATE_PMCFG); 3198 3199 pci_save_state(pdev); 3200 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3201 adapter->wol); 3202 pci_disable_device(pdev); 3203 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 3204 3205 return 0; 3206} 3207 3208 3209static int 3210vmxnet3_resume(struct device *device) 3211{ 3212 int err; 3213 struct pci_dev *pdev = to_pci_dev(device); 3214 struct net_device *netdev = pci_get_drvdata(pdev); 3215 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3216 struct Vmxnet3_PMConf *pmConf; 3217 3218 if (!netif_running(netdev)) 3219 return 0; 3220 3221 /* Destroy wake-up filters. */ 3222 pmConf = adapter->pm_conf; 3223 memset(pmConf, 0, sizeof(*pmConf)); 3224 3225 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 3226 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 3227 *pmConf)); 3228 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3229 pmConf)); 3230 3231 netif_device_attach(netdev); 3232 pci_set_power_state(pdev, PCI_D0); 3233 pci_restore_state(pdev); 3234 err = pci_enable_device_mem(pdev); 3235 if (err != 0) 3236 return err; 3237 3238 pci_enable_wake(pdev, PCI_D0, 0); 3239 3240 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3241 VMXNET3_CMD_UPDATE_PMCFG); 3242 vmxnet3_alloc_intr_resources(adapter); 3243 vmxnet3_request_irqs(adapter); 3244 vmxnet3_enable_all_intrs(adapter); 3245 3246 return 0; 3247} 3248 3249static const struct dev_pm_ops vmxnet3_pm_ops = { 3250 .suspend = vmxnet3_suspend, 3251 .resume = vmxnet3_resume, 3252}; 3253#endif 3254 3255static struct pci_driver vmxnet3_driver = { 3256 .name = vmxnet3_driver_name, 3257 .id_table = vmxnet3_pciid_table, 3258 .probe = vmxnet3_probe_device, 3259 .remove = __devexit_p(vmxnet3_remove_device), 3260#ifdef CONFIG_PM 3261 .driver.pm = &vmxnet3_pm_ops, 3262#endif 3263}; 3264 3265 3266static int __init 3267vmxnet3_init_module(void) 3268{ 3269 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 3270 VMXNET3_DRIVER_VERSION_REPORT); 3271 return pci_register_driver(&vmxnet3_driver); 3272} 3273 3274module_init(vmxnet3_init_module); 3275 3276 3277static void 3278vmxnet3_exit_module(void) 3279{ 3280 pci_unregister_driver(&vmxnet3_driver); 3281} 3282 3283module_exit(vmxnet3_exit_module); 3284 3285MODULE_AUTHOR("VMware, Inc."); 3286MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 3287MODULE_LICENSE("GPL v2"); 3288MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 3289