iwl-dev.h revision 2995bafafd4d9d2f840b51b0121997be09fb8b47
1/****************************************************************************** 2 * 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called LICENSE. 20 * 21 * Contact Information: 22 * Intel Linux Wireless <ilw@linux.intel.com> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 *****************************************************************************/ 26/* 27 * Please use this file (iwl-dev.h) for driver implementation definitions. 28 * Please use iwl-commands.h for uCode API definitions. 29 * Please use iwl-4965-hw.h for hardware-related definitions. 30 */ 31 32#ifndef __iwl_dev_h__ 33#define __iwl_dev_h__ 34 35#include <linux/pci.h> /* for struct pci_device_id */ 36#include <linux/kernel.h> 37#include <net/ieee80211_radiotap.h> 38 39#include "iwl-eeprom.h" 40#include "iwl-csr.h" 41#include "iwl-prph.h" 42#include "iwl-fh.h" 43#include "iwl-debug.h" 44#include "iwl-4965-hw.h" 45#include "iwl-3945-hw.h" 46#include "iwl-agn-hw.h" 47#include "iwl-led.h" 48#include "iwl-power.h" 49#include "iwl-agn-rs.h" 50#include "iwl-agn-tt.h" 51 52struct iwl_tx_queue; 53 54/* CT-KILL constants */ 55#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ 56#define CT_KILL_THRESHOLD 114 /* in Celsius */ 57#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */ 58 59/* Default noise level to report when noise measurement is not available. 60 * This may be because we're: 61 * 1) Not associated (4965, no beacon statistics being sent to driver) 62 * 2) Scanning (noise measurement does not apply to associated channel) 63 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) 64 * Use default noise value of -127 ... this is below the range of measurable 65 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. 66 * Also, -127 works better than 0 when averaging frames with/without 67 * noise info (e.g. averaging might be done in app); measured dBm values are 68 * always negative ... using a negative value as the default keeps all 69 * averages within an s8's (used in some apps) range of negative values. */ 70#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) 71 72/* 73 * RTS threshold here is total size [2347] minus 4 FCS bytes 74 * Per spec: 75 * a value of 0 means RTS on all data/management packets 76 * a value > max MSDU size means no RTS 77 * else RTS for data/management frames where MPDU is larger 78 * than RTS value. 79 */ 80#define DEFAULT_RTS_THRESHOLD 2347U 81#define MIN_RTS_THRESHOLD 0U 82#define MAX_RTS_THRESHOLD 2347U 83#define MAX_MSDU_SIZE 2304U 84#define MAX_MPDU_SIZE 2346U 85#define DEFAULT_BEACON_INTERVAL 100U 86#define DEFAULT_SHORT_RETRY_LIMIT 7U 87#define DEFAULT_LONG_RETRY_LIMIT 4U 88 89struct iwl_rx_mem_buffer { 90 dma_addr_t page_dma; 91 struct page *page; 92 struct list_head list; 93}; 94 95#define rxb_addr(r) page_address(r->page) 96 97/* defined below */ 98struct iwl_device_cmd; 99 100struct iwl_cmd_meta { 101 /* only for SYNC commands, iff the reply skb is wanted */ 102 struct iwl_host_cmd *source; 103 /* 104 * only for ASYNC commands 105 * (which is somewhat stupid -- look at iwl-sta.c for instance 106 * which duplicates a bunch of code because the callback isn't 107 * invoked for SYNC commands, if it were and its result passed 108 * through it would be simpler...) 109 */ 110 void (*callback)(struct iwl_priv *priv, 111 struct iwl_device_cmd *cmd, 112 struct iwl_rx_packet *pkt); 113 114 /* The CMD_SIZE_HUGE flag bit indicates that the command 115 * structure is stored at the end of the shared queue memory. */ 116 u32 flags; 117 118 DEFINE_DMA_UNMAP_ADDR(mapping); 119 DEFINE_DMA_UNMAP_LEN(len); 120}; 121 122/* 123 * Generic queue structure 124 * 125 * Contains common data for Rx and Tx queues 126 */ 127struct iwl_queue { 128 int n_bd; /* number of BDs in this queue */ 129 int write_ptr; /* 1-st empty entry (index) host_w*/ 130 int read_ptr; /* last used entry (index) host_r*/ 131 /* use for monitoring and recovering the stuck queue */ 132 int last_read_ptr; /* storing the last read_ptr */ 133 /* number of time read_ptr and last_read_ptr are the same */ 134 u8 repeat_same_read_ptr; 135 dma_addr_t dma_addr; /* physical addr for BD's */ 136 int n_window; /* safe queue window */ 137 u32 id; 138 int low_mark; /* low watermark, resume queue if free 139 * space more than this */ 140 int high_mark; /* high watermark, stop queue if free 141 * space less than this */ 142} __packed; 143 144/* One for each TFD */ 145struct iwl_tx_info { 146 struct sk_buff *skb; 147 struct iwl_rxon_context *ctx; 148}; 149 150/** 151 * struct iwl_tx_queue - Tx Queue for DMA 152 * @q: generic Rx/Tx queue descriptor 153 * @bd: base of circular buffer of TFDs 154 * @cmd: array of command/TX buffer pointers 155 * @meta: array of meta data for each command/tx buffer 156 * @dma_addr_cmd: physical address of cmd/tx buffer array 157 * @txb: array of per-TFD driver data 158 * @need_update: indicates need to update read/write index 159 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled 160 * 161 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame 162 * descriptors) and required locking structures. 163 */ 164#define TFD_TX_CMD_SLOTS 256 165#define TFD_CMD_SLOTS 32 166 167struct iwl_tx_queue { 168 struct iwl_queue q; 169 void *tfds; 170 struct iwl_device_cmd **cmd; 171 struct iwl_cmd_meta *meta; 172 struct iwl_tx_info *txb; 173 u8 need_update; 174 u8 sched_retry; 175 u8 active; 176 u8 swq_id; 177}; 178 179#define IWL_NUM_SCAN_RATES (2) 180 181struct iwl4965_channel_tgd_info { 182 u8 type; 183 s8 max_power; 184}; 185 186struct iwl4965_channel_tgh_info { 187 s64 last_radar_time; 188}; 189 190#define IWL4965_MAX_RATE (33) 191 192struct iwl3945_clip_group { 193 /* maximum power level to prevent clipping for each rate, derived by 194 * us from this band's saturation power in EEPROM */ 195 const s8 clip_powers[IWL_MAX_RATES]; 196}; 197 198/* current Tx power values to use, one for each rate for each channel. 199 * requested power is limited by: 200 * -- regulatory EEPROM limits for this channel 201 * -- hardware capabilities (clip-powers) 202 * -- spectrum management 203 * -- user preference (e.g. iwconfig) 204 * when requested power is set, base power index must also be set. */ 205struct iwl3945_channel_power_info { 206 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 207 s8 power_table_index; /* actual (compenst'd) index into gain table */ 208 s8 base_power_index; /* gain index for power at factory temp. */ 209 s8 requested_power; /* power (dBm) requested for this chnl/rate */ 210}; 211 212/* current scan Tx power values to use, one for each scan rate for each 213 * channel. */ 214struct iwl3945_scan_power_info { 215 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 216 s8 power_table_index; /* actual (compenst'd) index into gain table */ 217 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ 218}; 219 220/* 221 * One for each channel, holds all channel setup data 222 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant 223 * with one another! 224 */ 225struct iwl_channel_info { 226 struct iwl4965_channel_tgd_info tgd; 227 struct iwl4965_channel_tgh_info tgh; 228 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ 229 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for 230 * HT40 channel */ 231 232 u8 channel; /* channel number */ 233 u8 flags; /* flags copied from EEPROM */ 234 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 235 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ 236 s8 min_power; /* always 0 */ 237 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ 238 239 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ 240 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ 241 enum ieee80211_band band; 242 243 /* HT40 channel info */ 244 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 245 u8 ht40_flags; /* flags copied from EEPROM */ 246 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 247 248 /* Radio/DSP gain settings for each "normal" data Tx rate. 249 * These include, in addition to RF and DSP gain, a few fields for 250 * remembering/modifying gain settings (indexes). */ 251 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; 252 253 /* Radio/DSP gain settings for each scan rate, for directed scans. */ 254 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; 255}; 256 257#define IWL_TX_FIFO_BK 0 /* shared */ 258#define IWL_TX_FIFO_BE 1 259#define IWL_TX_FIFO_VI 2 /* shared */ 260#define IWL_TX_FIFO_VO 3 261#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 262#define IWL_TX_FIFO_BE_IPAN 4 263#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 264#define IWL_TX_FIFO_VO_IPAN 5 265#define IWL_TX_FIFO_UNUSED -1 266 267/* Minimum number of queues. MAX_NUM is defined in hw specific files. 268 * Set the minimum to accommodate the 4 standard TX queues, 1 command 269 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */ 270#define IWL_MIN_NUM_QUEUES 10 271 272/* 273 * Command queue depends on iPAN support. 274 */ 275#define IWL_DEFAULT_CMD_QUEUE_NUM 4 276#define IWL_IPAN_CMD_QUEUE_NUM 9 277 278/* 279 * This queue number is required for proper operation 280 * because the ucode will stop/start the scheduler as 281 * required. 282 */ 283#define IWL_IPAN_MCAST_QUEUE 8 284 285/* Power management (not Tx power) structures */ 286 287enum iwl_pwr_src { 288 IWL_PWR_SRC_VMAIN, 289 IWL_PWR_SRC_VAUX, 290}; 291 292#define IEEE80211_DATA_LEN 2304 293#define IEEE80211_4ADDR_LEN 30 294#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) 295#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 296 297struct iwl_frame { 298 union { 299 struct ieee80211_hdr frame; 300 struct iwl_tx_beacon_cmd beacon; 301 u8 raw[IEEE80211_FRAME_LEN]; 302 u8 cmd[360]; 303 } u; 304 struct list_head list; 305}; 306 307#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) 308#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 309#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 310 311enum { 312 CMD_SYNC = 0, 313 CMD_SIZE_NORMAL = 0, 314 CMD_NO_SKB = 0, 315 CMD_SIZE_HUGE = (1 << 0), 316 CMD_ASYNC = (1 << 1), 317 CMD_WANT_SKB = (1 << 2), 318}; 319 320#define DEF_CMD_PAYLOAD_SIZE 320 321 322/** 323 * struct iwl_device_cmd 324 * 325 * For allocation of the command and tx queues, this establishes the overall 326 * size of the largest command we send to uCode, except for a scan command 327 * (which is relatively huge; space is allocated separately). 328 */ 329struct iwl_device_cmd { 330 struct iwl_cmd_header hdr; /* uCode API */ 331 union { 332 u32 flags; 333 u8 val8; 334 u16 val16; 335 u32 val32; 336 struct iwl_tx_cmd tx; 337 struct iwl6000_channel_switch_cmd chswitch; 338 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 339 } __packed cmd; 340} __packed; 341 342#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 343 344 345struct iwl_host_cmd { 346 const void *data; 347 unsigned long reply_page; 348 void (*callback)(struct iwl_priv *priv, 349 struct iwl_device_cmd *cmd, 350 struct iwl_rx_packet *pkt); 351 u32 flags; 352 u16 len; 353 u8 id; 354}; 355 356#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 357#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 358#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 359 360/** 361 * struct iwl_rx_queue - Rx queue 362 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) 363 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) 364 * @read: Shared index to newest available Rx buffer 365 * @write: Shared index to oldest written Rx packet 366 * @free_count: Number of pre-allocated buffers in rx_free 367 * @rx_free: list of free SKBs for use 368 * @rx_used: List of Rx buffers with no SKB 369 * @need_update: flag to indicate we need to update read/write index 370 * @rb_stts: driver's pointer to receive buffer status 371 * @rb_stts_dma: bus address of receive buffer status 372 * 373 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers 374 */ 375struct iwl_rx_queue { 376 __le32 *bd; 377 dma_addr_t bd_dma; 378 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; 379 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; 380 u32 read; 381 u32 write; 382 u32 free_count; 383 u32 write_actual; 384 struct list_head rx_free; 385 struct list_head rx_used; 386 int need_update; 387 struct iwl_rb_status *rb_stts; 388 dma_addr_t rb_stts_dma; 389 spinlock_t lock; 390}; 391 392#define IWL_SUPPORTED_RATES_IE_LEN 8 393 394#define MAX_TID_COUNT 9 395 396#define IWL_INVALID_RATE 0xFF 397#define IWL_INVALID_VALUE -1 398 399/** 400 * struct iwl_ht_agg -- aggregation status while waiting for block-ack 401 * @txq_id: Tx queue used for Tx attempt 402 * @frame_count: # frames attempted by Tx command 403 * @wait_for_ba: Expect block-ack before next Tx reply 404 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window 405 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window 406 * @bitmap1: High order, one bit for each frame pending ACK in Tx window 407 * @rate_n_flags: Rate at which Tx was attempted 408 * 409 * If REPLY_TX indicates that aggregation was attempted, driver must wait 410 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info 411 * until block ack arrives. 412 */ 413struct iwl_ht_agg { 414 u16 txq_id; 415 u16 frame_count; 416 u16 wait_for_ba; 417 u16 start_idx; 418 u64 bitmap; 419 u32 rate_n_flags; 420#define IWL_AGG_OFF 0 421#define IWL_AGG_ON 1 422#define IWL_EMPTYING_HW_QUEUE_ADDBA 2 423#define IWL_EMPTYING_HW_QUEUE_DELBA 3 424 u8 state; 425}; 426 427 428struct iwl_tid_data { 429 u16 seq_number; /* agn only */ 430 u16 tfds_in_queue; 431 struct iwl_ht_agg agg; 432}; 433 434struct iwl_hw_key { 435 u32 cipher; 436 int keylen; 437 u8 keyidx; 438 u8 key[32]; 439}; 440 441union iwl_ht_rate_supp { 442 u16 rates; 443 struct { 444 u8 siso_rate; 445 u8 mimo_rate; 446 }; 447}; 448 449#define CFG_HT_RX_AMPDU_FACTOR_8K (0x0) 450#define CFG_HT_RX_AMPDU_FACTOR_16K (0x1) 451#define CFG_HT_RX_AMPDU_FACTOR_32K (0x2) 452#define CFG_HT_RX_AMPDU_FACTOR_64K (0x3) 453#define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K 454#define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K 455#define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K 456 457/* 458 * Maximal MPDU density for TX aggregation 459 * 4 - 2us density 460 * 5 - 4us density 461 * 6 - 8us density 462 * 7 - 16us density 463 */ 464#define CFG_HT_MPDU_DENSITY_2USEC (0x4) 465#define CFG_HT_MPDU_DENSITY_4USEC (0x5) 466#define CFG_HT_MPDU_DENSITY_8USEC (0x6) 467#define CFG_HT_MPDU_DENSITY_16USEC (0x7) 468#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC 469#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC 470#define CFG_HT_MPDU_DENSITY_MIN (0x1) 471 472struct iwl_ht_config { 473 /* self configuration data */ 474 bool is_ht; 475 bool is_40mhz; 476 bool single_chain_sufficient; 477 enum ieee80211_smps_mode smps; /* current smps mode */ 478 /* BSS related data */ 479 u8 extension_chan_offset; 480 u8 ht_protection; 481 u8 non_GF_STA_present; 482}; 483 484/* QoS structures */ 485struct iwl_qos_info { 486 int qos_active; 487 struct iwl_qosparam_cmd def_qos_parm; 488}; 489 490/* 491 * Structure should be accessed with sta_lock held. When station addition 492 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only 493 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock 494 * held. 495 */ 496struct iwl_station_entry { 497 struct iwl_addsta_cmd sta; 498 struct iwl_tid_data tid[MAX_TID_COUNT]; 499 u8 used, ctxid; 500 struct iwl_hw_key keyinfo; 501 struct iwl_link_quality_cmd *lq; 502}; 503 504struct iwl_station_priv_common { 505 u8 sta_id; 506}; 507 508/* 509 * iwl_station_priv: Driver's private station information 510 * 511 * When mac80211 creates a station it reserves some space (hw->sta_data_size) 512 * in the structure for use by driver. This structure is places in that 513 * space. 514 * 515 * The common struct MUST be first because it is shared between 516 * 3945 and agn! 517 */ 518struct iwl_station_priv { 519 struct iwl_station_priv_common common; 520 struct iwl_lq_sta lq_sta; 521 atomic_t pending_frames; 522 bool client; 523 bool asleep; 524}; 525 526/** 527 * struct iwl_vif_priv - driver's private per-interface information 528 * 529 * When mac80211 allocates a virtual interface, it can allocate 530 * space for us to put data into. 531 */ 532struct iwl_vif_priv { 533 struct iwl_rxon_context *ctx; 534 u8 ibss_bssid_sta_id; 535}; 536 537/* one for each uCode image (inst/data, boot/init/runtime) */ 538struct fw_desc { 539 void *v_addr; /* access by driver */ 540 dma_addr_t p_addr; /* access by card's busmaster DMA */ 541 u32 len; /* bytes */ 542}; 543 544/* v1/v2 uCode file layout */ 545struct iwl_ucode_header { 546 __le32 ver; /* major/minor/API/serial */ 547 union { 548 struct { 549 __le32 inst_size; /* bytes of runtime code */ 550 __le32 data_size; /* bytes of runtime data */ 551 __le32 init_size; /* bytes of init code */ 552 __le32 init_data_size; /* bytes of init data */ 553 __le32 boot_size; /* bytes of bootstrap code */ 554 u8 data[0]; /* in same order as sizes */ 555 } v1; 556 struct { 557 __le32 build; /* build number */ 558 __le32 inst_size; /* bytes of runtime code */ 559 __le32 data_size; /* bytes of runtime data */ 560 __le32 init_size; /* bytes of init code */ 561 __le32 init_data_size; /* bytes of init data */ 562 __le32 boot_size; /* bytes of bootstrap code */ 563 u8 data[0]; /* in same order as sizes */ 564 } v2; 565 } u; 566}; 567 568/* 569 * new TLV uCode file layout 570 * 571 * The new TLV file format contains TLVs, that each specify 572 * some piece of data. To facilitate "groups", for example 573 * different instruction image with different capabilities, 574 * bundled with the same init image, an alternative mechanism 575 * is provided: 576 * When the alternative field is 0, that means that the item 577 * is always valid. When it is non-zero, then it is only 578 * valid in conjunction with items of the same alternative, 579 * in which case the driver (user) selects one alternative 580 * to use. 581 */ 582 583enum iwl_ucode_tlv_type { 584 IWL_UCODE_TLV_INVALID = 0, /* unused */ 585 IWL_UCODE_TLV_INST = 1, 586 IWL_UCODE_TLV_DATA = 2, 587 IWL_UCODE_TLV_INIT = 3, 588 IWL_UCODE_TLV_INIT_DATA = 4, 589 IWL_UCODE_TLV_BOOT = 5, 590 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 591 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 592 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 593 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 594 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 595 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 596 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 597 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 598 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 599}; 600 601struct iwl_ucode_tlv { 602 __le16 type; /* see above */ 603 __le16 alternative; /* see comment */ 604 __le32 length; /* not including type/length fields */ 605 u8 data[0]; 606} __packed; 607 608#define IWL_TLV_UCODE_MAGIC 0x0a4c5749 609 610struct iwl_tlv_ucode_header { 611 /* 612 * The TLV style ucode header is distinguished from 613 * the v1/v2 style header by first four bytes being 614 * zero, as such is an invalid combination of 615 * major/minor/API/serial versions. 616 */ 617 __le32 zero; 618 __le32 magic; 619 u8 human_readable[64]; 620 __le32 ver; /* major/minor/API/serial */ 621 __le32 build; 622 __le64 alternatives; /* bitmask of valid alternatives */ 623 /* 624 * The data contained herein has a TLV layout, 625 * see above for the TLV header and types. 626 * Note that each TLV is padded to a length 627 * that is a multiple of 4 for alignment. 628 */ 629 u8 data[0]; 630}; 631 632struct iwl4965_ibss_seq { 633 u8 mac[ETH_ALEN]; 634 u16 seq_num; 635 u16 frag_num; 636 unsigned long packet_time; 637 struct list_head list; 638}; 639 640struct iwl_sensitivity_ranges { 641 u16 min_nrg_cck; 642 u16 max_nrg_cck; 643 644 u16 nrg_th_cck; 645 u16 nrg_th_ofdm; 646 647 u16 auto_corr_min_ofdm; 648 u16 auto_corr_min_ofdm_mrc; 649 u16 auto_corr_min_ofdm_x1; 650 u16 auto_corr_min_ofdm_mrc_x1; 651 652 u16 auto_corr_max_ofdm; 653 u16 auto_corr_max_ofdm_mrc; 654 u16 auto_corr_max_ofdm_x1; 655 u16 auto_corr_max_ofdm_mrc_x1; 656 657 u16 auto_corr_max_cck; 658 u16 auto_corr_max_cck_mrc; 659 u16 auto_corr_min_cck; 660 u16 auto_corr_min_cck_mrc; 661 662 u16 barker_corr_th_min; 663 u16 barker_corr_th_min_mrc; 664 u16 nrg_th_cca; 665}; 666 667 668#define KELVIN_TO_CELSIUS(x) ((x)-273) 669#define CELSIUS_TO_KELVIN(x) ((x)+273) 670 671 672/** 673 * struct iwl_hw_params 674 * @max_txq_num: Max # Tx queues supported 675 * @dma_chnl_num: Number of Tx DMA/FIFO channels 676 * @scd_bc_tbls_size: size of scheduler byte count tables 677 * @tfd_size: TFD size 678 * @tx/rx_chains_num: Number of TX/RX chains 679 * @valid_tx/rx_ant: usable antennas 680 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) 681 * @max_rxq_log: Log-base-2 of max_rxq_size 682 * @rx_page_order: Rx buffer page order 683 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 684 * @max_stations: 685 * @ht40_channel: is 40MHz width possible in band 2.4 686 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ) 687 * @sw_crypto: 0 for hw, 1 for sw 688 * @max_xxx_size: for ucode uses 689 * @ct_kill_threshold: temperature threshold 690 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time 691 * @calib_init_cfg: setup initial calibrations for the hw 692 * @struct iwl_sensitivity_ranges: range of sensitivity values 693 */ 694struct iwl_hw_params { 695 u8 max_txq_num; 696 u8 dma_chnl_num; 697 u16 scd_bc_tbls_size; 698 u32 tfd_size; 699 u8 tx_chains_num; 700 u8 rx_chains_num; 701 u8 valid_tx_ant; 702 u8 valid_rx_ant; 703 u16 max_rxq_size; 704 u16 max_rxq_log; 705 u32 rx_page_order; 706 u32 rx_wrt_ptr_reg; 707 u8 max_stations; 708 u8 ht40_channel; 709 u8 max_beacon_itrvl; /* in 1024 ms */ 710 u32 max_inst_size; 711 u32 max_data_size; 712 u32 max_bsm_size; 713 u32 ct_kill_threshold; /* value in hw-dependent units */ 714 u32 ct_kill_exit_threshold; /* value in hw-dependent units */ 715 /* for 1000, 6000 series and up */ 716 u16 beacon_time_tsf_bits; 717 u32 calib_init_cfg; 718 const struct iwl_sensitivity_ranges *sens; 719}; 720 721 722/****************************************************************************** 723 * 724 * Functions implemented in core module which are forward declared here 725 * for use by iwl-[4-5].c 726 * 727 * NOTE: The implementation of these functions are not hardware specific 728 * which is why they are in the core module files. 729 * 730 * Naming convention -- 731 * iwl_ <-- Is part of iwlwifi 732 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) 733 * iwl4965_bg_ <-- Called from work queue context 734 * iwl4965_mac_ <-- mac80211 callback 735 * 736 ****************************************************************************/ 737extern void iwl_update_chain_flags(struct iwl_priv *priv); 738extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src); 739extern const u8 iwl_bcast_addr[ETH_ALEN]; 740extern int iwl_rxq_stop(struct iwl_priv *priv); 741extern void iwl_txq_ctx_stop(struct iwl_priv *priv); 742extern int iwl_queue_space(const struct iwl_queue *q); 743static inline int iwl_queue_used(const struct iwl_queue *q, int i) 744{ 745 return q->write_ptr >= q->read_ptr ? 746 (i >= q->read_ptr && i < q->write_ptr) : 747 !(i < q->read_ptr && i >= q->write_ptr); 748} 749 750 751static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge) 752{ 753 /* 754 * This is for init calibration result and scan command which 755 * required buffer > TFD_MAX_PAYLOAD_SIZE, 756 * the big buffer at end of command array 757 */ 758 if (is_huge) 759 return q->n_window; /* must be power of 2 */ 760 761 /* Otherwise, use normal size buffers */ 762 return index & (q->n_window - 1); 763} 764 765 766struct iwl_dma_ptr { 767 dma_addr_t dma; 768 void *addr; 769 size_t size; 770}; 771 772#define IWL_OPERATION_MODE_AUTO 0 773#define IWL_OPERATION_MODE_HT_ONLY 1 774#define IWL_OPERATION_MODE_MIXED 2 775#define IWL_OPERATION_MODE_20MHZ 3 776 777#define IWL_TX_CRC_SIZE 4 778#define IWL_TX_DELIMITER_SIZE 4 779 780#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 781 782/* Sensitivity and chain noise calibration */ 783#define INITIALIZATION_VALUE 0xFFFF 784#define IWL4965_CAL_NUM_BEACONS 20 785#define IWL_CAL_NUM_BEACONS 16 786#define MAXIMUM_ALLOWED_PATHLOSS 15 787 788#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 789 790#define MAX_FA_OFDM 50 791#define MIN_FA_OFDM 5 792#define MAX_FA_CCK 50 793#define MIN_FA_CCK 5 794 795#define AUTO_CORR_STEP_OFDM 1 796 797#define AUTO_CORR_STEP_CCK 3 798#define AUTO_CORR_MAX_TH_CCK 160 799 800#define NRG_DIFF 2 801#define NRG_STEP_CCK 2 802#define NRG_MARGIN 8 803#define MAX_NUMBER_CCK_NO_FA 100 804 805#define AUTO_CORR_CCK_MIN_VAL_DEF (125) 806 807#define CHAIN_A 0 808#define CHAIN_B 1 809#define CHAIN_C 2 810#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 811#define ALL_BAND_FILTER 0xFF00 812#define IN_BAND_FILTER 0xFF 813#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF 814 815#define NRG_NUM_PREV_STAT_L 20 816#define NUM_RX_CHAINS 3 817 818enum iwl4965_false_alarm_state { 819 IWL_FA_TOO_MANY = 0, 820 IWL_FA_TOO_FEW = 1, 821 IWL_FA_GOOD_RANGE = 2, 822}; 823 824enum iwl4965_chain_noise_state { 825 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ 826 IWL_CHAIN_NOISE_ACCUMULATE, 827 IWL_CHAIN_NOISE_CALIBRATED, 828 IWL_CHAIN_NOISE_DONE, 829}; 830 831enum iwl4965_calib_enabled_state { 832 IWL_CALIB_DISABLED = 0, /* must be 0 */ 833 IWL_CALIB_ENABLED = 1, 834}; 835 836 837/* 838 * enum iwl_calib 839 * defines the order in which results of initial calibrations 840 * should be sent to the runtime uCode 841 */ 842enum iwl_calib { 843 IWL_CALIB_XTAL, 844 IWL_CALIB_DC, 845 IWL_CALIB_LO, 846 IWL_CALIB_TX_IQ, 847 IWL_CALIB_TX_IQ_PERD, 848 IWL_CALIB_BASE_BAND, 849 IWL_CALIB_MAX 850}; 851 852/* Opaque calibration results */ 853struct iwl_calib_result { 854 void *buf; 855 size_t buf_len; 856}; 857 858enum ucode_type { 859 UCODE_NONE = 0, 860 UCODE_INIT, 861 UCODE_RT 862}; 863 864/* Sensitivity calib data */ 865struct iwl_sensitivity_data { 866 u32 auto_corr_ofdm; 867 u32 auto_corr_ofdm_mrc; 868 u32 auto_corr_ofdm_x1; 869 u32 auto_corr_ofdm_mrc_x1; 870 u32 auto_corr_cck; 871 u32 auto_corr_cck_mrc; 872 873 u32 last_bad_plcp_cnt_ofdm; 874 u32 last_fa_cnt_ofdm; 875 u32 last_bad_plcp_cnt_cck; 876 u32 last_fa_cnt_cck; 877 878 u32 nrg_curr_state; 879 u32 nrg_prev_state; 880 u32 nrg_value[10]; 881 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; 882 u32 nrg_silence_ref; 883 u32 nrg_energy_idx; 884 u32 nrg_silence_idx; 885 u32 nrg_th_cck; 886 s32 nrg_auto_corr_silence_diff; 887 u32 num_in_cck_no_fa; 888 u32 nrg_th_ofdm; 889 890 u16 barker_corr_th_min; 891 u16 barker_corr_th_min_mrc; 892 u16 nrg_th_cca; 893}; 894 895/* Chain noise (differential Rx gain) calib data */ 896struct iwl_chain_noise_data { 897 u32 active_chains; 898 u32 chain_noise_a; 899 u32 chain_noise_b; 900 u32 chain_noise_c; 901 u32 chain_signal_a; 902 u32 chain_signal_b; 903 u32 chain_signal_c; 904 u16 beacon_count; 905 u8 disconn_array[NUM_RX_CHAINS]; 906 u8 delta_gain_code[NUM_RX_CHAINS]; 907 u8 radio_write; 908 u8 state; 909}; 910 911#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 912#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 913 914#define IWL_TRAFFIC_ENTRIES (256) 915#define IWL_TRAFFIC_ENTRY_SIZE (64) 916 917enum { 918 MEASUREMENT_READY = (1 << 0), 919 MEASUREMENT_ACTIVE = (1 << 1), 920}; 921 922enum iwl_nvm_type { 923 NVM_DEVICE_TYPE_EEPROM = 0, 924 NVM_DEVICE_TYPE_OTP, 925}; 926 927/* 928 * Two types of OTP memory access modes 929 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, 930 * based on physical memory addressing 931 * IWL_OTP_ACCESS_RELATIVE - relative address mode, 932 * based on logical memory addressing 933 */ 934enum iwl_access_mode { 935 IWL_OTP_ACCESS_ABSOLUTE, 936 IWL_OTP_ACCESS_RELATIVE, 937}; 938 939/** 940 * enum iwl_pa_type - Power Amplifier type 941 * @IWL_PA_SYSTEM: based on uCode configuration 942 * @IWL_PA_INTERNAL: use Internal only 943 */ 944enum iwl_pa_type { 945 IWL_PA_SYSTEM = 0, 946 IWL_PA_INTERNAL = 1, 947}; 948 949/* interrupt statistics */ 950struct isr_statistics { 951 u32 hw; 952 u32 sw; 953 u32 sw_err; 954 u32 sch; 955 u32 alive; 956 u32 rfkill; 957 u32 ctkill; 958 u32 wakeup; 959 u32 rx; 960 u32 rx_handlers[REPLY_MAX]; 961 u32 tx; 962 u32 unhandled; 963}; 964 965#ifdef CONFIG_IWLWIFI_DEBUGFS 966/* management statistics */ 967enum iwl_mgmt_stats { 968 MANAGEMENT_ASSOC_REQ = 0, 969 MANAGEMENT_ASSOC_RESP, 970 MANAGEMENT_REASSOC_REQ, 971 MANAGEMENT_REASSOC_RESP, 972 MANAGEMENT_PROBE_REQ, 973 MANAGEMENT_PROBE_RESP, 974 MANAGEMENT_BEACON, 975 MANAGEMENT_ATIM, 976 MANAGEMENT_DISASSOC, 977 MANAGEMENT_AUTH, 978 MANAGEMENT_DEAUTH, 979 MANAGEMENT_ACTION, 980 MANAGEMENT_MAX, 981}; 982/* control statistics */ 983enum iwl_ctrl_stats { 984 CONTROL_BACK_REQ = 0, 985 CONTROL_BACK, 986 CONTROL_PSPOLL, 987 CONTROL_RTS, 988 CONTROL_CTS, 989 CONTROL_ACK, 990 CONTROL_CFEND, 991 CONTROL_CFENDACK, 992 CONTROL_MAX, 993}; 994 995struct traffic_stats { 996 u32 mgmt[MANAGEMENT_MAX]; 997 u32 ctrl[CONTROL_MAX]; 998 u32 data_cnt; 999 u64 data_bytes; 1000}; 1001#else 1002struct traffic_stats { 1003 u64 data_bytes; 1004}; 1005#endif 1006 1007/* 1008 * iwl_switch_rxon: "channel switch" structure 1009 * 1010 * @ switch_in_progress: channel switch in progress 1011 * @ channel: new channel 1012 */ 1013struct iwl_switch_rxon { 1014 bool switch_in_progress; 1015 __le16 channel; 1016}; 1017 1018/* 1019 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds 1020 * to perform continuous uCode event logging operation if enabled 1021 */ 1022#define UCODE_TRACE_PERIOD (100) 1023 1024/* 1025 * iwl_event_log: current uCode event log position 1026 * 1027 * @ucode_trace: enable/disable ucode continuous trace timer 1028 * @num_wraps: how many times the event buffer wraps 1029 * @next_entry: the entry just before the next one that uCode would fill 1030 * @non_wraps_count: counter for no wrap detected when dump ucode events 1031 * @wraps_once_count: counter for wrap once detected when dump ucode events 1032 * @wraps_more_count: counter for wrap more than once detected 1033 * when dump ucode events 1034 */ 1035struct iwl_event_log { 1036 bool ucode_trace; 1037 u32 num_wraps; 1038 u32 next_entry; 1039 int non_wraps_count; 1040 int wraps_once_count; 1041 int wraps_more_count; 1042}; 1043 1044/* 1045 * host interrupt timeout value 1046 * used with setting interrupt coalescing timer 1047 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit 1048 * 1049 * default interrupt coalescing timer is 64 x 32 = 2048 usecs 1050 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs 1051 */ 1052#define IWL_HOST_INT_TIMEOUT_MAX (0xFF) 1053#define IWL_HOST_INT_TIMEOUT_DEF (0x40) 1054#define IWL_HOST_INT_TIMEOUT_MIN (0x0) 1055#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF) 1056#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10) 1057#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0) 1058 1059/* 1060 * This is the threshold value of plcp error rate per 100mSecs. It is 1061 * used to set and check for the validity of plcp_delta. 1062 */ 1063#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1) 1064#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50) 1065#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100) 1066#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200) 1067#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255) 1068#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0) 1069 1070#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3) 1071#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) 1072 1073/* timer constants use to monitor and recover stuck tx queues in mSecs */ 1074#define IWL_DEF_MONITORING_PERIOD (1000) 1075#define IWL_LONG_MONITORING_PERIOD (5000) 1076#define IWL_ONE_HUNDRED_MSECS (100) 1077#define IWL_MAX_MONITORING_PERIOD (60000) 1078 1079/* BT Antenna Coupling Threshold (dB) */ 1080#define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35) 1081 1082enum iwl_reset { 1083 IWL_RF_RESET = 0, 1084 IWL_FW_RESET, 1085 IWL_MAX_FORCE_RESET, 1086}; 1087 1088struct iwl_force_reset { 1089 int reset_request_count; 1090 int reset_success_count; 1091 int reset_reject_count; 1092 unsigned long reset_duration; 1093 unsigned long last_force_reset_jiffies; 1094}; 1095 1096/* extend beacon time format bit shifting */ 1097/* 1098 * for _3945 devices 1099 * bits 31:24 - extended 1100 * bits 23:0 - interval 1101 */ 1102#define IWL3945_EXT_BEACON_TIME_POS 24 1103/* 1104 * for _agn devices 1105 * bits 31:22 - extended 1106 * bits 21:0 - interval 1107 */ 1108#define IWLAGN_EXT_BEACON_TIME_POS 22 1109 1110enum iwl_rxon_context_id { 1111 IWL_RXON_CTX_BSS, 1112 1113 NUM_IWL_RXON_CTX 1114}; 1115 1116struct iwl_rxon_context { 1117 struct ieee80211_vif *vif; 1118 enum iwl_rxon_context_id ctxid; 1119 /* 1120 * We declare this const so it can only be 1121 * changed via explicit cast within the 1122 * routines that actually update the physical 1123 * hardware. 1124 */ 1125 const struct iwl_rxon_cmd active; 1126 struct iwl_rxon_cmd staging; 1127 1128 struct iwl_rxon_time_cmd timing; 1129 1130 struct iwl_qos_info qos_data; 1131 1132 u8 bcast_sta_id, ap_sta_id; 1133 1134 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd; 1135 u8 qos_cmd; 1136}; 1137 1138struct iwl_priv { 1139 1140 /* ieee device used by generic ieee processing code */ 1141 struct ieee80211_hw *hw; 1142 struct ieee80211_channel *ieee_channels; 1143 struct ieee80211_rate *ieee_rates; 1144 struct iwl_cfg *cfg; 1145 1146 /* temporary frame storage list */ 1147 struct list_head free_frames; 1148 int frames_count; 1149 1150 enum ieee80211_band band; 1151 int alloc_rxb_page; 1152 1153 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 1154 struct iwl_rx_mem_buffer *rxb); 1155 1156 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1157 1158 /* spectrum measurement report caching */ 1159 struct iwl_spectrum_notification measure_report; 1160 u8 measurement_status; 1161 1162 /* ucode beacon time */ 1163 u32 ucode_beacon_time; 1164 int missed_beacon_threshold; 1165 1166 /* track IBSS manager (last beacon) status */ 1167 u32 ibss_manager; 1168 1169 /* storing the jiffies when the plcp error rate is received */ 1170 unsigned long plcp_jiffies; 1171 1172 /* force reset */ 1173 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; 1174 1175 /* we allocate array of iwl_channel_info for NIC's valid channels. 1176 * Access via channel # using indirect index array */ 1177 struct iwl_channel_info *channel_info; /* channel info array */ 1178 u8 channel_count; /* # of channels */ 1179 1180 /* thermal calibration */ 1181 s32 temperature; /* degrees Kelvin */ 1182 s32 last_temperature; 1183 1184 /* init calibration results */ 1185 struct iwl_calib_result calib_results[IWL_CALIB_MAX]; 1186 1187 /* Scan related variables */ 1188 unsigned long scan_start; 1189 unsigned long scan_start_tsf; 1190 void *scan_cmd; 1191 enum ieee80211_band scan_band; 1192 struct cfg80211_scan_request *scan_request; 1193 struct ieee80211_vif *scan_vif; 1194 bool is_internal_short_scan; 1195 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 1196 u8 mgmt_tx_ant; 1197 1198 /* spinlock */ 1199 spinlock_t lock; /* protect general shared data */ 1200 spinlock_t hcmd_lock; /* protect hcmd */ 1201 spinlock_t reg_lock; /* protect hw register access */ 1202 struct mutex mutex; 1203 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */ 1204 1205 /* basic pci-network driver stuff */ 1206 struct pci_dev *pci_dev; 1207 1208 /* pci hardware address support */ 1209 void __iomem *hw_base; 1210 u32 hw_rev; 1211 u32 hw_wa_rev; 1212 u8 rev_id; 1213 1214 /* microcode/device supports multiple contexts */ 1215 u8 valid_contexts; 1216 1217 /* command queue number */ 1218 u8 cmd_queue; 1219 1220 /* EEPROM MAC addresses */ 1221 struct mac_address addresses[2]; 1222 1223 /* uCode images, save to reload in case of failure */ 1224 int fw_index; /* firmware we're trying to load */ 1225 u32 ucode_ver; /* version of ucode, copy of 1226 iwl_ucode.ver */ 1227 struct fw_desc ucode_code; /* runtime inst */ 1228 struct fw_desc ucode_data; /* runtime data original */ 1229 struct fw_desc ucode_data_backup; /* runtime data save/restore */ 1230 struct fw_desc ucode_init; /* initialization inst */ 1231 struct fw_desc ucode_init_data; /* initialization data */ 1232 struct fw_desc ucode_boot; /* bootstrap inst */ 1233 enum ucode_type ucode_type; 1234 u8 ucode_write_complete; /* the image write is complete */ 1235 char firmware_name[25]; 1236 1237 struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX]; 1238 1239 struct iwl_switch_rxon switch_rxon; 1240 1241 /* 1st responses from initialize and runtime uCode images. 1242 * _agn's initialize alive response contains some calibration data. */ 1243 struct iwl_init_alive_resp card_alive_init; 1244 struct iwl_alive_resp card_alive; 1245 1246 unsigned long last_blink_time; 1247 u8 last_blink_rate; 1248 u8 allow_blinking; 1249 u64 led_tpt; 1250 1251 u16 active_rate; 1252 1253 u8 start_calib; 1254 struct iwl_sensitivity_data sensitivity_data; 1255 struct iwl_chain_noise_data chain_noise_data; 1256 bool enhance_sensitivity_table; 1257 __le16 sensitivity_tbl[HD_TABLE_SIZE]; 1258 __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES]; 1259 1260 struct iwl_ht_config current_ht_config; 1261 1262 /* Rate scaling data */ 1263 u8 retry_rate; 1264 1265 wait_queue_head_t wait_command_queue; 1266 1267 int activity_timer_active; 1268 1269 /* Rx and Tx DMA processing queues */ 1270 struct iwl_rx_queue rxq; 1271 struct iwl_tx_queue *txq; 1272 unsigned long txq_ctx_active_msk; 1273 struct iwl_dma_ptr kw; /* keep warm address */ 1274 struct iwl_dma_ptr scd_bc_tbls; 1275 1276 u32 scd_base_addr; /* scheduler sram base address */ 1277 1278 unsigned long status; 1279 1280 /* counts mgmt, ctl, and data packets */ 1281 struct traffic_stats tx_stats; 1282 struct traffic_stats rx_stats; 1283 1284 /* counts interrupts */ 1285 struct isr_statistics isr_stats; 1286 1287 struct iwl_power_mgr power_data; 1288 struct iwl_tt_mgmt thermal_throttle; 1289 1290 /* context information */ 1291 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ 1292 1293 /* station table variables */ 1294 1295 /* Note: if lock and sta_lock are needed, lock must be acquired first */ 1296 spinlock_t sta_lock; 1297 int num_stations; 1298 struct iwl_station_entry stations[IWL_STATION_COUNT]; 1299 struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; /* protected by mutex */ 1300 u8 key_mapping_key; 1301 unsigned long ucode_key_table; 1302 1303 /* queue refcounts */ 1304#define IWL_MAX_HW_QUEUES 32 1305 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; 1306 /* for each AC */ 1307 atomic_t queue_stop_count[4]; 1308 1309 /* Indication if ieee80211_ops->open has been called */ 1310 u8 is_open; 1311 1312 u8 mac80211_registered; 1313 1314 /* eeprom -- this is in the card's little endian byte order */ 1315 u8 *eeprom; 1316 int nvm_device_type; 1317 struct iwl_eeprom_calib_info *calib_info; 1318 1319 enum nl80211_iftype iw_mode; 1320 1321 struct sk_buff *ibss_beacon; 1322 1323 /* Last Rx'd beacon timestamp */ 1324 u64 timestamp; 1325 1326 union { 1327#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE) 1328 struct { 1329 void *shared_virt; 1330 dma_addr_t shared_phys; 1331 1332 struct delayed_work thermal_periodic; 1333 struct delayed_work rfkill_poll; 1334 1335 struct iwl3945_notif_statistics statistics; 1336#ifdef CONFIG_IWLWIFI_DEBUGFS 1337 struct iwl3945_notif_statistics accum_statistics; 1338 struct iwl3945_notif_statistics delta_statistics; 1339 struct iwl3945_notif_statistics max_delta; 1340#endif 1341 1342 u32 sta_supp_rates; 1343 int last_rx_rssi; /* From Rx packet statistics */ 1344 1345 /* Rx'd packet timing information */ 1346 u32 last_beacon_time; 1347 u64 last_tsf; 1348 1349 /* 1350 * each calibration channel group in the 1351 * EEPROM has a derived clip setting for 1352 * each rate. 1353 */ 1354 const struct iwl3945_clip_group clip_groups[5]; 1355 1356 } _3945; 1357#endif 1358#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE) 1359 struct { 1360 /* INT ICT Table */ 1361 __le32 *ict_tbl; 1362 void *ict_tbl_vir; 1363 dma_addr_t ict_tbl_dma; 1364 dma_addr_t aligned_ict_tbl_dma; 1365 int ict_index; 1366 u32 inta; 1367 bool use_ict; 1368 /* 1369 * reporting the number of tids has AGG on. 0 means 1370 * no AGGREGATION 1371 */ 1372 u8 agg_tids_count; 1373 1374 struct iwl_rx_phy_res last_phy_res; 1375 bool last_phy_res_valid; 1376 1377 struct completion firmware_loading_complete; 1378 1379 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; 1380 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; 1381 1382 /* 1383 * chain noise reset and gain commands are the 1384 * two extra calibration commands follows the standard 1385 * phy calibration commands 1386 */ 1387 u8 phy_calib_chain_noise_reset_cmd; 1388 u8 phy_calib_chain_noise_gain_cmd; 1389 1390 struct iwl_notif_statistics statistics; 1391 struct iwl_bt_notif_statistics statistics_bt; 1392#ifdef CONFIG_IWLWIFI_DEBUGFS 1393 struct iwl_notif_statistics accum_statistics; 1394 struct iwl_notif_statistics delta_statistics; 1395 struct iwl_notif_statistics max_delta; 1396 struct iwl_bt_notif_statistics accum_statistics_bt; 1397 struct iwl_bt_notif_statistics delta_statistics_bt; 1398 struct iwl_bt_notif_statistics max_delta_bt; 1399#endif 1400 } _agn; 1401#endif 1402 }; 1403 1404 /* bt coex */ 1405 u8 bt_status; 1406 u8 bt_traffic_load, notif_bt_traffic_load; 1407 bool bt_ch_announce; 1408 bool bt_sco_active; 1409 bool bt_full_concurrent; 1410 bool bt_ant_couple_ok; 1411 __le32 kill_ack_mask; 1412 __le32 kill_cts_mask; 1413 __le16 bt_valid; 1414 u16 bt_on_thresh; 1415 u16 bt_duration; 1416 u16 dynamic_frag_thresh; 1417 u16 dynamic_agg_thresh; 1418 u8 bt_ci_compliance; 1419 struct work_struct bt_traffic_change_work; 1420 1421 struct iwl_hw_params hw_params; 1422 1423 u32 inta_mask; 1424 1425 struct workqueue_struct *workqueue; 1426 1427 struct work_struct restart; 1428 struct work_struct scan_completed; 1429 struct work_struct rx_replenish; 1430 struct work_struct abort_scan; 1431 struct work_struct beacon_update; 1432 struct work_struct tt_work; 1433 struct work_struct ct_enter; 1434 struct work_struct ct_exit; 1435 struct work_struct start_internal_scan; 1436 struct work_struct tx_flush; 1437 struct work_struct bt_full_concurrency; 1438 struct work_struct bt_runtime_config; 1439 1440 struct tasklet_struct irq_tasklet; 1441 1442 struct delayed_work init_alive_start; 1443 struct delayed_work alive_start; 1444 struct delayed_work scan_check; 1445 1446 /* TX Power */ 1447 s8 tx_power_user_lmt; 1448 s8 tx_power_device_lmt; 1449 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */ 1450 1451 1452#ifdef CONFIG_IWLWIFI_DEBUG 1453 /* debugging info */ 1454 u32 debug_level; /* per device debugging will override global 1455 iwl_debug_level if set */ 1456#endif /* CONFIG_IWLWIFI_DEBUG */ 1457#ifdef CONFIG_IWLWIFI_DEBUGFS 1458 /* debugfs */ 1459 u16 tx_traffic_idx; 1460 u16 rx_traffic_idx; 1461 u8 *tx_traffic; 1462 u8 *rx_traffic; 1463 struct dentry *debugfs_dir; 1464 u32 dbgfs_sram_offset, dbgfs_sram_len; 1465 bool disable_ht40; 1466#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1467 1468 struct work_struct txpower_work; 1469 u32 disable_sens_cal; 1470 u32 disable_chain_noise_cal; 1471 u32 disable_tx_power_cal; 1472 struct work_struct run_time_calib_work; 1473 struct timer_list statistics_periodic; 1474 struct timer_list ucode_trace; 1475 struct timer_list monitor_recover; 1476 bool hw_ready; 1477 1478 struct iwl_event_log event_log; 1479}; /*iwl_priv */ 1480 1481static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1482{ 1483 set_bit(txq_id, &priv->txq_ctx_active_msk); 1484} 1485 1486static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) 1487{ 1488 clear_bit(txq_id, &priv->txq_ctx_active_msk); 1489} 1490 1491#ifdef CONFIG_IWLWIFI_DEBUG 1492const char *iwl_get_tx_fail_reason(u32 status); 1493/* 1494 * iwl_get_debug_level: Return active debug level for device 1495 * 1496 * Using sysfs it is possible to set per device debug level. This debug 1497 * level will be used if set, otherwise the global debug level which can be 1498 * set via module parameter is used. 1499 */ 1500static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1501{ 1502 if (priv->debug_level) 1503 return priv->debug_level; 1504 else 1505 return iwl_debug_level; 1506} 1507#else 1508static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; } 1509 1510static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1511{ 1512 return iwl_debug_level; 1513} 1514#endif 1515 1516 1517static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, 1518 int txq_id, int idx) 1519{ 1520 if (priv->txq[txq_id].txb[idx].skb) 1521 return (struct ieee80211_hdr *)priv->txq[txq_id]. 1522 txb[idx].skb->data; 1523 return NULL; 1524} 1525 1526static inline struct iwl_rxon_context * 1527iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif) 1528{ 1529 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 1530 1531 return vif_priv->ctx; 1532} 1533 1534#define for_each_context(priv, ctx) \ 1535 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \ 1536 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \ 1537 if (priv->valid_contexts & BIT(ctx->ctxid)) 1538 1539static inline int iwl_is_associated(struct iwl_priv *priv, 1540 enum iwl_rxon_context_id ctxid) 1541{ 1542 return (priv->contexts[ctxid].active.filter_flags & 1543 RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1544} 1545 1546static inline int iwl_is_any_associated(struct iwl_priv *priv) 1547{ 1548 return iwl_is_associated(priv, IWL_RXON_CTX_BSS); 1549} 1550 1551static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx) 1552{ 1553 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1554} 1555 1556static inline int is_channel_valid(const struct iwl_channel_info *ch_info) 1557{ 1558 if (ch_info == NULL) 1559 return 0; 1560 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; 1561} 1562 1563static inline int is_channel_radar(const struct iwl_channel_info *ch_info) 1564{ 1565 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; 1566} 1567 1568static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info) 1569{ 1570 return ch_info->band == IEEE80211_BAND_5GHZ; 1571} 1572 1573static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info) 1574{ 1575 return ch_info->band == IEEE80211_BAND_2GHZ; 1576} 1577 1578static inline int is_channel_passive(const struct iwl_channel_info *ch) 1579{ 1580 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; 1581} 1582 1583static inline int is_channel_ibss(const struct iwl_channel_info *ch) 1584{ 1585 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1586} 1587 1588static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) 1589{ 1590 __free_pages(page, priv->hw_params.rx_page_order); 1591 priv->alloc_rxb_page--; 1592} 1593 1594static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) 1595{ 1596 free_pages(page, priv->hw_params.rx_page_order); 1597 priv->alloc_rxb_page--; 1598} 1599#endif /* __iwl_dev_h__ */ 1600