iwl-dev.h revision 4b3e8062807822271e02aafc0432e9a2497cb46c
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 *  Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26/*
27 * Please use this file (iwl-dev.h) for driver implementation definitions.
28 * Please use iwl-commands.h for uCode API definitions.
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
34
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
39#include "iwl-eeprom.h"
40#include "iwl-csr.h"
41#include "iwl-prph.h"
42#include "iwl-fh.h"
43#include "iwl-debug.h"
44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
46#include "iwl-agn-hw.h"
47#include "iwl-led.h"
48#include "iwl-power.h"
49#include "iwl-agn-rs.h"
50
51/* configuration for the iwl4965 */
52extern struct iwl_cfg iwl4965_agn_cfg;
53extern struct iwl_cfg iwl5300_agn_cfg;
54extern struct iwl_cfg iwl5100_agn_cfg;
55extern struct iwl_cfg iwl5350_agn_cfg;
56extern struct iwl_cfg iwl5100_bgn_cfg;
57extern struct iwl_cfg iwl5100_abg_cfg;
58extern struct iwl_cfg iwl5150_agn_cfg;
59extern struct iwl_cfg iwl5150_abg_cfg;
60extern struct iwl_cfg iwl6000i_2agn_cfg;
61extern struct iwl_cfg iwl6000g2i_2agn_cfg;
62extern struct iwl_cfg iwl6000i_2abg_cfg;
63extern struct iwl_cfg iwl6000i_2bg_cfg;
64extern struct iwl_cfg iwl6000_3agn_cfg;
65extern struct iwl_cfg iwl6050_2agn_cfg;
66extern struct iwl_cfg iwl6050_2abg_cfg;
67extern struct iwl_cfg iwl1000_bgn_cfg;
68extern struct iwl_cfg iwl1000_bg_cfg;
69
70struct iwl_tx_queue;
71
72/* CT-KILL constants */
73#define CT_KILL_THRESHOLD_LEGACY   110 /* in Celsius */
74#define CT_KILL_THRESHOLD	   114 /* in Celsius */
75#define CT_KILL_EXIT_THRESHOLD     95  /* in Celsius */
76
77/* Default noise level to report when noise measurement is not available.
78 *   This may be because we're:
79 *   1)  Not associated (4965, no beacon statistics being sent to driver)
80 *   2)  Scanning (noise measurement does not apply to associated channel)
81 *   3)  Receiving CCK (3945 delivers noise info only for OFDM frames)
82 * Use default noise value of -127 ... this is below the range of measurable
83 *   Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
84 *   Also, -127 works better than 0 when averaging frames with/without
85 *   noise info (e.g. averaging might be done in app); measured dBm values are
86 *   always negative ... using a negative value as the default keeps all
87 *   averages within an s8's (used in some apps) range of negative values. */
88#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
89
90/*
91 * RTS threshold here is total size [2347] minus 4 FCS bytes
92 * Per spec:
93 *   a value of 0 means RTS on all data/management packets
94 *   a value > max MSDU size means no RTS
95 * else RTS for data/management frames where MPDU is larger
96 *   than RTS value.
97 */
98#define DEFAULT_RTS_THRESHOLD     2347U
99#define MIN_RTS_THRESHOLD         0U
100#define MAX_RTS_THRESHOLD         2347U
101#define MAX_MSDU_SIZE		  2304U
102#define MAX_MPDU_SIZE		  2346U
103#define DEFAULT_BEACON_INTERVAL   100U
104#define	DEFAULT_SHORT_RETRY_LIMIT 7U
105#define	DEFAULT_LONG_RETRY_LIMIT  4U
106
107struct iwl_rx_mem_buffer {
108	dma_addr_t page_dma;
109	struct page *page;
110	struct list_head list;
111};
112
113#define rxb_addr(r) page_address(r->page)
114
115/* defined below */
116struct iwl_device_cmd;
117
118struct iwl_cmd_meta {
119	/* only for SYNC commands, iff the reply skb is wanted */
120	struct iwl_host_cmd *source;
121	/*
122	 * only for ASYNC commands
123	 * (which is somewhat stupid -- look at iwl-sta.c for instance
124	 * which duplicates a bunch of code because the callback isn't
125	 * invoked for SYNC commands, if it were and its result passed
126	 * through it would be simpler...)
127	 */
128	void (*callback)(struct iwl_priv *priv,
129			 struct iwl_device_cmd *cmd,
130			 struct iwl_rx_packet *pkt);
131
132	/* The CMD_SIZE_HUGE flag bit indicates that the command
133	 * structure is stored at the end of the shared queue memory. */
134	u32 flags;
135
136	DECLARE_PCI_UNMAP_ADDR(mapping)
137	DECLARE_PCI_UNMAP_LEN(len)
138};
139
140/*
141 * Generic queue structure
142 *
143 * Contains common data for Rx and Tx queues
144 */
145struct iwl_queue {
146	int n_bd;              /* number of BDs in this queue */
147	int write_ptr;       /* 1-st empty entry (index) host_w*/
148	int read_ptr;         /* last used entry (index) host_r*/
149	/* use for monitoring and recovering the stuck queue */
150	int last_read_ptr;      /* storing the last read_ptr */
151	/* number of time read_ptr and last_read_ptr are the same */
152	u8 repeat_same_read_ptr;
153	dma_addr_t dma_addr;   /* physical addr for BD's */
154	int n_window;	       /* safe queue window */
155	u32 id;
156	int low_mark;	       /* low watermark, resume queue if free
157				* space more than this */
158	int high_mark;         /* high watermark, stop queue if free
159				* space less than this */
160} __attribute__ ((packed));
161
162/* One for each TFD */
163struct iwl_tx_info {
164	struct sk_buff *skb[IWL_NUM_OF_TBS - 1];
165};
166
167/**
168 * struct iwl_tx_queue - Tx Queue for DMA
169 * @q: generic Rx/Tx queue descriptor
170 * @bd: base of circular buffer of TFDs
171 * @cmd: array of command/TX buffer pointers
172 * @meta: array of meta data for each command/tx buffer
173 * @dma_addr_cmd: physical address of cmd/tx buffer array
174 * @txb: array of per-TFD driver data
175 * @need_update: indicates need to update read/write index
176 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
177 *
178 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
179 * descriptors) and required locking structures.
180 */
181#define TFD_TX_CMD_SLOTS 256
182#define TFD_CMD_SLOTS 32
183
184struct iwl_tx_queue {
185	struct iwl_queue q;
186	void *tfds;
187	struct iwl_device_cmd **cmd;
188	struct iwl_cmd_meta *meta;
189	struct iwl_tx_info *txb;
190	u8 need_update;
191	u8 sched_retry;
192	u8 active;
193	u8 swq_id;
194};
195
196#define IWL_NUM_SCAN_RATES         (2)
197
198struct iwl4965_channel_tgd_info {
199	u8 type;
200	s8 max_power;
201};
202
203struct iwl4965_channel_tgh_info {
204	s64 last_radar_time;
205};
206
207#define IWL4965_MAX_RATE (33)
208
209struct iwl3945_clip_group {
210	/* maximum power level to prevent clipping for each rate, derived by
211	 *   us from this band's saturation power in EEPROM */
212	const s8 clip_powers[IWL_MAX_RATES];
213};
214
215/* current Tx power values to use, one for each rate for each channel.
216 * requested power is limited by:
217 * -- regulatory EEPROM limits for this channel
218 * -- hardware capabilities (clip-powers)
219 * -- spectrum management
220 * -- user preference (e.g. iwconfig)
221 * when requested power is set, base power index must also be set. */
222struct iwl3945_channel_power_info {
223	struct iwl3945_tx_power tpc;	/* actual radio and DSP gain settings */
224	s8 power_table_index;	/* actual (compenst'd) index into gain table */
225	s8 base_power_index;	/* gain index for power at factory temp. */
226	s8 requested_power;	/* power (dBm) requested for this chnl/rate */
227};
228
229/* current scan Tx power values to use, one for each scan rate for each
230 * channel. */
231struct iwl3945_scan_power_info {
232	struct iwl3945_tx_power tpc;	/* actual radio and DSP gain settings */
233	s8 power_table_index;	/* actual (compenst'd) index into gain table */
234	s8 requested_power;	/* scan pwr (dBm) requested for chnl/rate */
235};
236
237/*
238 * One for each channel, holds all channel setup data
239 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
240 *     with one another!
241 */
242struct iwl_channel_info {
243	struct iwl4965_channel_tgd_info tgd;
244	struct iwl4965_channel_tgh_info tgh;
245	struct iwl_eeprom_channel eeprom;	/* EEPROM regulatory limit */
246	struct iwl_eeprom_channel ht40_eeprom;	/* EEPROM regulatory limit for
247						 * HT40 channel */
248
249	u8 channel;	  /* channel number */
250	u8 flags;	  /* flags copied from EEPROM */
251	s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
252	s8 curr_txpow;	  /* (dBm) regulatory/spectrum/user (not h/w) limit */
253	s8 min_power;	  /* always 0 */
254	s8 scan_power;	  /* (dBm) regul. eeprom, direct scans, any rate */
255
256	u8 group_index;	  /* 0-4, maps channel to group1/2/3/4/5 */
257	u8 band_index;	  /* 0-4, maps channel to band1/2/3/4/5 */
258	enum ieee80211_band band;
259
260	/* HT40 channel info */
261	s8 ht40_max_power_avg;	/* (dBm) regul. eeprom, normal Tx, any rate */
262	u8 ht40_flags;		/* flags copied from EEPROM */
263	u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
264
265	/* Radio/DSP gain settings for each "normal" data Tx rate.
266	 * These include, in addition to RF and DSP gain, a few fields for
267	 *   remembering/modifying gain settings (indexes). */
268	struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
269
270	/* Radio/DSP gain settings for each scan rate, for directed scans. */
271	struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
272};
273
274#define IWL_TX_FIFO_BK		0
275#define IWL_TX_FIFO_BE		1
276#define IWL_TX_FIFO_VI		2
277#define IWL_TX_FIFO_VO		3
278#define IWL_TX_FIFO_UNUSED	-1
279
280/* Minimum number of queues. MAX_NUM is defined in hw specific files.
281 * Set the minimum to accommodate the 4 standard TX queues, 1 command
282 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
283#define IWL_MIN_NUM_QUEUES	10
284
285/*
286 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00,
287 * the driver maps it into the appropriate device FIFO for the
288 * uCode.
289 */
290#define IWL_CMD_QUEUE_NUM	4
291
292/* Power management (not Tx power) structures */
293
294enum iwl_pwr_src {
295	IWL_PWR_SRC_VMAIN,
296	IWL_PWR_SRC_VAUX,
297};
298
299#define IEEE80211_DATA_LEN              2304
300#define IEEE80211_4ADDR_LEN             30
301#define IEEE80211_HLEN                  (IEEE80211_4ADDR_LEN)
302#define IEEE80211_FRAME_LEN             (IEEE80211_DATA_LEN + IEEE80211_HLEN)
303
304struct iwl_frame {
305	union {
306		struct ieee80211_hdr frame;
307		struct iwl_tx_beacon_cmd beacon;
308		u8 raw[IEEE80211_FRAME_LEN];
309		u8 cmd[360];
310	} u;
311	struct list_head list;
312};
313
314#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
315#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
316#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
317
318enum {
319	CMD_SYNC = 0,
320	CMD_SIZE_NORMAL = 0,
321	CMD_NO_SKB = 0,
322	CMD_SIZE_HUGE = (1 << 0),
323	CMD_ASYNC = (1 << 1),
324	CMD_WANT_SKB = (1 << 2),
325};
326
327#define DEF_CMD_PAYLOAD_SIZE 320
328
329/**
330 * struct iwl_device_cmd
331 *
332 * For allocation of the command and tx queues, this establishes the overall
333 * size of the largest command we send to uCode, except for a scan command
334 * (which is relatively huge; space is allocated separately).
335 */
336struct iwl_device_cmd {
337	struct iwl_cmd_header hdr;	/* uCode API */
338	union {
339		u32 flags;
340		u8 val8;
341		u16 val16;
342		u32 val32;
343		struct iwl_tx_cmd tx;
344		struct iwl6000_channel_switch_cmd chswitch;
345		u8 payload[DEF_CMD_PAYLOAD_SIZE];
346	} __attribute__ ((packed)) cmd;
347} __attribute__ ((packed));
348
349#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
350
351
352struct iwl_host_cmd {
353	const void *data;
354	unsigned long reply_page;
355	void (*callback)(struct iwl_priv *priv,
356			 struct iwl_device_cmd *cmd,
357			 struct iwl_rx_packet *pkt);
358	u32 flags;
359	u16 len;
360	u8 id;
361};
362
363#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
364#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
365#define SUP_RATE_11G_MAX_NUM_CHANNELS  12
366
367/**
368 * struct iwl_rx_queue - Rx queue
369 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
370 * @dma_addr: bus address of buffer of receive buffer descriptors (rbd)
371 * @read: Shared index to newest available Rx buffer
372 * @write: Shared index to oldest written Rx packet
373 * @free_count: Number of pre-allocated buffers in rx_free
374 * @rx_free: list of free SKBs for use
375 * @rx_used: List of Rx buffers with no SKB
376 * @need_update: flag to indicate we need to update read/write index
377 * @rb_stts: driver's pointer to receive buffer status
378 * @rb_stts_dma: bus address of receive buffer status
379 *
380 * NOTE:  rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
381 */
382struct iwl_rx_queue {
383	__le32 *bd;
384	dma_addr_t dma_addr;
385	struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
386	struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
387	u32 read;
388	u32 write;
389	u32 free_count;
390	u32 write_actual;
391	struct list_head rx_free;
392	struct list_head rx_used;
393	int need_update;
394	struct iwl_rb_status *rb_stts;
395	dma_addr_t rb_stts_dma;
396	spinlock_t lock;
397};
398
399#define IWL_SUPPORTED_RATES_IE_LEN         8
400
401#define MAX_TID_COUNT        9
402
403#define IWL_INVALID_RATE     0xFF
404#define IWL_INVALID_VALUE    -1
405
406/**
407 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
408 * @txq_id: Tx queue used for Tx attempt
409 * @frame_count: # frames attempted by Tx command
410 * @wait_for_ba: Expect block-ack before next Tx reply
411 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
412 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
413 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
414 * @rate_n_flags: Rate at which Tx was attempted
415 *
416 * If REPLY_TX indicates that aggregation was attempted, driver must wait
417 * for block ack (REPLY_COMPRESSED_BA).  This struct stores tx reply info
418 * until block ack arrives.
419 */
420struct iwl_ht_agg {
421	u16 txq_id;
422	u16 frame_count;
423	u16 wait_for_ba;
424	u16 start_idx;
425	u64 bitmap;
426	u32 rate_n_flags;
427#define IWL_AGG_OFF 0
428#define IWL_AGG_ON 1
429#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
430#define IWL_EMPTYING_HW_QUEUE_DELBA 3
431	u8 state;
432};
433
434
435struct iwl_tid_data {
436	u16 seq_number;
437	u16 tfds_in_queue;
438	struct iwl_ht_agg agg;
439};
440
441struct iwl_hw_key {
442	enum ieee80211_key_alg alg;
443	int keylen;
444	u8 keyidx;
445	u8 key[32];
446};
447
448union iwl_ht_rate_supp {
449	u16 rates;
450	struct {
451		u8 siso_rate;
452		u8 mimo_rate;
453	};
454};
455
456#define CFG_HT_RX_AMPDU_FACTOR_DEF  (0x3)
457
458/*
459 * Maximal MPDU density for TX aggregation
460 * 4 - 2us density
461 * 5 - 4us density
462 * 6 - 8us density
463 * 7 - 16us density
464 */
465#define CFG_HT_MPDU_DENSITY_4USEC   (0x5)
466#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
467
468struct iwl_ht_config {
469	/* self configuration data */
470	bool is_ht;
471	bool is_40mhz;
472	bool single_chain_sufficient;
473	enum ieee80211_smps_mode smps; /* current smps mode */
474	/* BSS related data */
475	u8 extension_chan_offset;
476	u8 ht_protection;
477	u8 non_GF_STA_present;
478};
479
480/* QoS structures */
481struct iwl_qos_info {
482	int qos_active;
483	struct iwl_qosparam_cmd def_qos_parm;
484};
485
486/*
487 * Structure should be accessed with sta_lock held. When station addition
488 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
489 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
490 * held.
491 */
492struct iwl_station_entry {
493	struct iwl_addsta_cmd sta;
494	struct iwl_tid_data tid[MAX_TID_COUNT];
495	u8 used;
496	struct iwl_hw_key keyinfo;
497	struct iwl_link_quality_cmd *lq;
498};
499
500/*
501 * iwl_station_priv: Driver's private station information
502 *
503 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
504 * in the structure for use by driver. This structure is places in that
505 * space.
506 */
507struct iwl_station_priv {
508	struct iwl_lq_sta lq_sta;
509	atomic_t pending_frames;
510	bool client;
511	bool asleep;
512};
513
514/* one for each uCode image (inst/data, boot/init/runtime) */
515struct fw_desc {
516	void *v_addr;		/* access by driver */
517	dma_addr_t p_addr;	/* access by card's busmaster DMA */
518	u32 len;		/* bytes */
519};
520
521/* uCode file layout */
522struct iwl_ucode_header {
523	__le32 ver;	/* major/minor/API/serial */
524	union {
525		struct {
526			__le32 inst_size;	/* bytes of runtime code */
527			__le32 data_size;	/* bytes of runtime data */
528			__le32 init_size;	/* bytes of init code */
529			__le32 init_data_size;	/* bytes of init data */
530			__le32 boot_size;	/* bytes of bootstrap code */
531			u8 data[0];		/* in same order as sizes */
532		} v1;
533		struct {
534			__le32 build;		/* build number */
535			__le32 inst_size;	/* bytes of runtime code */
536			__le32 data_size;	/* bytes of runtime data */
537			__le32 init_size;	/* bytes of init code */
538			__le32 init_data_size;	/* bytes of init data */
539			__le32 boot_size;	/* bytes of bootstrap code */
540			u8 data[0];		/* in same order as sizes */
541		} v2;
542	} u;
543};
544#define UCODE_HEADER_SIZE(ver) ((ver) == 1 ? 24 : 28)
545
546struct iwl4965_ibss_seq {
547	u8 mac[ETH_ALEN];
548	u16 seq_num;
549	u16 frag_num;
550	unsigned long packet_time;
551	struct list_head list;
552};
553
554struct iwl_sensitivity_ranges {
555	u16 min_nrg_cck;
556	u16 max_nrg_cck;
557
558	u16 nrg_th_cck;
559	u16 nrg_th_ofdm;
560
561	u16 auto_corr_min_ofdm;
562	u16 auto_corr_min_ofdm_mrc;
563	u16 auto_corr_min_ofdm_x1;
564	u16 auto_corr_min_ofdm_mrc_x1;
565
566	u16 auto_corr_max_ofdm;
567	u16 auto_corr_max_ofdm_mrc;
568	u16 auto_corr_max_ofdm_x1;
569	u16 auto_corr_max_ofdm_mrc_x1;
570
571	u16 auto_corr_max_cck;
572	u16 auto_corr_max_cck_mrc;
573	u16 auto_corr_min_cck;
574	u16 auto_corr_min_cck_mrc;
575
576	u16 barker_corr_th_min;
577	u16 barker_corr_th_min_mrc;
578	u16 nrg_th_cca;
579};
580
581
582#define KELVIN_TO_CELSIUS(x) ((x)-273)
583#define CELSIUS_TO_KELVIN(x) ((x)+273)
584
585
586/**
587 * struct iwl_hw_params
588 * @max_txq_num: Max # Tx queues supported
589 * @dma_chnl_num: Number of Tx DMA/FIFO channels
590 * @scd_bc_tbls_size: size of scheduler byte count tables
591 * @tfd_size: TFD size
592 * @tx/rx_chains_num: Number of TX/RX chains
593 * @valid_tx/rx_ant: usable antennas
594 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
595 * @max_rxq_log: Log-base-2 of max_rxq_size
596 * @rx_page_order: Rx buffer page order
597 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
598 * @max_stations:
599 * @bcast_sta_id:
600 * @ht40_channel: is 40MHz width possible in band 2.4
601 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
602 * @sw_crypto: 0 for hw, 1 for sw
603 * @max_xxx_size: for ucode uses
604 * @ct_kill_threshold: temperature threshold
605 * @calib_init_cfg: setup initial calibrations for the hw
606 * @struct iwl_sensitivity_ranges: range of sensitivity values
607 */
608struct iwl_hw_params {
609	u8 max_txq_num;
610	u8 dma_chnl_num;
611	u16 scd_bc_tbls_size;
612	u32 tfd_size;
613	u8  tx_chains_num;
614	u8  rx_chains_num;
615	u8  valid_tx_ant;
616	u8  valid_rx_ant;
617	u16 max_rxq_size;
618	u16 max_rxq_log;
619	u32 rx_page_order;
620	u32 rx_wrt_ptr_reg;
621	u8  max_stations;
622	u8  bcast_sta_id;
623	u8  ht40_channel;
624	u8  max_beacon_itrvl;	/* in 1024 ms */
625	u32 max_inst_size;
626	u32 max_data_size;
627	u32 max_bsm_size;
628	u32 ct_kill_threshold; /* value in hw-dependent units */
629	u32 ct_kill_exit_threshold; /* value in hw-dependent units */
630				    /* for 1000, 6000 series and up */
631	u32 calib_init_cfg;
632	const struct iwl_sensitivity_ranges *sens;
633};
634
635
636/******************************************************************************
637 *
638 * Functions implemented in core module which are forward declared here
639 * for use by iwl-[4-5].c
640 *
641 * NOTE:  The implementation of these functions are not hardware specific
642 * which is why they are in the core module files.
643 *
644 * Naming convention --
645 * iwl_         <-- Is part of iwlwifi
646 * iwlXXXX_     <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
647 * iwl4965_bg_      <-- Called from work queue context
648 * iwl4965_mac_     <-- mac80211 callback
649 *
650 ****************************************************************************/
651extern void iwl_update_chain_flags(struct iwl_priv *priv);
652extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
653extern const u8 iwl_bcast_addr[ETH_ALEN];
654extern int iwl_rxq_stop(struct iwl_priv *priv);
655extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
656extern int iwl_queue_space(const struct iwl_queue *q);
657static inline int iwl_queue_used(const struct iwl_queue *q, int i)
658{
659	return q->write_ptr >= q->read_ptr ?
660		(i >= q->read_ptr && i < q->write_ptr) :
661		!(i < q->read_ptr && i >= q->write_ptr);
662}
663
664
665static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
666{
667	/*
668	 * This is for init calibration result and scan command which
669	 * required buffer > TFD_MAX_PAYLOAD_SIZE,
670	 * the big buffer at end of command array
671	 */
672	if (is_huge)
673		return q->n_window;	/* must be power of 2 */
674
675	/* Otherwise, use normal size buffers */
676	return index & (q->n_window - 1);
677}
678
679
680struct iwl_dma_ptr {
681	dma_addr_t dma;
682	void *addr;
683	size_t size;
684};
685
686#define IWL_OPERATION_MODE_AUTO     0
687#define IWL_OPERATION_MODE_HT_ONLY  1
688#define IWL_OPERATION_MODE_MIXED    2
689#define IWL_OPERATION_MODE_20MHZ    3
690
691#define IWL_TX_CRC_SIZE 4
692#define IWL_TX_DELIMITER_SIZE 4
693
694#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
695
696/* Sensitivity and chain noise calibration */
697#define INITIALIZATION_VALUE		0xFFFF
698#define IWL4965_CAL_NUM_BEACONS		20
699#define IWL_CAL_NUM_BEACONS		16
700#define MAXIMUM_ALLOWED_PATHLOSS	15
701
702#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
703
704#define MAX_FA_OFDM  50
705#define MIN_FA_OFDM  5
706#define MAX_FA_CCK   50
707#define MIN_FA_CCK   5
708
709#define AUTO_CORR_STEP_OFDM       1
710
711#define AUTO_CORR_STEP_CCK     3
712#define AUTO_CORR_MAX_TH_CCK   160
713
714#define NRG_DIFF               2
715#define NRG_STEP_CCK           2
716#define NRG_MARGIN             8
717#define MAX_NUMBER_CCK_NO_FA 100
718
719#define AUTO_CORR_CCK_MIN_VAL_DEF    (125)
720
721#define CHAIN_A             0
722#define CHAIN_B             1
723#define CHAIN_C             2
724#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
725#define ALL_BAND_FILTER			0xFF00
726#define IN_BAND_FILTER			0xFF
727#define MIN_AVERAGE_NOISE_MAX_VALUE	0xFFFFFFFF
728
729#define NRG_NUM_PREV_STAT_L     20
730#define NUM_RX_CHAINS           3
731
732enum iwl4965_false_alarm_state {
733	IWL_FA_TOO_MANY = 0,
734	IWL_FA_TOO_FEW = 1,
735	IWL_FA_GOOD_RANGE = 2,
736};
737
738enum iwl4965_chain_noise_state {
739	IWL_CHAIN_NOISE_ALIVE = 0,  /* must be 0 */
740	IWL_CHAIN_NOISE_ACCUMULATE,
741	IWL_CHAIN_NOISE_CALIBRATED,
742	IWL_CHAIN_NOISE_DONE,
743};
744
745enum iwl4965_calib_enabled_state {
746	IWL_CALIB_DISABLED = 0,  /* must be 0 */
747	IWL_CALIB_ENABLED = 1,
748};
749
750
751/*
752 * enum iwl_calib
753 * defines the order in which results of initial calibrations
754 * should be sent to the runtime uCode
755 */
756enum iwl_calib {
757	IWL_CALIB_XTAL,
758	IWL_CALIB_DC,
759	IWL_CALIB_LO,
760	IWL_CALIB_TX_IQ,
761	IWL_CALIB_TX_IQ_PERD,
762	IWL_CALIB_BASE_BAND,
763	IWL_CALIB_MAX
764};
765
766/* Opaque calibration results */
767struct iwl_calib_result {
768	void *buf;
769	size_t buf_len;
770};
771
772enum ucode_type {
773	UCODE_NONE = 0,
774	UCODE_INIT,
775	UCODE_RT
776};
777
778/* Sensitivity calib data */
779struct iwl_sensitivity_data {
780	u32 auto_corr_ofdm;
781	u32 auto_corr_ofdm_mrc;
782	u32 auto_corr_ofdm_x1;
783	u32 auto_corr_ofdm_mrc_x1;
784	u32 auto_corr_cck;
785	u32 auto_corr_cck_mrc;
786
787	u32 last_bad_plcp_cnt_ofdm;
788	u32 last_fa_cnt_ofdm;
789	u32 last_bad_plcp_cnt_cck;
790	u32 last_fa_cnt_cck;
791
792	u32 nrg_curr_state;
793	u32 nrg_prev_state;
794	u32 nrg_value[10];
795	u8  nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
796	u32 nrg_silence_ref;
797	u32 nrg_energy_idx;
798	u32 nrg_silence_idx;
799	u32 nrg_th_cck;
800	s32 nrg_auto_corr_silence_diff;
801	u32 num_in_cck_no_fa;
802	u32 nrg_th_ofdm;
803
804	u16 barker_corr_th_min;
805	u16 barker_corr_th_min_mrc;
806	u16 nrg_th_cca;
807};
808
809/* Chain noise (differential Rx gain) calib data */
810struct iwl_chain_noise_data {
811	u32 active_chains;
812	u32 chain_noise_a;
813	u32 chain_noise_b;
814	u32 chain_noise_c;
815	u32 chain_signal_a;
816	u32 chain_signal_b;
817	u32 chain_signal_c;
818	u16 beacon_count;
819	u8 disconn_array[NUM_RX_CHAINS];
820	u8 delta_gain_code[NUM_RX_CHAINS];
821	u8 radio_write;
822	u8 state;
823};
824
825#define	EEPROM_SEM_TIMEOUT 10		/* milliseconds */
826#define EEPROM_SEM_RETRY_LIMIT 1000	/* number of attempts (not time) */
827
828#define IWL_TRAFFIC_ENTRIES	(256)
829#define IWL_TRAFFIC_ENTRY_SIZE  (64)
830
831enum {
832	MEASUREMENT_READY = (1 << 0),
833	MEASUREMENT_ACTIVE = (1 << 1),
834};
835
836enum iwl_nvm_type {
837	NVM_DEVICE_TYPE_EEPROM = 0,
838	NVM_DEVICE_TYPE_OTP,
839};
840
841/*
842 * Two types of OTP memory access modes
843 *   IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
844 * 			        based on physical memory addressing
845 *   IWL_OTP_ACCESS_RELATIVE - relative address mode,
846 * 			       based on logical memory addressing
847 */
848enum iwl_access_mode {
849	IWL_OTP_ACCESS_ABSOLUTE,
850	IWL_OTP_ACCESS_RELATIVE,
851};
852
853/**
854 * enum iwl_pa_type - Power Amplifier type
855 * @IWL_PA_SYSTEM:  based on uCode configuration
856 * @IWL_PA_INTERNAL: use Internal only
857 */
858enum iwl_pa_type {
859	IWL_PA_SYSTEM = 0,
860	IWL_PA_INTERNAL = 1,
861};
862
863/* interrupt statistics */
864struct isr_statistics {
865	u32 hw;
866	u32 sw;
867	u32 sw_err;
868	u32 sch;
869	u32 alive;
870	u32 rfkill;
871	u32 ctkill;
872	u32 wakeup;
873	u32 rx;
874	u32 rx_handlers[REPLY_MAX];
875	u32 tx;
876	u32 unhandled;
877};
878
879#ifdef CONFIG_IWLWIFI_DEBUGFS
880/* management statistics */
881enum iwl_mgmt_stats {
882	MANAGEMENT_ASSOC_REQ = 0,
883	MANAGEMENT_ASSOC_RESP,
884	MANAGEMENT_REASSOC_REQ,
885	MANAGEMENT_REASSOC_RESP,
886	MANAGEMENT_PROBE_REQ,
887	MANAGEMENT_PROBE_RESP,
888	MANAGEMENT_BEACON,
889	MANAGEMENT_ATIM,
890	MANAGEMENT_DISASSOC,
891	MANAGEMENT_AUTH,
892	MANAGEMENT_DEAUTH,
893	MANAGEMENT_ACTION,
894	MANAGEMENT_MAX,
895};
896/* control statistics */
897enum iwl_ctrl_stats {
898	CONTROL_BACK_REQ =  0,
899	CONTROL_BACK,
900	CONTROL_PSPOLL,
901	CONTROL_RTS,
902	CONTROL_CTS,
903	CONTROL_ACK,
904	CONTROL_CFEND,
905	CONTROL_CFENDACK,
906	CONTROL_MAX,
907};
908
909struct traffic_stats {
910	u32 mgmt[MANAGEMENT_MAX];
911	u32 ctrl[CONTROL_MAX];
912	u32 data_cnt;
913	u64 data_bytes;
914};
915#else
916struct traffic_stats {
917	u64 data_bytes;
918};
919#endif
920
921/*
922 * iwl_switch_rxon: "channel switch" structure
923 *
924 * @ switch_in_progress: channel switch in progress
925 * @ channel: new channel
926 */
927struct iwl_switch_rxon {
928	bool switch_in_progress;
929	__le16 channel;
930};
931
932/*
933 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
934 * to perform continuous uCode event logging operation if enabled
935 */
936#define UCODE_TRACE_PERIOD (100)
937
938/*
939 * iwl_event_log: current uCode event log position
940 *
941 * @ucode_trace: enable/disable ucode continuous trace timer
942 * @num_wraps: how many times the event buffer wraps
943 * @next_entry:  the entry just before the next one that uCode would fill
944 * @non_wraps_count: counter for no wrap detected when dump ucode events
945 * @wraps_once_count: counter for wrap once detected when dump ucode events
946 * @wraps_more_count: counter for wrap more than once detected
947 *		      when dump ucode events
948 */
949struct iwl_event_log {
950	bool ucode_trace;
951	u32 num_wraps;
952	u32 next_entry;
953	int non_wraps_count;
954	int wraps_once_count;
955	int wraps_more_count;
956};
957
958/*
959 * host interrupt timeout value
960 * used with setting interrupt coalescing timer
961 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
962 *
963 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
964 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
965 */
966#define IWL_HOST_INT_TIMEOUT_MAX	(0xFF)
967#define IWL_HOST_INT_TIMEOUT_DEF	(0x40)
968#define IWL_HOST_INT_TIMEOUT_MIN	(0x0)
969#define IWL_HOST_INT_CALIB_TIMEOUT_MAX	(0xFF)
970#define IWL_HOST_INT_CALIB_TIMEOUT_DEF	(0x10)
971#define IWL_HOST_INT_CALIB_TIMEOUT_MIN	(0x0)
972
973/*
974 * This is the threshold value of plcp error rate per 100mSecs.  It is
975 * used to set and check for the validity of plcp_delta.
976 */
977#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN	(0)
978#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF	(50)
979#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	(100)
980#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	(200)
981#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX	(255)
982
983#define IWL_DELAY_NEXT_FORCE_RF_RESET  (HZ*3)
984#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
985
986/* timer constants use to monitor and recover stuck tx queues in mSecs */
987#define IWL_MONITORING_PERIOD  (1000)
988#define IWL_ONE_HUNDRED_MSECS   (100)
989#define IWL_SIXTY_SECS          (60000)
990
991enum iwl_reset {
992	IWL_RF_RESET = 0,
993	IWL_FW_RESET,
994	IWL_MAX_FORCE_RESET,
995};
996
997struct iwl_force_reset {
998	int reset_request_count;
999	int reset_success_count;
1000	int reset_reject_count;
1001	unsigned long reset_duration;
1002	unsigned long last_force_reset_jiffies;
1003};
1004
1005struct iwl_priv {
1006
1007	/* ieee device used by generic ieee processing code */
1008	struct ieee80211_hw *hw;
1009	struct ieee80211_channel *ieee_channels;
1010	struct ieee80211_rate *ieee_rates;
1011	struct iwl_cfg *cfg;
1012
1013	/* temporary frame storage list */
1014	struct list_head free_frames;
1015	int frames_count;
1016
1017	enum ieee80211_band band;
1018	int alloc_rxb_page;
1019
1020	void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
1021				       struct iwl_rx_mem_buffer *rxb);
1022
1023	struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1024
1025	/* spectrum measurement report caching */
1026	struct iwl_spectrum_notification measure_report;
1027	u8 measurement_status;
1028
1029	/* ucode beacon time */
1030	u32 ucode_beacon_time;
1031	int missed_beacon_threshold;
1032
1033	/* storing the jiffies when the plcp error rate is received */
1034	unsigned long plcp_jiffies;
1035
1036	/* force reset */
1037	struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
1038
1039	/* we allocate array of iwl4965_channel_info for NIC's valid channels.
1040	 *    Access via channel # using indirect index array */
1041	struct iwl_channel_info *channel_info;	/* channel info array */
1042	u8 channel_count;	/* # of channels */
1043
1044	/* thermal calibration */
1045	s32 temperature;	/* degrees Kelvin */
1046	s32 last_temperature;
1047
1048	/* init calibration results */
1049	struct iwl_calib_result calib_results[IWL_CALIB_MAX];
1050
1051	/* Scan related variables */
1052	unsigned long scan_start;
1053	unsigned long scan_start_tsf;
1054	void *scan_cmd;
1055	enum ieee80211_band scan_band;
1056	struct cfg80211_scan_request *scan_request;
1057	bool is_internal_short_scan;
1058	u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1059	u8 mgmt_tx_ant;
1060
1061	/* spinlock */
1062	spinlock_t lock;	/* protect general shared data */
1063	spinlock_t hcmd_lock;	/* protect hcmd */
1064	spinlock_t reg_lock;	/* protect hw register access */
1065	struct mutex mutex;
1066	struct mutex sync_cmd_mutex; /* enable serialization of sync commands */
1067
1068	/* basic pci-network driver stuff */
1069	struct pci_dev *pci_dev;
1070
1071	/* pci hardware address support */
1072	void __iomem *hw_base;
1073	u32  hw_rev;
1074	u32  hw_wa_rev;
1075	u8   rev_id;
1076
1077	/* uCode images, save to reload in case of failure */
1078	int fw_index;			/* firmware we're trying to load */
1079	u32 ucode_ver;			/* version of ucode, copy of
1080					   iwl_ucode.ver */
1081	struct fw_desc ucode_code;	/* runtime inst */
1082	struct fw_desc ucode_data;	/* runtime data original */
1083	struct fw_desc ucode_data_backup;	/* runtime data save/restore */
1084	struct fw_desc ucode_init;	/* initialization inst */
1085	struct fw_desc ucode_init_data;	/* initialization data */
1086	struct fw_desc ucode_boot;	/* bootstrap inst */
1087	enum ucode_type ucode_type;
1088	u8 ucode_write_complete;	/* the image write is complete */
1089	char firmware_name[25];
1090
1091
1092	struct iwl_rxon_time_cmd rxon_timing;
1093
1094	/* We declare this const so it can only be
1095	 * changed via explicit cast within the
1096	 * routines that actually update the physical
1097	 * hardware */
1098	const struct iwl_rxon_cmd active_rxon;
1099	struct iwl_rxon_cmd staging_rxon;
1100
1101	struct iwl_switch_rxon switch_rxon;
1102
1103	/* 1st responses from initialize and runtime uCode images.
1104	 * 4965's initialize alive response contains some calibration data. */
1105	struct iwl_init_alive_resp card_alive_init;
1106	struct iwl_alive_resp card_alive;
1107
1108	unsigned long last_blink_time;
1109	u8 last_blink_rate;
1110	u8 allow_blinking;
1111	u64 led_tpt;
1112
1113	u16 active_rate;
1114
1115	u8 start_calib;
1116	struct iwl_sensitivity_data sensitivity_data;
1117	struct iwl_chain_noise_data chain_noise_data;
1118	__le16 sensitivity_tbl[HD_TABLE_SIZE];
1119
1120	struct iwl_ht_config current_ht_config;
1121
1122	/* Rate scaling data */
1123	u8 retry_rate;
1124
1125	wait_queue_head_t wait_command_queue;
1126
1127	int activity_timer_active;
1128
1129	/* Rx and Tx DMA processing queues */
1130	struct iwl_rx_queue rxq;
1131	struct iwl_tx_queue *txq;
1132	unsigned long txq_ctx_active_msk;
1133	struct iwl_dma_ptr  kw;	/* keep warm address */
1134	struct iwl_dma_ptr  scd_bc_tbls;
1135
1136	u32 scd_base_addr;	/* scheduler sram base address */
1137
1138	unsigned long status;
1139
1140	/* counts mgmt, ctl, and data packets */
1141	struct traffic_stats tx_stats;
1142	struct traffic_stats rx_stats;
1143
1144	/* counts interrupts */
1145	struct isr_statistics isr_stats;
1146
1147	struct iwl_power_mgr power_data;
1148	struct iwl_tt_mgmt thermal_throttle;
1149
1150	struct iwl_notif_statistics statistics;
1151#ifdef CONFIG_IWLWIFI_DEBUG
1152	struct iwl_notif_statistics accum_statistics;
1153	struct iwl_notif_statistics delta_statistics;
1154	struct iwl_notif_statistics max_delta;
1155#endif
1156
1157	/* context information */
1158	u8 bssid[ETH_ALEN];
1159	u16 rts_threshold;
1160	u8 mac_addr[ETH_ALEN];
1161
1162	/*station table variables */
1163	spinlock_t sta_lock;
1164	int num_stations;
1165	struct iwl_station_entry stations[IWL_STATION_COUNT];
1166	struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; /* protected by mutex */
1167	u8 key_mapping_key;
1168	unsigned long ucode_key_table;
1169
1170	/* queue refcounts */
1171#define IWL_MAX_HW_QUEUES	32
1172	unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1173	/* for each AC */
1174	atomic_t queue_stop_count[4];
1175
1176	/* Indication if ieee80211_ops->open has been called */
1177	u8 is_open;
1178
1179	u8 mac80211_registered;
1180
1181	/* eeprom -- this is in the card's little endian byte order */
1182	u8 *eeprom;
1183	int    nvm_device_type;
1184	struct iwl_eeprom_calib_info *calib_info;
1185
1186	enum nl80211_iftype iw_mode;
1187
1188	struct sk_buff *ibss_beacon;
1189
1190	/* Last Rx'd beacon timestamp */
1191	u64 timestamp;
1192	u16 beacon_int;
1193	struct ieee80211_vif *vif;
1194
1195	union {
1196#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1197		struct {
1198			void *shared_virt;
1199			dma_addr_t shared_phys;
1200
1201			struct delayed_work thermal_periodic;
1202			struct delayed_work rfkill_poll;
1203
1204			struct iwl3945_notif_statistics statistics;
1205
1206			u32 sta_supp_rates;
1207			int last_rx_rssi;	/* From Rx packet statistics */
1208
1209			/* Rx'd packet timing information */
1210			u32 last_beacon_time;
1211			u64 last_tsf;
1212
1213			/*
1214			 * each calibration channel group in the
1215			 * EEPROM has a derived clip setting for
1216			 * each rate.
1217			 */
1218			const struct iwl3945_clip_group clip_groups[5];
1219
1220		} _3945;
1221#endif
1222#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
1223		struct {
1224			/* INT ICT Table */
1225			__le32 *ict_tbl;
1226			void *ict_tbl_vir;
1227			dma_addr_t ict_tbl_dma;
1228			dma_addr_t aligned_ict_tbl_dma;
1229			int ict_index;
1230			u32 inta;
1231			bool use_ict;
1232			/*
1233			 * reporting the number of tids has AGG on. 0 means
1234			 * no AGGREGATION
1235			 */
1236			u8 agg_tids_count;
1237
1238			struct iwl_rx_phy_res last_phy_res;
1239			bool last_phy_res_valid;
1240		} _agn;
1241#endif
1242	};
1243
1244	struct iwl_hw_params hw_params;
1245
1246	u32 inta_mask;
1247	/* Current association information needed to configure the
1248	 * hardware */
1249	u16 assoc_id;
1250	u16 assoc_capability;
1251
1252	struct iwl_qos_info qos_data;
1253
1254	struct workqueue_struct *workqueue;
1255
1256	struct work_struct restart;
1257	struct work_struct scan_completed;
1258	struct work_struct rx_replenish;
1259	struct work_struct abort_scan;
1260	struct work_struct beacon_update;
1261	struct work_struct tt_work;
1262	struct work_struct ct_enter;
1263	struct work_struct ct_exit;
1264	struct work_struct start_internal_scan;
1265
1266	struct tasklet_struct irq_tasklet;
1267
1268	struct delayed_work init_alive_start;
1269	struct delayed_work alive_start;
1270	struct delayed_work scan_check;
1271
1272	/* TX Power */
1273	s8 tx_power_user_lmt;
1274	s8 tx_power_device_lmt;
1275	s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
1276
1277
1278#ifdef CONFIG_IWLWIFI_DEBUG
1279	/* debugging info */
1280	u32 debug_level; /* per device debugging will override global
1281			    iwl_debug_level if set */
1282	u32 framecnt_to_us;
1283	atomic_t restrict_refcnt;
1284	bool disable_ht40;
1285#ifdef CONFIG_IWLWIFI_DEBUGFS
1286	/* debugfs */
1287	u16 tx_traffic_idx;
1288	u16 rx_traffic_idx;
1289	u8 *tx_traffic;
1290	u8 *rx_traffic;
1291	struct dentry *debugfs_dir;
1292	u32 dbgfs_sram_offset, dbgfs_sram_len;
1293#endif /* CONFIG_IWLWIFI_DEBUGFS */
1294#endif /* CONFIG_IWLWIFI_DEBUG */
1295
1296	struct work_struct txpower_work;
1297	u32 disable_sens_cal;
1298	u32 disable_chain_noise_cal;
1299	u32 disable_tx_power_cal;
1300	struct work_struct run_time_calib_work;
1301	struct timer_list statistics_periodic;
1302	struct timer_list ucode_trace;
1303	struct timer_list monitor_recover;
1304	bool hw_ready;
1305
1306	struct iwl_event_log event_log;
1307}; /*iwl_priv */
1308
1309static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1310{
1311	set_bit(txq_id, &priv->txq_ctx_active_msk);
1312}
1313
1314static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1315{
1316	clear_bit(txq_id, &priv->txq_ctx_active_msk);
1317}
1318
1319#ifdef CONFIG_IWLWIFI_DEBUG
1320const char *iwl_get_tx_fail_reason(u32 status);
1321/*
1322 * iwl_get_debug_level: Return active debug level for device
1323 *
1324 * Using sysfs it is possible to set per device debug level. This debug
1325 * level will be used if set, otherwise the global debug level which can be
1326 * set via module parameter is used.
1327 */
1328static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1329{
1330	if (priv->debug_level)
1331		return priv->debug_level;
1332	else
1333		return iwl_debug_level;
1334}
1335#else
1336static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1337
1338static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1339{
1340	return iwl_debug_level;
1341}
1342#endif
1343
1344
1345static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1346							 int txq_id, int idx)
1347{
1348	if (priv->txq[txq_id].txb[idx].skb[0])
1349		return (struct ieee80211_hdr *)priv->txq[txq_id].
1350				txb[idx].skb[0]->data;
1351	return NULL;
1352}
1353
1354
1355static inline int iwl_is_associated(struct iwl_priv *priv)
1356{
1357	return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1358}
1359
1360static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
1361{
1362	if (ch_info == NULL)
1363		return 0;
1364	return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1365}
1366
1367static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
1368{
1369	return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1370}
1371
1372static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
1373{
1374	return ch_info->band == IEEE80211_BAND_5GHZ;
1375}
1376
1377static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
1378{
1379	return ch_info->band == IEEE80211_BAND_2GHZ;
1380}
1381
1382static inline int is_channel_passive(const struct iwl_channel_info *ch)
1383{
1384	return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1385}
1386
1387static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1388{
1389	return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1390}
1391
1392static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1393{
1394	__free_pages(page, priv->hw_params.rx_page_order);
1395	priv->alloc_rxb_page--;
1396}
1397
1398static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1399{
1400	free_pages(page, priv->hw_params.rx_page_order);
1401	priv->alloc_rxb_page--;
1402}
1403#endif				/* __iwl_dev_h__ */
1404