iwl-dev.h revision bb9c03d8a6893517737b16fdbeb54be3c73b3023
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 *  Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26/*
27 * Please use this file (iwl-dev.h) for driver implementation definitions.
28 * Please use iwl-commands.h for uCode API definitions.
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
34
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
39#include "iwl-eeprom.h"
40#include "iwl-csr.h"
41#include "iwl-prph.h"
42#include "iwl-fh.h"
43#include "iwl-debug.h"
44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
46#include "iwl-agn-hw.h"
47#include "iwl-led.h"
48#include "iwl-power.h"
49#include "iwl-agn-rs.h"
50
51struct iwl_tx_queue;
52
53/* CT-KILL constants */
54#define CT_KILL_THRESHOLD_LEGACY   110 /* in Celsius */
55#define CT_KILL_THRESHOLD	   114 /* in Celsius */
56#define CT_KILL_EXIT_THRESHOLD     95  /* in Celsius */
57
58/* Default noise level to report when noise measurement is not available.
59 *   This may be because we're:
60 *   1)  Not associated (4965, no beacon statistics being sent to driver)
61 *   2)  Scanning (noise measurement does not apply to associated channel)
62 *   3)  Receiving CCK (3945 delivers noise info only for OFDM frames)
63 * Use default noise value of -127 ... this is below the range of measurable
64 *   Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
65 *   Also, -127 works better than 0 when averaging frames with/without
66 *   noise info (e.g. averaging might be done in app); measured dBm values are
67 *   always negative ... using a negative value as the default keeps all
68 *   averages within an s8's (used in some apps) range of negative values. */
69#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
70
71/*
72 * RTS threshold here is total size [2347] minus 4 FCS bytes
73 * Per spec:
74 *   a value of 0 means RTS on all data/management packets
75 *   a value > max MSDU size means no RTS
76 * else RTS for data/management frames where MPDU is larger
77 *   than RTS value.
78 */
79#define DEFAULT_RTS_THRESHOLD     2347U
80#define MIN_RTS_THRESHOLD         0U
81#define MAX_RTS_THRESHOLD         2347U
82#define MAX_MSDU_SIZE		  2304U
83#define MAX_MPDU_SIZE		  2346U
84#define DEFAULT_BEACON_INTERVAL   100U
85#define	DEFAULT_SHORT_RETRY_LIMIT 7U
86#define	DEFAULT_LONG_RETRY_LIMIT  4U
87
88struct iwl_rx_mem_buffer {
89	dma_addr_t page_dma;
90	struct page *page;
91	struct list_head list;
92};
93
94#define rxb_addr(r) page_address(r->page)
95
96/* defined below */
97struct iwl_device_cmd;
98
99struct iwl_cmd_meta {
100	/* only for SYNC commands, iff the reply skb is wanted */
101	struct iwl_host_cmd *source;
102	/*
103	 * only for ASYNC commands
104	 * (which is somewhat stupid -- look at iwl-sta.c for instance
105	 * which duplicates a bunch of code because the callback isn't
106	 * invoked for SYNC commands, if it were and its result passed
107	 * through it would be simpler...)
108	 */
109	void (*callback)(struct iwl_priv *priv,
110			 struct iwl_device_cmd *cmd,
111			 struct iwl_rx_packet *pkt);
112
113	/* The CMD_SIZE_HUGE flag bit indicates that the command
114	 * structure is stored at the end of the shared queue memory. */
115	u32 flags;
116
117	DEFINE_DMA_UNMAP_ADDR(mapping);
118	DEFINE_DMA_UNMAP_LEN(len);
119};
120
121/*
122 * Generic queue structure
123 *
124 * Contains common data for Rx and Tx queues
125 */
126struct iwl_queue {
127	int n_bd;              /* number of BDs in this queue */
128	int write_ptr;       /* 1-st empty entry (index) host_w*/
129	int read_ptr;         /* last used entry (index) host_r*/
130	/* use for monitoring and recovering the stuck queue */
131	int last_read_ptr;      /* storing the last read_ptr */
132	/* number of time read_ptr and last_read_ptr are the same */
133	u8 repeat_same_read_ptr;
134	dma_addr_t dma_addr;   /* physical addr for BD's */
135	int n_window;	       /* safe queue window */
136	u32 id;
137	int low_mark;	       /* low watermark, resume queue if free
138				* space more than this */
139	int high_mark;         /* high watermark, stop queue if free
140				* space less than this */
141} __packed;
142
143/* One for each TFD */
144struct iwl_tx_info {
145	struct sk_buff *skb;
146};
147
148/**
149 * struct iwl_tx_queue - Tx Queue for DMA
150 * @q: generic Rx/Tx queue descriptor
151 * @bd: base of circular buffer of TFDs
152 * @cmd: array of command/TX buffer pointers
153 * @meta: array of meta data for each command/tx buffer
154 * @dma_addr_cmd: physical address of cmd/tx buffer array
155 * @txb: array of per-TFD driver data
156 * @need_update: indicates need to update read/write index
157 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
158 *
159 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
160 * descriptors) and required locking structures.
161 */
162#define TFD_TX_CMD_SLOTS 256
163#define TFD_CMD_SLOTS 32
164
165struct iwl_tx_queue {
166	struct iwl_queue q;
167	void *tfds;
168	struct iwl_device_cmd **cmd;
169	struct iwl_cmd_meta *meta;
170	struct iwl_tx_info *txb;
171	u8 need_update;
172	u8 sched_retry;
173	u8 active;
174	u8 swq_id;
175};
176
177#define IWL_NUM_SCAN_RATES         (2)
178
179struct iwl4965_channel_tgd_info {
180	u8 type;
181	s8 max_power;
182};
183
184struct iwl4965_channel_tgh_info {
185	s64 last_radar_time;
186};
187
188#define IWL4965_MAX_RATE (33)
189
190struct iwl3945_clip_group {
191	/* maximum power level to prevent clipping for each rate, derived by
192	 *   us from this band's saturation power in EEPROM */
193	const s8 clip_powers[IWL_MAX_RATES];
194};
195
196/* current Tx power values to use, one for each rate for each channel.
197 * requested power is limited by:
198 * -- regulatory EEPROM limits for this channel
199 * -- hardware capabilities (clip-powers)
200 * -- spectrum management
201 * -- user preference (e.g. iwconfig)
202 * when requested power is set, base power index must also be set. */
203struct iwl3945_channel_power_info {
204	struct iwl3945_tx_power tpc;	/* actual radio and DSP gain settings */
205	s8 power_table_index;	/* actual (compenst'd) index into gain table */
206	s8 base_power_index;	/* gain index for power at factory temp. */
207	s8 requested_power;	/* power (dBm) requested for this chnl/rate */
208};
209
210/* current scan Tx power values to use, one for each scan rate for each
211 * channel. */
212struct iwl3945_scan_power_info {
213	struct iwl3945_tx_power tpc;	/* actual radio and DSP gain settings */
214	s8 power_table_index;	/* actual (compenst'd) index into gain table */
215	s8 requested_power;	/* scan pwr (dBm) requested for chnl/rate */
216};
217
218/*
219 * One for each channel, holds all channel setup data
220 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
221 *     with one another!
222 */
223struct iwl_channel_info {
224	struct iwl4965_channel_tgd_info tgd;
225	struct iwl4965_channel_tgh_info tgh;
226	struct iwl_eeprom_channel eeprom;	/* EEPROM regulatory limit */
227	struct iwl_eeprom_channel ht40_eeprom;	/* EEPROM regulatory limit for
228						 * HT40 channel */
229
230	u8 channel;	  /* channel number */
231	u8 flags;	  /* flags copied from EEPROM */
232	s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
233	s8 curr_txpow;	  /* (dBm) regulatory/spectrum/user (not h/w) limit */
234	s8 min_power;	  /* always 0 */
235	s8 scan_power;	  /* (dBm) regul. eeprom, direct scans, any rate */
236
237	u8 group_index;	  /* 0-4, maps channel to group1/2/3/4/5 */
238	u8 band_index;	  /* 0-4, maps channel to band1/2/3/4/5 */
239	enum ieee80211_band band;
240
241	/* HT40 channel info */
242	s8 ht40_max_power_avg;	/* (dBm) regul. eeprom, normal Tx, any rate */
243	u8 ht40_flags;		/* flags copied from EEPROM */
244	u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
245
246	/* Radio/DSP gain settings for each "normal" data Tx rate.
247	 * These include, in addition to RF and DSP gain, a few fields for
248	 *   remembering/modifying gain settings (indexes). */
249	struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
250
251	/* Radio/DSP gain settings for each scan rate, for directed scans. */
252	struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
253};
254
255#define IWL_TX_FIFO_BK		0
256#define IWL_TX_FIFO_BE		1
257#define IWL_TX_FIFO_VI		2
258#define IWL_TX_FIFO_VO		3
259#define IWL_TX_FIFO_UNUSED	-1
260
261/* Minimum number of queues. MAX_NUM is defined in hw specific files.
262 * Set the minimum to accommodate the 4 standard TX queues, 1 command
263 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
264#define IWL_MIN_NUM_QUEUES	10
265
266/*
267 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00,
268 * the driver maps it into the appropriate device FIFO for the
269 * uCode.
270 */
271#define IWL_CMD_QUEUE_NUM	4
272
273/* Power management (not Tx power) structures */
274
275enum iwl_pwr_src {
276	IWL_PWR_SRC_VMAIN,
277	IWL_PWR_SRC_VAUX,
278};
279
280#define IEEE80211_DATA_LEN              2304
281#define IEEE80211_4ADDR_LEN             30
282#define IEEE80211_HLEN                  (IEEE80211_4ADDR_LEN)
283#define IEEE80211_FRAME_LEN             (IEEE80211_DATA_LEN + IEEE80211_HLEN)
284
285struct iwl_frame {
286	union {
287		struct ieee80211_hdr frame;
288		struct iwl_tx_beacon_cmd beacon;
289		u8 raw[IEEE80211_FRAME_LEN];
290		u8 cmd[360];
291	} u;
292	struct list_head list;
293};
294
295#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
296#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
297#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
298
299enum {
300	CMD_SYNC = 0,
301	CMD_SIZE_NORMAL = 0,
302	CMD_NO_SKB = 0,
303	CMD_SIZE_HUGE = (1 << 0),
304	CMD_ASYNC = (1 << 1),
305	CMD_WANT_SKB = (1 << 2),
306};
307
308#define DEF_CMD_PAYLOAD_SIZE 320
309
310/**
311 * struct iwl_device_cmd
312 *
313 * For allocation of the command and tx queues, this establishes the overall
314 * size of the largest command we send to uCode, except for a scan command
315 * (which is relatively huge; space is allocated separately).
316 */
317struct iwl_device_cmd {
318	struct iwl_cmd_header hdr;	/* uCode API */
319	union {
320		u32 flags;
321		u8 val8;
322		u16 val16;
323		u32 val32;
324		struct iwl_tx_cmd tx;
325		struct iwl6000_channel_switch_cmd chswitch;
326		u8 payload[DEF_CMD_PAYLOAD_SIZE];
327	} __packed cmd;
328} __packed;
329
330#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
331
332
333struct iwl_host_cmd {
334	const void *data;
335	unsigned long reply_page;
336	void (*callback)(struct iwl_priv *priv,
337			 struct iwl_device_cmd *cmd,
338			 struct iwl_rx_packet *pkt);
339	u32 flags;
340	u16 len;
341	u8 id;
342};
343
344#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
345#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
346#define SUP_RATE_11G_MAX_NUM_CHANNELS  12
347
348/**
349 * struct iwl_rx_queue - Rx queue
350 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
351 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
352 * @read: Shared index to newest available Rx buffer
353 * @write: Shared index to oldest written Rx packet
354 * @free_count: Number of pre-allocated buffers in rx_free
355 * @rx_free: list of free SKBs for use
356 * @rx_used: List of Rx buffers with no SKB
357 * @need_update: flag to indicate we need to update read/write index
358 * @rb_stts: driver's pointer to receive buffer status
359 * @rb_stts_dma: bus address of receive buffer status
360 *
361 * NOTE:  rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
362 */
363struct iwl_rx_queue {
364	__le32 *bd;
365	dma_addr_t bd_dma;
366	struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
367	struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
368	u32 read;
369	u32 write;
370	u32 free_count;
371	u32 write_actual;
372	struct list_head rx_free;
373	struct list_head rx_used;
374	int need_update;
375	struct iwl_rb_status *rb_stts;
376	dma_addr_t rb_stts_dma;
377	spinlock_t lock;
378};
379
380#define IWL_SUPPORTED_RATES_IE_LEN         8
381
382#define MAX_TID_COUNT        9
383
384#define IWL_INVALID_RATE     0xFF
385#define IWL_INVALID_VALUE    -1
386
387/**
388 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
389 * @txq_id: Tx queue used for Tx attempt
390 * @frame_count: # frames attempted by Tx command
391 * @wait_for_ba: Expect block-ack before next Tx reply
392 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
393 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
394 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
395 * @rate_n_flags: Rate at which Tx was attempted
396 *
397 * If REPLY_TX indicates that aggregation was attempted, driver must wait
398 * for block ack (REPLY_COMPRESSED_BA).  This struct stores tx reply info
399 * until block ack arrives.
400 */
401struct iwl_ht_agg {
402	u16 txq_id;
403	u16 frame_count;
404	u16 wait_for_ba;
405	u16 start_idx;
406	u64 bitmap;
407	u32 rate_n_flags;
408#define IWL_AGG_OFF 0
409#define IWL_AGG_ON 1
410#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
411#define IWL_EMPTYING_HW_QUEUE_DELBA 3
412	u8 state;
413};
414
415
416struct iwl_tid_data {
417	u16 seq_number; /* agn only */
418	u16 tfds_in_queue;
419	struct iwl_ht_agg agg;
420};
421
422struct iwl_hw_key {
423	enum ieee80211_key_alg alg;
424	int keylen;
425	u8 keyidx;
426	u8 key[32];
427};
428
429union iwl_ht_rate_supp {
430	u16 rates;
431	struct {
432		u8 siso_rate;
433		u8 mimo_rate;
434	};
435};
436
437#define CFG_HT_RX_AMPDU_FACTOR_DEF  (0x3)
438
439/*
440 * Maximal MPDU density for TX aggregation
441 * 4 - 2us density
442 * 5 - 4us density
443 * 6 - 8us density
444 * 7 - 16us density
445 */
446#define CFG_HT_MPDU_DENSITY_4USEC   (0x5)
447#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
448
449struct iwl_ht_config {
450	/* self configuration data */
451	bool is_ht;
452	bool is_40mhz;
453	bool single_chain_sufficient;
454	enum ieee80211_smps_mode smps; /* current smps mode */
455	/* BSS related data */
456	u8 extension_chan_offset;
457	u8 ht_protection;
458	u8 non_GF_STA_present;
459};
460
461/* QoS structures */
462struct iwl_qos_info {
463	int qos_active;
464	struct iwl_qosparam_cmd def_qos_parm;
465};
466
467/*
468 * Structure should be accessed with sta_lock held. When station addition
469 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only
470 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock
471 * held.
472 */
473struct iwl_station_entry {
474	struct iwl_addsta_cmd sta;
475	struct iwl_tid_data tid[MAX_TID_COUNT];
476	u8 used;
477	struct iwl_hw_key keyinfo;
478	struct iwl_link_quality_cmd *lq;
479};
480
481struct iwl_station_priv_common {
482	u8 sta_id;
483};
484
485/*
486 * iwl_station_priv: Driver's private station information
487 *
488 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
489 * in the structure for use by driver. This structure is places in that
490 * space.
491 *
492 * The common struct MUST be first because it is shared between
493 * 3945 and agn!
494 */
495struct iwl_station_priv {
496	struct iwl_station_priv_common common;
497	struct iwl_lq_sta lq_sta;
498	atomic_t pending_frames;
499	bool client;
500	bool asleep;
501};
502
503/**
504 * struct iwl_vif_priv - driver's private per-interface information
505 *
506 * When mac80211 allocates a virtual interface, it can allocate
507 * space for us to put data into.
508 */
509struct iwl_vif_priv {
510	u8 ibss_bssid_sta_id;
511};
512
513/* one for each uCode image (inst/data, boot/init/runtime) */
514struct fw_desc {
515	void *v_addr;		/* access by driver */
516	dma_addr_t p_addr;	/* access by card's busmaster DMA */
517	u32 len;		/* bytes */
518};
519
520/* v1/v2 uCode file layout */
521struct iwl_ucode_header {
522	__le32 ver;	/* major/minor/API/serial */
523	union {
524		struct {
525			__le32 inst_size;	/* bytes of runtime code */
526			__le32 data_size;	/* bytes of runtime data */
527			__le32 init_size;	/* bytes of init code */
528			__le32 init_data_size;	/* bytes of init data */
529			__le32 boot_size;	/* bytes of bootstrap code */
530			u8 data[0];		/* in same order as sizes */
531		} v1;
532		struct {
533			__le32 build;		/* build number */
534			__le32 inst_size;	/* bytes of runtime code */
535			__le32 data_size;	/* bytes of runtime data */
536			__le32 init_size;	/* bytes of init code */
537			__le32 init_data_size;	/* bytes of init data */
538			__le32 boot_size;	/* bytes of bootstrap code */
539			u8 data[0];		/* in same order as sizes */
540		} v2;
541	} u;
542};
543
544/*
545 * new TLV uCode file layout
546 *
547 * The new TLV file format contains TLVs, that each specify
548 * some piece of data. To facilitate "groups", for example
549 * different instruction image with different capabilities,
550 * bundled with the same init image, an alternative mechanism
551 * is provided:
552 * When the alternative field is 0, that means that the item
553 * is always valid. When it is non-zero, then it is only
554 * valid in conjunction with items of the same alternative,
555 * in which case the driver (user) selects one alternative
556 * to use.
557 */
558
559enum iwl_ucode_tlv_type {
560	IWL_UCODE_TLV_INVALID		= 0, /* unused */
561	IWL_UCODE_TLV_INST		= 1,
562	IWL_UCODE_TLV_DATA		= 2,
563	IWL_UCODE_TLV_INIT		= 3,
564	IWL_UCODE_TLV_INIT_DATA		= 4,
565	IWL_UCODE_TLV_BOOT		= 5,
566	IWL_UCODE_TLV_PROBE_MAX_LEN	= 6, /* a u32 value */
567	IWL_UCODE_TLV_RUNT_EVTLOG_PTR	= 8,
568	IWL_UCODE_TLV_RUNT_EVTLOG_SIZE	= 9,
569	IWL_UCODE_TLV_RUNT_ERRLOG_PTR	= 10,
570	IWL_UCODE_TLV_INIT_EVTLOG_PTR	= 11,
571	IWL_UCODE_TLV_INIT_EVTLOG_SIZE	= 12,
572	IWL_UCODE_TLV_INIT_ERRLOG_PTR	= 13,
573};
574
575struct iwl_ucode_tlv {
576	__le16 type;		/* see above */
577	__le16 alternative;	/* see comment */
578	__le32 length;		/* not including type/length fields */
579	u8 data[0];
580} __packed;
581
582#define IWL_TLV_UCODE_MAGIC	0x0a4c5749
583
584struct iwl_tlv_ucode_header {
585	/*
586	 * The TLV style ucode header is distinguished from
587	 * the v1/v2 style header by first four bytes being
588	 * zero, as such is an invalid combination of
589	 * major/minor/API/serial versions.
590	 */
591	__le32 zero;
592	__le32 magic;
593	u8 human_readable[64];
594	__le32 ver;		/* major/minor/API/serial */
595	__le32 build;
596	__le64 alternatives;	/* bitmask of valid alternatives */
597	/*
598	 * The data contained herein has a TLV layout,
599	 * see above for the TLV header and types.
600	 * Note that each TLV is padded to a length
601	 * that is a multiple of 4 for alignment.
602	 */
603	u8 data[0];
604};
605
606struct iwl4965_ibss_seq {
607	u8 mac[ETH_ALEN];
608	u16 seq_num;
609	u16 frag_num;
610	unsigned long packet_time;
611	struct list_head list;
612};
613
614struct iwl_sensitivity_ranges {
615	u16 min_nrg_cck;
616	u16 max_nrg_cck;
617
618	u16 nrg_th_cck;
619	u16 nrg_th_ofdm;
620
621	u16 auto_corr_min_ofdm;
622	u16 auto_corr_min_ofdm_mrc;
623	u16 auto_corr_min_ofdm_x1;
624	u16 auto_corr_min_ofdm_mrc_x1;
625
626	u16 auto_corr_max_ofdm;
627	u16 auto_corr_max_ofdm_mrc;
628	u16 auto_corr_max_ofdm_x1;
629	u16 auto_corr_max_ofdm_mrc_x1;
630
631	u16 auto_corr_max_cck;
632	u16 auto_corr_max_cck_mrc;
633	u16 auto_corr_min_cck;
634	u16 auto_corr_min_cck_mrc;
635
636	u16 barker_corr_th_min;
637	u16 barker_corr_th_min_mrc;
638	u16 nrg_th_cca;
639};
640
641
642#define KELVIN_TO_CELSIUS(x) ((x)-273)
643#define CELSIUS_TO_KELVIN(x) ((x)+273)
644
645
646/**
647 * struct iwl_hw_params
648 * @max_txq_num: Max # Tx queues supported
649 * @dma_chnl_num: Number of Tx DMA/FIFO channels
650 * @scd_bc_tbls_size: size of scheduler byte count tables
651 * @tfd_size: TFD size
652 * @tx/rx_chains_num: Number of TX/RX chains
653 * @valid_tx/rx_ant: usable antennas
654 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
655 * @max_rxq_log: Log-base-2 of max_rxq_size
656 * @rx_page_order: Rx buffer page order
657 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
658 * @max_stations:
659 * @bcast_sta_id:
660 * @ht40_channel: is 40MHz width possible in band 2.4
661 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
662 * @sw_crypto: 0 for hw, 1 for sw
663 * @max_xxx_size: for ucode uses
664 * @ct_kill_threshold: temperature threshold
665 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
666 * @calib_init_cfg: setup initial calibrations for the hw
667 * @struct iwl_sensitivity_ranges: range of sensitivity values
668 */
669struct iwl_hw_params {
670	u8 max_txq_num;
671	u8 dma_chnl_num;
672	u16 scd_bc_tbls_size;
673	u32 tfd_size;
674	u8  tx_chains_num;
675	u8  rx_chains_num;
676	u8  valid_tx_ant;
677	u8  valid_rx_ant;
678	u16 max_rxq_size;
679	u16 max_rxq_log;
680	u32 rx_page_order;
681	u32 rx_wrt_ptr_reg;
682	u8  max_stations;
683	u8  bcast_sta_id;
684	u8  ht40_channel;
685	u8  max_beacon_itrvl;	/* in 1024 ms */
686	u32 max_inst_size;
687	u32 max_data_size;
688	u32 max_bsm_size;
689	u32 ct_kill_threshold; /* value in hw-dependent units */
690	u32 ct_kill_exit_threshold; /* value in hw-dependent units */
691				    /* for 1000, 6000 series and up */
692	u16 beacon_time_tsf_bits;
693	u32 calib_init_cfg;
694	const struct iwl_sensitivity_ranges *sens;
695};
696
697
698/******************************************************************************
699 *
700 * Functions implemented in core module which are forward declared here
701 * for use by iwl-[4-5].c
702 *
703 * NOTE:  The implementation of these functions are not hardware specific
704 * which is why they are in the core module files.
705 *
706 * Naming convention --
707 * iwl_         <-- Is part of iwlwifi
708 * iwlXXXX_     <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
709 * iwl4965_bg_      <-- Called from work queue context
710 * iwl4965_mac_     <-- mac80211 callback
711 *
712 ****************************************************************************/
713extern void iwl_update_chain_flags(struct iwl_priv *priv);
714extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
715extern const u8 iwl_bcast_addr[ETH_ALEN];
716extern int iwl_rxq_stop(struct iwl_priv *priv);
717extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
718extern int iwl_queue_space(const struct iwl_queue *q);
719static inline int iwl_queue_used(const struct iwl_queue *q, int i)
720{
721	return q->write_ptr >= q->read_ptr ?
722		(i >= q->read_ptr && i < q->write_ptr) :
723		!(i < q->read_ptr && i >= q->write_ptr);
724}
725
726
727static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
728{
729	/*
730	 * This is for init calibration result and scan command which
731	 * required buffer > TFD_MAX_PAYLOAD_SIZE,
732	 * the big buffer at end of command array
733	 */
734	if (is_huge)
735		return q->n_window;	/* must be power of 2 */
736
737	/* Otherwise, use normal size buffers */
738	return index & (q->n_window - 1);
739}
740
741
742struct iwl_dma_ptr {
743	dma_addr_t dma;
744	void *addr;
745	size_t size;
746};
747
748#define IWL_OPERATION_MODE_AUTO     0
749#define IWL_OPERATION_MODE_HT_ONLY  1
750#define IWL_OPERATION_MODE_MIXED    2
751#define IWL_OPERATION_MODE_20MHZ    3
752
753#define IWL_TX_CRC_SIZE 4
754#define IWL_TX_DELIMITER_SIZE 4
755
756#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
757
758/* Sensitivity and chain noise calibration */
759#define INITIALIZATION_VALUE		0xFFFF
760#define IWL4965_CAL_NUM_BEACONS		20
761#define IWL_CAL_NUM_BEACONS		16
762#define MAXIMUM_ALLOWED_PATHLOSS	15
763
764#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
765
766#define MAX_FA_OFDM  50
767#define MIN_FA_OFDM  5
768#define MAX_FA_CCK   50
769#define MIN_FA_CCK   5
770
771#define AUTO_CORR_STEP_OFDM       1
772
773#define AUTO_CORR_STEP_CCK     3
774#define AUTO_CORR_MAX_TH_CCK   160
775
776#define NRG_DIFF               2
777#define NRG_STEP_CCK           2
778#define NRG_MARGIN             8
779#define MAX_NUMBER_CCK_NO_FA 100
780
781#define AUTO_CORR_CCK_MIN_VAL_DEF    (125)
782
783#define CHAIN_A             0
784#define CHAIN_B             1
785#define CHAIN_C             2
786#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
787#define ALL_BAND_FILTER			0xFF00
788#define IN_BAND_FILTER			0xFF
789#define MIN_AVERAGE_NOISE_MAX_VALUE	0xFFFFFFFF
790
791#define NRG_NUM_PREV_STAT_L     20
792#define NUM_RX_CHAINS           3
793
794enum iwl4965_false_alarm_state {
795	IWL_FA_TOO_MANY = 0,
796	IWL_FA_TOO_FEW = 1,
797	IWL_FA_GOOD_RANGE = 2,
798};
799
800enum iwl4965_chain_noise_state {
801	IWL_CHAIN_NOISE_ALIVE = 0,  /* must be 0 */
802	IWL_CHAIN_NOISE_ACCUMULATE,
803	IWL_CHAIN_NOISE_CALIBRATED,
804	IWL_CHAIN_NOISE_DONE,
805};
806
807enum iwl4965_calib_enabled_state {
808	IWL_CALIB_DISABLED = 0,  /* must be 0 */
809	IWL_CALIB_ENABLED = 1,
810};
811
812
813/*
814 * enum iwl_calib
815 * defines the order in which results of initial calibrations
816 * should be sent to the runtime uCode
817 */
818enum iwl_calib {
819	IWL_CALIB_XTAL,
820	IWL_CALIB_DC,
821	IWL_CALIB_LO,
822	IWL_CALIB_TX_IQ,
823	IWL_CALIB_TX_IQ_PERD,
824	IWL_CALIB_BASE_BAND,
825	IWL_CALIB_MAX
826};
827
828/* Opaque calibration results */
829struct iwl_calib_result {
830	void *buf;
831	size_t buf_len;
832};
833
834enum ucode_type {
835	UCODE_NONE = 0,
836	UCODE_INIT,
837	UCODE_RT
838};
839
840/* Sensitivity calib data */
841struct iwl_sensitivity_data {
842	u32 auto_corr_ofdm;
843	u32 auto_corr_ofdm_mrc;
844	u32 auto_corr_ofdm_x1;
845	u32 auto_corr_ofdm_mrc_x1;
846	u32 auto_corr_cck;
847	u32 auto_corr_cck_mrc;
848
849	u32 last_bad_plcp_cnt_ofdm;
850	u32 last_fa_cnt_ofdm;
851	u32 last_bad_plcp_cnt_cck;
852	u32 last_fa_cnt_cck;
853
854	u32 nrg_curr_state;
855	u32 nrg_prev_state;
856	u32 nrg_value[10];
857	u8  nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
858	u32 nrg_silence_ref;
859	u32 nrg_energy_idx;
860	u32 nrg_silence_idx;
861	u32 nrg_th_cck;
862	s32 nrg_auto_corr_silence_diff;
863	u32 num_in_cck_no_fa;
864	u32 nrg_th_ofdm;
865
866	u16 barker_corr_th_min;
867	u16 barker_corr_th_min_mrc;
868	u16 nrg_th_cca;
869};
870
871/* Chain noise (differential Rx gain) calib data */
872struct iwl_chain_noise_data {
873	u32 active_chains;
874	u32 chain_noise_a;
875	u32 chain_noise_b;
876	u32 chain_noise_c;
877	u32 chain_signal_a;
878	u32 chain_signal_b;
879	u32 chain_signal_c;
880	u16 beacon_count;
881	u8 disconn_array[NUM_RX_CHAINS];
882	u8 delta_gain_code[NUM_RX_CHAINS];
883	u8 radio_write;
884	u8 state;
885};
886
887#define	EEPROM_SEM_TIMEOUT 10		/* milliseconds */
888#define EEPROM_SEM_RETRY_LIMIT 1000	/* number of attempts (not time) */
889
890#define IWL_TRAFFIC_ENTRIES	(256)
891#define IWL_TRAFFIC_ENTRY_SIZE  (64)
892
893enum {
894	MEASUREMENT_READY = (1 << 0),
895	MEASUREMENT_ACTIVE = (1 << 1),
896};
897
898enum iwl_nvm_type {
899	NVM_DEVICE_TYPE_EEPROM = 0,
900	NVM_DEVICE_TYPE_OTP,
901};
902
903/*
904 * Two types of OTP memory access modes
905 *   IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
906 * 			        based on physical memory addressing
907 *   IWL_OTP_ACCESS_RELATIVE - relative address mode,
908 * 			       based on logical memory addressing
909 */
910enum iwl_access_mode {
911	IWL_OTP_ACCESS_ABSOLUTE,
912	IWL_OTP_ACCESS_RELATIVE,
913};
914
915/**
916 * enum iwl_pa_type - Power Amplifier type
917 * @IWL_PA_SYSTEM:  based on uCode configuration
918 * @IWL_PA_INTERNAL: use Internal only
919 */
920enum iwl_pa_type {
921	IWL_PA_SYSTEM = 0,
922	IWL_PA_INTERNAL = 1,
923};
924
925/* interrupt statistics */
926struct isr_statistics {
927	u32 hw;
928	u32 sw;
929	u32 sw_err;
930	u32 sch;
931	u32 alive;
932	u32 rfkill;
933	u32 ctkill;
934	u32 wakeup;
935	u32 rx;
936	u32 rx_handlers[REPLY_MAX];
937	u32 tx;
938	u32 unhandled;
939};
940
941#ifdef CONFIG_IWLWIFI_DEBUGFS
942/* management statistics */
943enum iwl_mgmt_stats {
944	MANAGEMENT_ASSOC_REQ = 0,
945	MANAGEMENT_ASSOC_RESP,
946	MANAGEMENT_REASSOC_REQ,
947	MANAGEMENT_REASSOC_RESP,
948	MANAGEMENT_PROBE_REQ,
949	MANAGEMENT_PROBE_RESP,
950	MANAGEMENT_BEACON,
951	MANAGEMENT_ATIM,
952	MANAGEMENT_DISASSOC,
953	MANAGEMENT_AUTH,
954	MANAGEMENT_DEAUTH,
955	MANAGEMENT_ACTION,
956	MANAGEMENT_MAX,
957};
958/* control statistics */
959enum iwl_ctrl_stats {
960	CONTROL_BACK_REQ =  0,
961	CONTROL_BACK,
962	CONTROL_PSPOLL,
963	CONTROL_RTS,
964	CONTROL_CTS,
965	CONTROL_ACK,
966	CONTROL_CFEND,
967	CONTROL_CFENDACK,
968	CONTROL_MAX,
969};
970
971struct traffic_stats {
972	u32 mgmt[MANAGEMENT_MAX];
973	u32 ctrl[CONTROL_MAX];
974	u32 data_cnt;
975	u64 data_bytes;
976};
977#else
978struct traffic_stats {
979	u64 data_bytes;
980};
981#endif
982
983/*
984 * iwl_switch_rxon: "channel switch" structure
985 *
986 * @ switch_in_progress: channel switch in progress
987 * @ channel: new channel
988 */
989struct iwl_switch_rxon {
990	bool switch_in_progress;
991	__le16 channel;
992};
993
994/*
995 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
996 * to perform continuous uCode event logging operation if enabled
997 */
998#define UCODE_TRACE_PERIOD (100)
999
1000/*
1001 * iwl_event_log: current uCode event log position
1002 *
1003 * @ucode_trace: enable/disable ucode continuous trace timer
1004 * @num_wraps: how many times the event buffer wraps
1005 * @next_entry:  the entry just before the next one that uCode would fill
1006 * @non_wraps_count: counter for no wrap detected when dump ucode events
1007 * @wraps_once_count: counter for wrap once detected when dump ucode events
1008 * @wraps_more_count: counter for wrap more than once detected
1009 *		      when dump ucode events
1010 */
1011struct iwl_event_log {
1012	bool ucode_trace;
1013	u32 num_wraps;
1014	u32 next_entry;
1015	int non_wraps_count;
1016	int wraps_once_count;
1017	int wraps_more_count;
1018};
1019
1020/*
1021 * host interrupt timeout value
1022 * used with setting interrupt coalescing timer
1023 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1024 *
1025 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1026 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1027 */
1028#define IWL_HOST_INT_TIMEOUT_MAX	(0xFF)
1029#define IWL_HOST_INT_TIMEOUT_DEF	(0x40)
1030#define IWL_HOST_INT_TIMEOUT_MIN	(0x0)
1031#define IWL_HOST_INT_CALIB_TIMEOUT_MAX	(0xFF)
1032#define IWL_HOST_INT_CALIB_TIMEOUT_DEF	(0x10)
1033#define IWL_HOST_INT_CALIB_TIMEOUT_MIN	(0x0)
1034
1035/*
1036 * This is the threshold value of plcp error rate per 100mSecs.  It is
1037 * used to set and check for the validity of plcp_delta.
1038 */
1039#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN	(0)
1040#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF	(50)
1041#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF	(100)
1042#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF	(200)
1043#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX	(255)
1044
1045#define IWL_DELAY_NEXT_FORCE_RF_RESET  (HZ*3)
1046#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1047
1048/* timer constants use to monitor and recover stuck tx queues in mSecs */
1049#define IWL_MONITORING_PERIOD  (1000)
1050#define IWL_ONE_HUNDRED_MSECS   (100)
1051#define IWL_SIXTY_SECS          (60000)
1052
1053enum iwl_reset {
1054	IWL_RF_RESET = 0,
1055	IWL_FW_RESET,
1056	IWL_MAX_FORCE_RESET,
1057};
1058
1059struct iwl_force_reset {
1060	int reset_request_count;
1061	int reset_success_count;
1062	int reset_reject_count;
1063	unsigned long reset_duration;
1064	unsigned long last_force_reset_jiffies;
1065};
1066
1067/* extend beacon time format bit shifting  */
1068/*
1069 * for _3945 devices
1070 * bits 31:24 - extended
1071 * bits 23:0  - interval
1072 */
1073#define IWL3945_EXT_BEACON_TIME_POS	24
1074/*
1075 * for _agn devices
1076 * bits 31:22 - extended
1077 * bits 21:0  - interval
1078 */
1079#define IWLAGN_EXT_BEACON_TIME_POS	22
1080
1081struct iwl_priv {
1082
1083	/* ieee device used by generic ieee processing code */
1084	struct ieee80211_hw *hw;
1085	struct ieee80211_channel *ieee_channels;
1086	struct ieee80211_rate *ieee_rates;
1087	struct iwl_cfg *cfg;
1088
1089	/* temporary frame storage list */
1090	struct list_head free_frames;
1091	int frames_count;
1092
1093	enum ieee80211_band band;
1094	int alloc_rxb_page;
1095
1096	void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
1097				       struct iwl_rx_mem_buffer *rxb);
1098
1099	struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1100
1101	/* spectrum measurement report caching */
1102	struct iwl_spectrum_notification measure_report;
1103	u8 measurement_status;
1104
1105	/* ucode beacon time */
1106	u32 ucode_beacon_time;
1107	int missed_beacon_threshold;
1108
1109	/* storing the jiffies when the plcp error rate is received */
1110	unsigned long plcp_jiffies;
1111
1112	/* force reset */
1113	struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
1114
1115	/* we allocate array of iwl_channel_info for NIC's valid channels.
1116	 *    Access via channel # using indirect index array */
1117	struct iwl_channel_info *channel_info;	/* channel info array */
1118	u8 channel_count;	/* # of channels */
1119
1120	/* thermal calibration */
1121	s32 temperature;	/* degrees Kelvin */
1122	s32 last_temperature;
1123
1124	/* init calibration results */
1125	struct iwl_calib_result calib_results[IWL_CALIB_MAX];
1126
1127	/* Scan related variables */
1128	unsigned long scan_start;
1129	unsigned long scan_start_tsf;
1130	void *scan_cmd;
1131	enum ieee80211_band scan_band;
1132	struct cfg80211_scan_request *scan_request;
1133	struct ieee80211_vif *scan_vif;
1134	bool is_internal_short_scan;
1135	u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1136	u8 mgmt_tx_ant;
1137
1138	/* spinlock */
1139	spinlock_t lock;	/* protect general shared data */
1140	spinlock_t hcmd_lock;	/* protect hcmd */
1141	spinlock_t reg_lock;	/* protect hw register access */
1142	struct mutex mutex;
1143	struct mutex sync_cmd_mutex; /* enable serialization of sync commands */
1144
1145	/* basic pci-network driver stuff */
1146	struct pci_dev *pci_dev;
1147
1148	/* pci hardware address support */
1149	void __iomem *hw_base;
1150	u32  hw_rev;
1151	u32  hw_wa_rev;
1152	u8   rev_id;
1153
1154	/* uCode images, save to reload in case of failure */
1155	int fw_index;			/* firmware we're trying to load */
1156	u32 ucode_ver;			/* version of ucode, copy of
1157					   iwl_ucode.ver */
1158	struct fw_desc ucode_code;	/* runtime inst */
1159	struct fw_desc ucode_data;	/* runtime data original */
1160	struct fw_desc ucode_data_backup;	/* runtime data save/restore */
1161	struct fw_desc ucode_init;	/* initialization inst */
1162	struct fw_desc ucode_init_data;	/* initialization data */
1163	struct fw_desc ucode_boot;	/* bootstrap inst */
1164	enum ucode_type ucode_type;
1165	u8 ucode_write_complete;	/* the image write is complete */
1166	char firmware_name[25];
1167
1168
1169	struct iwl_rxon_time_cmd rxon_timing;
1170
1171	/* We declare this const so it can only be
1172	 * changed via explicit cast within the
1173	 * routines that actually update the physical
1174	 * hardware */
1175	const struct iwl_rxon_cmd active_rxon;
1176	struct iwl_rxon_cmd staging_rxon;
1177
1178	struct iwl_switch_rxon switch_rxon;
1179
1180	/* 1st responses from initialize and runtime uCode images.
1181	 * _agn's initialize alive response contains some calibration data. */
1182	struct iwl_init_alive_resp card_alive_init;
1183	struct iwl_alive_resp card_alive;
1184
1185	unsigned long last_blink_time;
1186	u8 last_blink_rate;
1187	u8 allow_blinking;
1188	u64 led_tpt;
1189
1190	u16 active_rate;
1191
1192	u8 start_calib;
1193	struct iwl_sensitivity_data sensitivity_data;
1194	struct iwl_chain_noise_data chain_noise_data;
1195	__le16 sensitivity_tbl[HD_TABLE_SIZE];
1196
1197	struct iwl_ht_config current_ht_config;
1198
1199	/* Rate scaling data */
1200	u8 retry_rate;
1201
1202	wait_queue_head_t wait_command_queue;
1203
1204	int activity_timer_active;
1205
1206	/* Rx and Tx DMA processing queues */
1207	struct iwl_rx_queue rxq;
1208	struct iwl_tx_queue *txq;
1209	unsigned long txq_ctx_active_msk;
1210	struct iwl_dma_ptr  kw;	/* keep warm address */
1211	struct iwl_dma_ptr  scd_bc_tbls;
1212
1213	u32 scd_base_addr;	/* scheduler sram base address */
1214
1215	unsigned long status;
1216
1217	/* counts mgmt, ctl, and data packets */
1218	struct traffic_stats tx_stats;
1219	struct traffic_stats rx_stats;
1220
1221	/* counts interrupts */
1222	struct isr_statistics isr_stats;
1223
1224	struct iwl_power_mgr power_data;
1225	struct iwl_tt_mgmt thermal_throttle;
1226
1227	struct iwl_notif_statistics statistics;
1228#ifdef CONFIG_IWLWIFI_DEBUGFS
1229	struct iwl_notif_statistics accum_statistics;
1230	struct iwl_notif_statistics delta_statistics;
1231	struct iwl_notif_statistics max_delta;
1232#endif
1233
1234	/* context information */
1235	u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
1236
1237	/* station table variables */
1238
1239	/* Note: if lock and sta_lock are needed, lock must be acquired first */
1240	spinlock_t sta_lock;
1241	int num_stations;
1242	struct iwl_station_entry stations[IWL_STATION_COUNT];
1243	struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; /* protected by mutex */
1244	u8 key_mapping_key;
1245	unsigned long ucode_key_table;
1246
1247	/* queue refcounts */
1248#define IWL_MAX_HW_QUEUES	32
1249	unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1250	/* for each AC */
1251	atomic_t queue_stop_count[4];
1252
1253	/* Indication if ieee80211_ops->open has been called */
1254	u8 is_open;
1255
1256	u8 mac80211_registered;
1257
1258	/* eeprom -- this is in the card's little endian byte order */
1259	u8 *eeprom;
1260	int    nvm_device_type;
1261	struct iwl_eeprom_calib_info *calib_info;
1262
1263	enum nl80211_iftype iw_mode;
1264
1265	struct sk_buff *ibss_beacon;
1266
1267	/* Last Rx'd beacon timestamp */
1268	u64 timestamp;
1269	struct ieee80211_vif *vif;
1270
1271	union {
1272#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1273		struct {
1274			void *shared_virt;
1275			dma_addr_t shared_phys;
1276
1277			struct delayed_work thermal_periodic;
1278			struct delayed_work rfkill_poll;
1279
1280			struct iwl3945_notif_statistics statistics;
1281#ifdef CONFIG_IWLWIFI_DEBUGFS
1282			struct iwl3945_notif_statistics accum_statistics;
1283			struct iwl3945_notif_statistics delta_statistics;
1284			struct iwl3945_notif_statistics max_delta;
1285#endif
1286
1287			u32 sta_supp_rates;
1288			int last_rx_rssi;	/* From Rx packet statistics */
1289
1290			/* Rx'd packet timing information */
1291			u32 last_beacon_time;
1292			u64 last_tsf;
1293
1294			/*
1295			 * each calibration channel group in the
1296			 * EEPROM has a derived clip setting for
1297			 * each rate.
1298			 */
1299			const struct iwl3945_clip_group clip_groups[5];
1300
1301		} _3945;
1302#endif
1303#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
1304		struct {
1305			/* INT ICT Table */
1306			__le32 *ict_tbl;
1307			void *ict_tbl_vir;
1308			dma_addr_t ict_tbl_dma;
1309			dma_addr_t aligned_ict_tbl_dma;
1310			int ict_index;
1311			u32 inta;
1312			bool use_ict;
1313			/*
1314			 * reporting the number of tids has AGG on. 0 means
1315			 * no AGGREGATION
1316			 */
1317			u8 agg_tids_count;
1318
1319			struct iwl_rx_phy_res last_phy_res;
1320			bool last_phy_res_valid;
1321
1322			struct completion firmware_loading_complete;
1323
1324			u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1325			u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1326		} _agn;
1327#endif
1328	};
1329
1330	struct iwl_hw_params hw_params;
1331
1332	u32 inta_mask;
1333
1334	struct iwl_qos_info qos_data;
1335
1336	struct workqueue_struct *workqueue;
1337
1338	struct work_struct restart;
1339	struct work_struct scan_completed;
1340	struct work_struct rx_replenish;
1341	struct work_struct abort_scan;
1342	struct work_struct beacon_update;
1343	struct work_struct tt_work;
1344	struct work_struct ct_enter;
1345	struct work_struct ct_exit;
1346	struct work_struct start_internal_scan;
1347
1348	struct tasklet_struct irq_tasklet;
1349
1350	struct delayed_work init_alive_start;
1351	struct delayed_work alive_start;
1352	struct delayed_work scan_check;
1353
1354	/* TX Power */
1355	s8 tx_power_user_lmt;
1356	s8 tx_power_device_lmt;
1357	s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
1358
1359
1360#ifdef CONFIG_IWLWIFI_DEBUG
1361	/* debugging info */
1362	u32 debug_level; /* per device debugging will override global
1363			    iwl_debug_level if set */
1364#endif /* CONFIG_IWLWIFI_DEBUG */
1365#ifdef CONFIG_IWLWIFI_DEBUGFS
1366	/* debugfs */
1367	u16 tx_traffic_idx;
1368	u16 rx_traffic_idx;
1369	u8 *tx_traffic;
1370	u8 *rx_traffic;
1371	struct dentry *debugfs_dir;
1372	u32 dbgfs_sram_offset, dbgfs_sram_len;
1373	bool disable_ht40;
1374#endif /* CONFIG_IWLWIFI_DEBUGFS */
1375
1376	struct work_struct txpower_work;
1377	u32 disable_sens_cal;
1378	u32 disable_chain_noise_cal;
1379	u32 disable_tx_power_cal;
1380	struct work_struct run_time_calib_work;
1381	struct timer_list statistics_periodic;
1382	struct timer_list ucode_trace;
1383	struct timer_list monitor_recover;
1384	bool hw_ready;
1385
1386	struct iwl_event_log event_log;
1387}; /*iwl_priv */
1388
1389static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1390{
1391	set_bit(txq_id, &priv->txq_ctx_active_msk);
1392}
1393
1394static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1395{
1396	clear_bit(txq_id, &priv->txq_ctx_active_msk);
1397}
1398
1399#ifdef CONFIG_IWLWIFI_DEBUG
1400const char *iwl_get_tx_fail_reason(u32 status);
1401/*
1402 * iwl_get_debug_level: Return active debug level for device
1403 *
1404 * Using sysfs it is possible to set per device debug level. This debug
1405 * level will be used if set, otherwise the global debug level which can be
1406 * set via module parameter is used.
1407 */
1408static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1409{
1410	if (priv->debug_level)
1411		return priv->debug_level;
1412	else
1413		return iwl_debug_level;
1414}
1415#else
1416static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
1417
1418static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1419{
1420	return iwl_debug_level;
1421}
1422#endif
1423
1424
1425static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1426							 int txq_id, int idx)
1427{
1428	if (priv->txq[txq_id].txb[idx].skb)
1429		return (struct ieee80211_hdr *)priv->txq[txq_id].
1430				txb[idx].skb->data;
1431	return NULL;
1432}
1433
1434
1435static inline int iwl_is_associated(struct iwl_priv *priv)
1436{
1437	return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1438}
1439
1440static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
1441{
1442	if (ch_info == NULL)
1443		return 0;
1444	return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1445}
1446
1447static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
1448{
1449	return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1450}
1451
1452static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
1453{
1454	return ch_info->band == IEEE80211_BAND_5GHZ;
1455}
1456
1457static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
1458{
1459	return ch_info->band == IEEE80211_BAND_2GHZ;
1460}
1461
1462static inline int is_channel_passive(const struct iwl_channel_info *ch)
1463{
1464	return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1465}
1466
1467static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1468{
1469	return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1470}
1471
1472static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1473{
1474	__free_pages(page, priv->hw_params.rx_page_order);
1475	priv->alloc_rxb_page--;
1476}
1477
1478static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1479{
1480	free_pages(page, priv->hw_params.rx_page_order);
1481	priv->alloc_rxb_page--;
1482}
1483#endif				/* __iwl_dev_h__ */
1484