iwl-dev.h revision bf53f939e02c0e818df93ab130fedc0e4ba95796
1/****************************************************************************** 2 * 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called LICENSE. 20 * 21 * Contact Information: 22 * Intel Linux Wireless <ilw@linux.intel.com> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 *****************************************************************************/ 26/* 27 * Please use this file (iwl-dev.h) for driver implementation definitions. 28 * Please use iwl-commands.h for uCode API definitions. 29 * Please use iwl-4965-hw.h for hardware-related definitions. 30 */ 31 32#ifndef __iwl_dev_h__ 33#define __iwl_dev_h__ 34 35#include <linux/pci.h> /* for struct pci_device_id */ 36#include <linux/kernel.h> 37#include <net/ieee80211_radiotap.h> 38 39#include "iwl-eeprom.h" 40#include "iwl-csr.h" 41#include "iwl-prph.h" 42#include "iwl-fh.h" 43#include "iwl-debug.h" 44#include "iwl-4965-hw.h" 45#include "iwl-3945-hw.h" 46#include "iwl-agn-hw.h" 47#include "iwl-led.h" 48#include "iwl-power.h" 49#include "iwl-agn-rs.h" 50#include "iwl-agn-tt.h" 51 52struct iwl_tx_queue; 53 54/* CT-KILL constants */ 55#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ 56#define CT_KILL_THRESHOLD 114 /* in Celsius */ 57#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */ 58 59/* Default noise level to report when noise measurement is not available. 60 * This may be because we're: 61 * 1) Not associated (4965, no beacon statistics being sent to driver) 62 * 2) Scanning (noise measurement does not apply to associated channel) 63 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) 64 * Use default noise value of -127 ... this is below the range of measurable 65 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. 66 * Also, -127 works better than 0 when averaging frames with/without 67 * noise info (e.g. averaging might be done in app); measured dBm values are 68 * always negative ... using a negative value as the default keeps all 69 * averages within an s8's (used in some apps) range of negative values. */ 70#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) 71 72/* 73 * RTS threshold here is total size [2347] minus 4 FCS bytes 74 * Per spec: 75 * a value of 0 means RTS on all data/management packets 76 * a value > max MSDU size means no RTS 77 * else RTS for data/management frames where MPDU is larger 78 * than RTS value. 79 */ 80#define DEFAULT_RTS_THRESHOLD 2347U 81#define MIN_RTS_THRESHOLD 0U 82#define MAX_RTS_THRESHOLD 2347U 83#define MAX_MSDU_SIZE 2304U 84#define MAX_MPDU_SIZE 2346U 85#define DEFAULT_BEACON_INTERVAL 100U 86#define DEFAULT_SHORT_RETRY_LIMIT 7U 87#define DEFAULT_LONG_RETRY_LIMIT 4U 88 89struct iwl_rx_mem_buffer { 90 dma_addr_t page_dma; 91 struct page *page; 92 struct list_head list; 93}; 94 95#define rxb_addr(r) page_address(r->page) 96 97/* defined below */ 98struct iwl_device_cmd; 99 100struct iwl_cmd_meta { 101 /* only for SYNC commands, iff the reply skb is wanted */ 102 struct iwl_host_cmd *source; 103 /* 104 * only for ASYNC commands 105 * (which is somewhat stupid -- look at iwl-sta.c for instance 106 * which duplicates a bunch of code because the callback isn't 107 * invoked for SYNC commands, if it were and its result passed 108 * through it would be simpler...) 109 */ 110 void (*callback)(struct iwl_priv *priv, 111 struct iwl_device_cmd *cmd, 112 struct iwl_rx_packet *pkt); 113 114 /* The CMD_SIZE_HUGE flag bit indicates that the command 115 * structure is stored at the end of the shared queue memory. */ 116 u32 flags; 117 118 DEFINE_DMA_UNMAP_ADDR(mapping); 119 DEFINE_DMA_UNMAP_LEN(len); 120}; 121 122/* 123 * Generic queue structure 124 * 125 * Contains common data for Rx and Tx queues 126 */ 127struct iwl_queue { 128 int n_bd; /* number of BDs in this queue */ 129 int write_ptr; /* 1-st empty entry (index) host_w*/ 130 int read_ptr; /* last used entry (index) host_r*/ 131 /* use for monitoring and recovering the stuck queue */ 132 int last_read_ptr; /* storing the last read_ptr */ 133 /* number of time read_ptr and last_read_ptr are the same */ 134 u8 repeat_same_read_ptr; 135 dma_addr_t dma_addr; /* physical addr for BD's */ 136 int n_window; /* safe queue window */ 137 u32 id; 138 int low_mark; /* low watermark, resume queue if free 139 * space more than this */ 140 int high_mark; /* high watermark, stop queue if free 141 * space less than this */ 142} __packed; 143 144/* One for each TFD */ 145struct iwl_tx_info { 146 struct sk_buff *skb; 147 struct iwl_rxon_context *ctx; 148}; 149 150/** 151 * struct iwl_tx_queue - Tx Queue for DMA 152 * @q: generic Rx/Tx queue descriptor 153 * @bd: base of circular buffer of TFDs 154 * @cmd: array of command/TX buffer pointers 155 * @meta: array of meta data for each command/tx buffer 156 * @dma_addr_cmd: physical address of cmd/tx buffer array 157 * @txb: array of per-TFD driver data 158 * @need_update: indicates need to update read/write index 159 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled 160 * 161 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame 162 * descriptors) and required locking structures. 163 */ 164#define TFD_TX_CMD_SLOTS 256 165#define TFD_CMD_SLOTS 32 166 167struct iwl_tx_queue { 168 struct iwl_queue q; 169 void *tfds; 170 struct iwl_device_cmd **cmd; 171 struct iwl_cmd_meta *meta; 172 struct iwl_tx_info *txb; 173 u8 need_update; 174 u8 sched_retry; 175 u8 active; 176 u8 swq_id; 177}; 178 179#define IWL_NUM_SCAN_RATES (2) 180 181struct iwl4965_channel_tgd_info { 182 u8 type; 183 s8 max_power; 184}; 185 186struct iwl4965_channel_tgh_info { 187 s64 last_radar_time; 188}; 189 190#define IWL4965_MAX_RATE (33) 191 192struct iwl3945_clip_group { 193 /* maximum power level to prevent clipping for each rate, derived by 194 * us from this band's saturation power in EEPROM */ 195 const s8 clip_powers[IWL_MAX_RATES]; 196}; 197 198/* current Tx power values to use, one for each rate for each channel. 199 * requested power is limited by: 200 * -- regulatory EEPROM limits for this channel 201 * -- hardware capabilities (clip-powers) 202 * -- spectrum management 203 * -- user preference (e.g. iwconfig) 204 * when requested power is set, base power index must also be set. */ 205struct iwl3945_channel_power_info { 206 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 207 s8 power_table_index; /* actual (compenst'd) index into gain table */ 208 s8 base_power_index; /* gain index for power at factory temp. */ 209 s8 requested_power; /* power (dBm) requested for this chnl/rate */ 210}; 211 212/* current scan Tx power values to use, one for each scan rate for each 213 * channel. */ 214struct iwl3945_scan_power_info { 215 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 216 s8 power_table_index; /* actual (compenst'd) index into gain table */ 217 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ 218}; 219 220/* 221 * One for each channel, holds all channel setup data 222 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant 223 * with one another! 224 */ 225struct iwl_channel_info { 226 struct iwl4965_channel_tgd_info tgd; 227 struct iwl4965_channel_tgh_info tgh; 228 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ 229 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for 230 * HT40 channel */ 231 232 u8 channel; /* channel number */ 233 u8 flags; /* flags copied from EEPROM */ 234 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 235 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ 236 s8 min_power; /* always 0 */ 237 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ 238 239 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ 240 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ 241 enum ieee80211_band band; 242 243 /* HT40 channel info */ 244 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 245 u8 ht40_flags; /* flags copied from EEPROM */ 246 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 247 248 /* Radio/DSP gain settings for each "normal" data Tx rate. 249 * These include, in addition to RF and DSP gain, a few fields for 250 * remembering/modifying gain settings (indexes). */ 251 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; 252 253 /* Radio/DSP gain settings for each scan rate, for directed scans. */ 254 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; 255}; 256 257#define IWL_TX_FIFO_BK 0 /* shared */ 258#define IWL_TX_FIFO_BE 1 259#define IWL_TX_FIFO_VI 2 /* shared */ 260#define IWL_TX_FIFO_VO 3 261#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 262#define IWL_TX_FIFO_BE_IPAN 4 263#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 264#define IWL_TX_FIFO_VO_IPAN 5 265#define IWL_TX_FIFO_UNUSED -1 266 267/* Minimum number of queues. MAX_NUM is defined in hw specific files. 268 * Set the minimum to accommodate the 4 standard TX queues, 1 command 269 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */ 270#define IWL_MIN_NUM_QUEUES 10 271 272/* 273 * Command queue depends on iPAN support. 274 */ 275#define IWL_DEFAULT_CMD_QUEUE_NUM 4 276#define IWL_IPAN_CMD_QUEUE_NUM 9 277 278/* 279 * This queue number is required for proper operation 280 * because the ucode will stop/start the scheduler as 281 * required. 282 */ 283#define IWL_IPAN_MCAST_QUEUE 8 284 285#define IEEE80211_DATA_LEN 2304 286#define IEEE80211_4ADDR_LEN 30 287#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) 288#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 289 290struct iwl_frame { 291 union { 292 struct ieee80211_hdr frame; 293 struct iwl_tx_beacon_cmd beacon; 294 u8 raw[IEEE80211_FRAME_LEN]; 295 u8 cmd[360]; 296 } u; 297 struct list_head list; 298}; 299 300#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) 301#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 302#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 303 304enum { 305 CMD_SYNC = 0, 306 CMD_SIZE_NORMAL = 0, 307 CMD_NO_SKB = 0, 308 CMD_SIZE_HUGE = (1 << 0), 309 CMD_ASYNC = (1 << 1), 310 CMD_WANT_SKB = (1 << 2), 311}; 312 313#define DEF_CMD_PAYLOAD_SIZE 320 314 315/** 316 * struct iwl_device_cmd 317 * 318 * For allocation of the command and tx queues, this establishes the overall 319 * size of the largest command we send to uCode, except for a scan command 320 * (which is relatively huge; space is allocated separately). 321 */ 322struct iwl_device_cmd { 323 struct iwl_cmd_header hdr; /* uCode API */ 324 union { 325 u32 flags; 326 u8 val8; 327 u16 val16; 328 u32 val32; 329 struct iwl_tx_cmd tx; 330 struct iwl6000_channel_switch_cmd chswitch; 331 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 332 } __packed cmd; 333} __packed; 334 335#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 336 337 338struct iwl_host_cmd { 339 const void *data; 340 unsigned long reply_page; 341 void (*callback)(struct iwl_priv *priv, 342 struct iwl_device_cmd *cmd, 343 struct iwl_rx_packet *pkt); 344 u32 flags; 345 u16 len; 346 u8 id; 347}; 348 349#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 350#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 351#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 352 353/** 354 * struct iwl_rx_queue - Rx queue 355 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) 356 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) 357 * @read: Shared index to newest available Rx buffer 358 * @write: Shared index to oldest written Rx packet 359 * @free_count: Number of pre-allocated buffers in rx_free 360 * @rx_free: list of free SKBs for use 361 * @rx_used: List of Rx buffers with no SKB 362 * @need_update: flag to indicate we need to update read/write index 363 * @rb_stts: driver's pointer to receive buffer status 364 * @rb_stts_dma: bus address of receive buffer status 365 * 366 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers 367 */ 368struct iwl_rx_queue { 369 __le32 *bd; 370 dma_addr_t bd_dma; 371 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; 372 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; 373 u32 read; 374 u32 write; 375 u32 free_count; 376 u32 write_actual; 377 struct list_head rx_free; 378 struct list_head rx_used; 379 int need_update; 380 struct iwl_rb_status *rb_stts; 381 dma_addr_t rb_stts_dma; 382 spinlock_t lock; 383}; 384 385#define IWL_SUPPORTED_RATES_IE_LEN 8 386 387#define MAX_TID_COUNT 9 388 389#define IWL_INVALID_RATE 0xFF 390#define IWL_INVALID_VALUE -1 391 392/** 393 * struct iwl_ht_agg -- aggregation status while waiting for block-ack 394 * @txq_id: Tx queue used for Tx attempt 395 * @frame_count: # frames attempted by Tx command 396 * @wait_for_ba: Expect block-ack before next Tx reply 397 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window 398 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window 399 * @bitmap1: High order, one bit for each frame pending ACK in Tx window 400 * @rate_n_flags: Rate at which Tx was attempted 401 * 402 * If REPLY_TX indicates that aggregation was attempted, driver must wait 403 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info 404 * until block ack arrives. 405 */ 406struct iwl_ht_agg { 407 u16 txq_id; 408 u16 frame_count; 409 u16 wait_for_ba; 410 u16 start_idx; 411 u64 bitmap; 412 u32 rate_n_flags; 413#define IWL_AGG_OFF 0 414#define IWL_AGG_ON 1 415#define IWL_EMPTYING_HW_QUEUE_ADDBA 2 416#define IWL_EMPTYING_HW_QUEUE_DELBA 3 417 u8 state; 418}; 419 420 421struct iwl_tid_data { 422 u16 seq_number; /* agn only */ 423 u16 tfds_in_queue; 424 struct iwl_ht_agg agg; 425}; 426 427struct iwl_hw_key { 428 u32 cipher; 429 int keylen; 430 u8 keyidx; 431 u8 key[32]; 432}; 433 434union iwl_ht_rate_supp { 435 u16 rates; 436 struct { 437 u8 siso_rate; 438 u8 mimo_rate; 439 }; 440}; 441 442#define CFG_HT_RX_AMPDU_FACTOR_8K (0x0) 443#define CFG_HT_RX_AMPDU_FACTOR_16K (0x1) 444#define CFG_HT_RX_AMPDU_FACTOR_32K (0x2) 445#define CFG_HT_RX_AMPDU_FACTOR_64K (0x3) 446#define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K 447#define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K 448#define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K 449 450/* 451 * Maximal MPDU density for TX aggregation 452 * 4 - 2us density 453 * 5 - 4us density 454 * 6 - 8us density 455 * 7 - 16us density 456 */ 457#define CFG_HT_MPDU_DENSITY_2USEC (0x4) 458#define CFG_HT_MPDU_DENSITY_4USEC (0x5) 459#define CFG_HT_MPDU_DENSITY_8USEC (0x6) 460#define CFG_HT_MPDU_DENSITY_16USEC (0x7) 461#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC 462#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC 463#define CFG_HT_MPDU_DENSITY_MIN (0x1) 464 465struct iwl_ht_config { 466 bool single_chain_sufficient; 467 enum ieee80211_smps_mode smps; /* current smps mode */ 468}; 469 470/* QoS structures */ 471struct iwl_qos_info { 472 int qos_active; 473 struct iwl_qosparam_cmd def_qos_parm; 474}; 475 476/* 477 * Structure should be accessed with sta_lock held. When station addition 478 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only 479 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock 480 * held. 481 */ 482struct iwl_station_entry { 483 struct iwl_addsta_cmd sta; 484 struct iwl_tid_data tid[MAX_TID_COUNT]; 485 u8 used, ctxid; 486 struct iwl_hw_key keyinfo; 487 struct iwl_link_quality_cmd *lq; 488}; 489 490struct iwl_station_priv_common { 491 struct iwl_rxon_context *ctx; 492 u8 sta_id; 493}; 494 495/* 496 * iwl_station_priv: Driver's private station information 497 * 498 * When mac80211 creates a station it reserves some space (hw->sta_data_size) 499 * in the structure for use by driver. This structure is places in that 500 * space. 501 * 502 * The common struct MUST be first because it is shared between 503 * 3945 and agn! 504 */ 505struct iwl_station_priv { 506 struct iwl_station_priv_common common; 507 struct iwl_lq_sta lq_sta; 508 atomic_t pending_frames; 509 bool client; 510 bool asleep; 511}; 512 513/** 514 * struct iwl_vif_priv - driver's private per-interface information 515 * 516 * When mac80211 allocates a virtual interface, it can allocate 517 * space for us to put data into. 518 */ 519struct iwl_vif_priv { 520 struct iwl_rxon_context *ctx; 521 u8 ibss_bssid_sta_id; 522}; 523 524/* one for each uCode image (inst/data, boot/init/runtime) */ 525struct fw_desc { 526 void *v_addr; /* access by driver */ 527 dma_addr_t p_addr; /* access by card's busmaster DMA */ 528 u32 len; /* bytes */ 529}; 530 531/* v1/v2 uCode file layout */ 532struct iwl_ucode_header { 533 __le32 ver; /* major/minor/API/serial */ 534 union { 535 struct { 536 __le32 inst_size; /* bytes of runtime code */ 537 __le32 data_size; /* bytes of runtime data */ 538 __le32 init_size; /* bytes of init code */ 539 __le32 init_data_size; /* bytes of init data */ 540 __le32 boot_size; /* bytes of bootstrap code */ 541 u8 data[0]; /* in same order as sizes */ 542 } v1; 543 struct { 544 __le32 build; /* build number */ 545 __le32 inst_size; /* bytes of runtime code */ 546 __le32 data_size; /* bytes of runtime data */ 547 __le32 init_size; /* bytes of init code */ 548 __le32 init_data_size; /* bytes of init data */ 549 __le32 boot_size; /* bytes of bootstrap code */ 550 u8 data[0]; /* in same order as sizes */ 551 } v2; 552 } u; 553}; 554 555/* 556 * new TLV uCode file layout 557 * 558 * The new TLV file format contains TLVs, that each specify 559 * some piece of data. To facilitate "groups", for example 560 * different instruction image with different capabilities, 561 * bundled with the same init image, an alternative mechanism 562 * is provided: 563 * When the alternative field is 0, that means that the item 564 * is always valid. When it is non-zero, then it is only 565 * valid in conjunction with items of the same alternative, 566 * in which case the driver (user) selects one alternative 567 * to use. 568 */ 569 570enum iwl_ucode_tlv_type { 571 IWL_UCODE_TLV_INVALID = 0, /* unused */ 572 IWL_UCODE_TLV_INST = 1, 573 IWL_UCODE_TLV_DATA = 2, 574 IWL_UCODE_TLV_INIT = 3, 575 IWL_UCODE_TLV_INIT_DATA = 4, 576 IWL_UCODE_TLV_BOOT = 5, 577 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 578 IWL_UCODE_TLV_PAN = 7, 579 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 580 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 581 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 582 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 583 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 584 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 585 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 586 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 587}; 588 589struct iwl_ucode_tlv { 590 __le16 type; /* see above */ 591 __le16 alternative; /* see comment */ 592 __le32 length; /* not including type/length fields */ 593 u8 data[0]; 594} __packed; 595 596#define IWL_TLV_UCODE_MAGIC 0x0a4c5749 597 598struct iwl_tlv_ucode_header { 599 /* 600 * The TLV style ucode header is distinguished from 601 * the v1/v2 style header by first four bytes being 602 * zero, as such is an invalid combination of 603 * major/minor/API/serial versions. 604 */ 605 __le32 zero; 606 __le32 magic; 607 u8 human_readable[64]; 608 __le32 ver; /* major/minor/API/serial */ 609 __le32 build; 610 __le64 alternatives; /* bitmask of valid alternatives */ 611 /* 612 * The data contained herein has a TLV layout, 613 * see above for the TLV header and types. 614 * Note that each TLV is padded to a length 615 * that is a multiple of 4 for alignment. 616 */ 617 u8 data[0]; 618}; 619 620struct iwl4965_ibss_seq { 621 u8 mac[ETH_ALEN]; 622 u16 seq_num; 623 u16 frag_num; 624 unsigned long packet_time; 625 struct list_head list; 626}; 627 628struct iwl_sensitivity_ranges { 629 u16 min_nrg_cck; 630 u16 max_nrg_cck; 631 632 u16 nrg_th_cck; 633 u16 nrg_th_ofdm; 634 635 u16 auto_corr_min_ofdm; 636 u16 auto_corr_min_ofdm_mrc; 637 u16 auto_corr_min_ofdm_x1; 638 u16 auto_corr_min_ofdm_mrc_x1; 639 640 u16 auto_corr_max_ofdm; 641 u16 auto_corr_max_ofdm_mrc; 642 u16 auto_corr_max_ofdm_x1; 643 u16 auto_corr_max_ofdm_mrc_x1; 644 645 u16 auto_corr_max_cck; 646 u16 auto_corr_max_cck_mrc; 647 u16 auto_corr_min_cck; 648 u16 auto_corr_min_cck_mrc; 649 650 u16 barker_corr_th_min; 651 u16 barker_corr_th_min_mrc; 652 u16 nrg_th_cca; 653}; 654 655 656#define KELVIN_TO_CELSIUS(x) ((x)-273) 657#define CELSIUS_TO_KELVIN(x) ((x)+273) 658 659 660/** 661 * struct iwl_hw_params 662 * @max_txq_num: Max # Tx queues supported 663 * @dma_chnl_num: Number of Tx DMA/FIFO channels 664 * @scd_bc_tbls_size: size of scheduler byte count tables 665 * @tfd_size: TFD size 666 * @tx/rx_chains_num: Number of TX/RX chains 667 * @valid_tx/rx_ant: usable antennas 668 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) 669 * @max_rxq_log: Log-base-2 of max_rxq_size 670 * @rx_page_order: Rx buffer page order 671 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 672 * @max_stations: 673 * @ht40_channel: is 40MHz width possible in band 2.4 674 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ) 675 * @sw_crypto: 0 for hw, 1 for sw 676 * @max_xxx_size: for ucode uses 677 * @ct_kill_threshold: temperature threshold 678 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time 679 * @calib_init_cfg: setup initial calibrations for the hw 680 * @calib_rt_cfg: setup runtime calibrations for the hw 681 * @struct iwl_sensitivity_ranges: range of sensitivity values 682 */ 683struct iwl_hw_params { 684 u8 max_txq_num; 685 u8 dma_chnl_num; 686 u16 scd_bc_tbls_size; 687 u32 tfd_size; 688 u8 tx_chains_num; 689 u8 rx_chains_num; 690 u8 valid_tx_ant; 691 u8 valid_rx_ant; 692 u16 max_rxq_size; 693 u16 max_rxq_log; 694 u32 rx_page_order; 695 u32 rx_wrt_ptr_reg; 696 u8 max_stations; 697 u8 ht40_channel; 698 u8 max_beacon_itrvl; /* in 1024 ms */ 699 u32 max_inst_size; 700 u32 max_data_size; 701 u32 max_bsm_size; 702 u32 ct_kill_threshold; /* value in hw-dependent units */ 703 u32 ct_kill_exit_threshold; /* value in hw-dependent units */ 704 /* for 1000, 6000 series and up */ 705 u16 beacon_time_tsf_bits; 706 u32 calib_init_cfg; 707 u32 calib_rt_cfg; 708 const struct iwl_sensitivity_ranges *sens; 709}; 710 711 712/****************************************************************************** 713 * 714 * Functions implemented in core module which are forward declared here 715 * for use by iwl-[4-5].c 716 * 717 * NOTE: The implementation of these functions are not hardware specific 718 * which is why they are in the core module files. 719 * 720 * Naming convention -- 721 * iwl_ <-- Is part of iwlwifi 722 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) 723 * iwl4965_bg_ <-- Called from work queue context 724 * iwl4965_mac_ <-- mac80211 callback 725 * 726 ****************************************************************************/ 727extern void iwl_update_chain_flags(struct iwl_priv *priv); 728extern const u8 iwl_bcast_addr[ETH_ALEN]; 729extern int iwl_rxq_stop(struct iwl_priv *priv); 730extern void iwl_txq_ctx_stop(struct iwl_priv *priv); 731extern int iwl_queue_space(const struct iwl_queue *q); 732static inline int iwl_queue_used(const struct iwl_queue *q, int i) 733{ 734 return q->write_ptr >= q->read_ptr ? 735 (i >= q->read_ptr && i < q->write_ptr) : 736 !(i < q->read_ptr && i >= q->write_ptr); 737} 738 739 740static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge) 741{ 742 /* 743 * This is for init calibration result and scan command which 744 * required buffer > TFD_MAX_PAYLOAD_SIZE, 745 * the big buffer at end of command array 746 */ 747 if (is_huge) 748 return q->n_window; /* must be power of 2 */ 749 750 /* Otherwise, use normal size buffers */ 751 return index & (q->n_window - 1); 752} 753 754 755struct iwl_dma_ptr { 756 dma_addr_t dma; 757 void *addr; 758 size_t size; 759}; 760 761#define IWL_OPERATION_MODE_AUTO 0 762#define IWL_OPERATION_MODE_HT_ONLY 1 763#define IWL_OPERATION_MODE_MIXED 2 764#define IWL_OPERATION_MODE_20MHZ 3 765 766#define IWL_TX_CRC_SIZE 4 767#define IWL_TX_DELIMITER_SIZE 4 768 769#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 770 771/* Sensitivity and chain noise calibration */ 772#define INITIALIZATION_VALUE 0xFFFF 773#define IWL4965_CAL_NUM_BEACONS 20 774#define IWL_CAL_NUM_BEACONS 16 775#define MAXIMUM_ALLOWED_PATHLOSS 15 776 777#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 778 779#define MAX_FA_OFDM 50 780#define MIN_FA_OFDM 5 781#define MAX_FA_CCK 50 782#define MIN_FA_CCK 5 783 784#define AUTO_CORR_STEP_OFDM 1 785 786#define AUTO_CORR_STEP_CCK 3 787#define AUTO_CORR_MAX_TH_CCK 160 788 789#define NRG_DIFF 2 790#define NRG_STEP_CCK 2 791#define NRG_MARGIN 8 792#define MAX_NUMBER_CCK_NO_FA 100 793 794#define AUTO_CORR_CCK_MIN_VAL_DEF (125) 795 796#define CHAIN_A 0 797#define CHAIN_B 1 798#define CHAIN_C 2 799#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 800#define ALL_BAND_FILTER 0xFF00 801#define IN_BAND_FILTER 0xFF 802#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF 803 804#define NRG_NUM_PREV_STAT_L 20 805#define NUM_RX_CHAINS 3 806 807enum iwl4965_false_alarm_state { 808 IWL_FA_TOO_MANY = 0, 809 IWL_FA_TOO_FEW = 1, 810 IWL_FA_GOOD_RANGE = 2, 811}; 812 813enum iwl4965_chain_noise_state { 814 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ 815 IWL_CHAIN_NOISE_ACCUMULATE, 816 IWL_CHAIN_NOISE_CALIBRATED, 817 IWL_CHAIN_NOISE_DONE, 818}; 819 820enum iwl4965_calib_enabled_state { 821 IWL_CALIB_DISABLED = 0, /* must be 0 */ 822 IWL_CALIB_ENABLED = 1, 823}; 824 825 826/* 827 * enum iwl_calib 828 * defines the order in which results of initial calibrations 829 * should be sent to the runtime uCode 830 */ 831enum iwl_calib { 832 IWL_CALIB_XTAL, 833 IWL_CALIB_DC, 834 IWL_CALIB_LO, 835 IWL_CALIB_TX_IQ, 836 IWL_CALIB_TX_IQ_PERD, 837 IWL_CALIB_BASE_BAND, 838 IWL_CALIB_TEMP_OFFSET, 839 IWL_CALIB_MAX 840}; 841 842/* Opaque calibration results */ 843struct iwl_calib_result { 844 void *buf; 845 size_t buf_len; 846}; 847 848enum ucode_type { 849 UCODE_NONE = 0, 850 UCODE_INIT, 851 UCODE_RT 852}; 853 854/* Sensitivity calib data */ 855struct iwl_sensitivity_data { 856 u32 auto_corr_ofdm; 857 u32 auto_corr_ofdm_mrc; 858 u32 auto_corr_ofdm_x1; 859 u32 auto_corr_ofdm_mrc_x1; 860 u32 auto_corr_cck; 861 u32 auto_corr_cck_mrc; 862 863 u32 last_bad_plcp_cnt_ofdm; 864 u32 last_fa_cnt_ofdm; 865 u32 last_bad_plcp_cnt_cck; 866 u32 last_fa_cnt_cck; 867 868 u32 nrg_curr_state; 869 u32 nrg_prev_state; 870 u32 nrg_value[10]; 871 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; 872 u32 nrg_silence_ref; 873 u32 nrg_energy_idx; 874 u32 nrg_silence_idx; 875 u32 nrg_th_cck; 876 s32 nrg_auto_corr_silence_diff; 877 u32 num_in_cck_no_fa; 878 u32 nrg_th_ofdm; 879 880 u16 barker_corr_th_min; 881 u16 barker_corr_th_min_mrc; 882 u16 nrg_th_cca; 883}; 884 885/* Chain noise (differential Rx gain) calib data */ 886struct iwl_chain_noise_data { 887 u32 active_chains; 888 u32 chain_noise_a; 889 u32 chain_noise_b; 890 u32 chain_noise_c; 891 u32 chain_signal_a; 892 u32 chain_signal_b; 893 u32 chain_signal_c; 894 u16 beacon_count; 895 u8 disconn_array[NUM_RX_CHAINS]; 896 u8 delta_gain_code[NUM_RX_CHAINS]; 897 u8 radio_write; 898 u8 state; 899}; 900 901#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 902#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 903 904#define IWL_TRAFFIC_ENTRIES (256) 905#define IWL_TRAFFIC_ENTRY_SIZE (64) 906 907enum { 908 MEASUREMENT_READY = (1 << 0), 909 MEASUREMENT_ACTIVE = (1 << 1), 910}; 911 912enum iwl_nvm_type { 913 NVM_DEVICE_TYPE_EEPROM = 0, 914 NVM_DEVICE_TYPE_OTP, 915}; 916 917/* 918 * Two types of OTP memory access modes 919 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, 920 * based on physical memory addressing 921 * IWL_OTP_ACCESS_RELATIVE - relative address mode, 922 * based on logical memory addressing 923 */ 924enum iwl_access_mode { 925 IWL_OTP_ACCESS_ABSOLUTE, 926 IWL_OTP_ACCESS_RELATIVE, 927}; 928 929/** 930 * enum iwl_pa_type - Power Amplifier type 931 * @IWL_PA_SYSTEM: based on uCode configuration 932 * @IWL_PA_INTERNAL: use Internal only 933 */ 934enum iwl_pa_type { 935 IWL_PA_SYSTEM = 0, 936 IWL_PA_INTERNAL = 1, 937}; 938 939/* interrupt statistics */ 940struct isr_statistics { 941 u32 hw; 942 u32 sw; 943 u32 err_code; 944 u32 sch; 945 u32 alive; 946 u32 rfkill; 947 u32 ctkill; 948 u32 wakeup; 949 u32 rx; 950 u32 rx_handlers[REPLY_MAX]; 951 u32 tx; 952 u32 unhandled; 953}; 954 955/* reply_tx_statistics (for _agn devices) */ 956struct reply_tx_error_statistics { 957 u32 pp_delay; 958 u32 pp_few_bytes; 959 u32 pp_bt_prio; 960 u32 pp_quiet_period; 961 u32 pp_calc_ttak; 962 u32 int_crossed_retry; 963 u32 short_limit; 964 u32 long_limit; 965 u32 fifo_underrun; 966 u32 drain_flow; 967 u32 rfkill_flush; 968 u32 life_expire; 969 u32 dest_ps; 970 u32 host_abort; 971 u32 bt_retry; 972 u32 sta_invalid; 973 u32 frag_drop; 974 u32 tid_disable; 975 u32 fifo_flush; 976 u32 insuff_cf_poll; 977 u32 fail_hw_drop; 978 u32 sta_color_mismatch; 979 u32 unknown; 980}; 981 982/* reply_agg_tx_statistics (for _agn devices) */ 983struct reply_agg_tx_error_statistics { 984 u32 underrun; 985 u32 bt_prio; 986 u32 few_bytes; 987 u32 abort; 988 u32 last_sent_ttl; 989 u32 last_sent_try; 990 u32 last_sent_bt_kill; 991 u32 scd_query; 992 u32 bad_crc32; 993 u32 response; 994 u32 dump_tx; 995 u32 delay_tx; 996 u32 unknown; 997}; 998 999#ifdef CONFIG_IWLWIFI_DEBUGFS 1000/* management statistics */ 1001enum iwl_mgmt_stats { 1002 MANAGEMENT_ASSOC_REQ = 0, 1003 MANAGEMENT_ASSOC_RESP, 1004 MANAGEMENT_REASSOC_REQ, 1005 MANAGEMENT_REASSOC_RESP, 1006 MANAGEMENT_PROBE_REQ, 1007 MANAGEMENT_PROBE_RESP, 1008 MANAGEMENT_BEACON, 1009 MANAGEMENT_ATIM, 1010 MANAGEMENT_DISASSOC, 1011 MANAGEMENT_AUTH, 1012 MANAGEMENT_DEAUTH, 1013 MANAGEMENT_ACTION, 1014 MANAGEMENT_MAX, 1015}; 1016/* control statistics */ 1017enum iwl_ctrl_stats { 1018 CONTROL_BACK_REQ = 0, 1019 CONTROL_BACK, 1020 CONTROL_PSPOLL, 1021 CONTROL_RTS, 1022 CONTROL_CTS, 1023 CONTROL_ACK, 1024 CONTROL_CFEND, 1025 CONTROL_CFENDACK, 1026 CONTROL_MAX, 1027}; 1028 1029struct traffic_stats { 1030 u32 mgmt[MANAGEMENT_MAX]; 1031 u32 ctrl[CONTROL_MAX]; 1032 u32 data_cnt; 1033 u64 data_bytes; 1034}; 1035#else 1036struct traffic_stats { 1037 u64 data_bytes; 1038}; 1039#endif 1040 1041/* 1042 * iwl_switch_rxon: "channel switch" structure 1043 * 1044 * @ switch_in_progress: channel switch in progress 1045 * @ channel: new channel 1046 */ 1047struct iwl_switch_rxon { 1048 bool switch_in_progress; 1049 __le16 channel; 1050}; 1051 1052/* 1053 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds 1054 * to perform continuous uCode event logging operation if enabled 1055 */ 1056#define UCODE_TRACE_PERIOD (100) 1057 1058/* 1059 * iwl_event_log: current uCode event log position 1060 * 1061 * @ucode_trace: enable/disable ucode continuous trace timer 1062 * @num_wraps: how many times the event buffer wraps 1063 * @next_entry: the entry just before the next one that uCode would fill 1064 * @non_wraps_count: counter for no wrap detected when dump ucode events 1065 * @wraps_once_count: counter for wrap once detected when dump ucode events 1066 * @wraps_more_count: counter for wrap more than once detected 1067 * when dump ucode events 1068 */ 1069struct iwl_event_log { 1070 bool ucode_trace; 1071 u32 num_wraps; 1072 u32 next_entry; 1073 int non_wraps_count; 1074 int wraps_once_count; 1075 int wraps_more_count; 1076}; 1077 1078/* 1079 * host interrupt timeout value 1080 * used with setting interrupt coalescing timer 1081 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit 1082 * 1083 * default interrupt coalescing timer is 64 x 32 = 2048 usecs 1084 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs 1085 */ 1086#define IWL_HOST_INT_TIMEOUT_MAX (0xFF) 1087#define IWL_HOST_INT_TIMEOUT_DEF (0x40) 1088#define IWL_HOST_INT_TIMEOUT_MIN (0x0) 1089#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF) 1090#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10) 1091#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0) 1092 1093/* 1094 * This is the threshold value of plcp error rate per 100mSecs. It is 1095 * used to set and check for the validity of plcp_delta. 1096 */ 1097#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1) 1098#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50) 1099#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100) 1100#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200) 1101#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255) 1102#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0) 1103 1104#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3) 1105#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) 1106 1107/* timer constants use to monitor and recover stuck tx queues in mSecs */ 1108#define IWL_DEF_MONITORING_PERIOD (1000) 1109#define IWL_LONG_MONITORING_PERIOD (5000) 1110#define IWL_ONE_HUNDRED_MSECS (100) 1111#define IWL_MAX_MONITORING_PERIOD (60000) 1112 1113/* BT Antenna Coupling Threshold (dB) */ 1114#define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35) 1115 1116enum iwl_reset { 1117 IWL_RF_RESET = 0, 1118 IWL_FW_RESET, 1119 IWL_MAX_FORCE_RESET, 1120}; 1121 1122struct iwl_force_reset { 1123 int reset_request_count; 1124 int reset_success_count; 1125 int reset_reject_count; 1126 unsigned long reset_duration; 1127 unsigned long last_force_reset_jiffies; 1128}; 1129 1130/* extend beacon time format bit shifting */ 1131/* 1132 * for _3945 devices 1133 * bits 31:24 - extended 1134 * bits 23:0 - interval 1135 */ 1136#define IWL3945_EXT_BEACON_TIME_POS 24 1137/* 1138 * for _agn devices 1139 * bits 31:22 - extended 1140 * bits 21:0 - interval 1141 */ 1142#define IWLAGN_EXT_BEACON_TIME_POS 22 1143 1144enum iwl_rxon_context_id { 1145 IWL_RXON_CTX_BSS, 1146 IWL_RXON_CTX_PAN, 1147 1148 NUM_IWL_RXON_CTX 1149}; 1150 1151struct iwl_rxon_context { 1152 struct ieee80211_vif *vif; 1153 1154 const u8 *ac_to_fifo; 1155 const u8 *ac_to_queue; 1156 u8 mcast_queue; 1157 1158 /* 1159 * We could use the vif to indicate active, but we 1160 * also need it to be active during disabling when 1161 * we already removed the vif for type setting. 1162 */ 1163 bool always_active, is_active; 1164 1165 enum iwl_rxon_context_id ctxid; 1166 1167 u32 interface_modes, exclusive_interface_modes; 1168 u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype; 1169 1170 /* 1171 * We declare this const so it can only be 1172 * changed via explicit cast within the 1173 * routines that actually update the physical 1174 * hardware. 1175 */ 1176 const struct iwl_rxon_cmd active; 1177 struct iwl_rxon_cmd staging; 1178 1179 struct iwl_rxon_time_cmd timing; 1180 1181 struct iwl_qos_info qos_data; 1182 1183 u8 bcast_sta_id, ap_sta_id; 1184 1185 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd; 1186 u8 qos_cmd; 1187 u8 wep_key_cmd; 1188 1189 struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; 1190 u8 key_mapping_keys; 1191 1192 __le32 station_flags; 1193 1194 struct { 1195 bool non_gf_sta_present; 1196 u8 protection; 1197 bool enabled, is_40mhz; 1198 u8 extension_chan_offset; 1199 } ht; 1200}; 1201 1202struct iwl_priv { 1203 1204 /* ieee device used by generic ieee processing code */ 1205 struct ieee80211_hw *hw; 1206 struct ieee80211_channel *ieee_channels; 1207 struct ieee80211_rate *ieee_rates; 1208 struct iwl_cfg *cfg; 1209 1210 /* temporary frame storage list */ 1211 struct list_head free_frames; 1212 int frames_count; 1213 1214 enum ieee80211_band band; 1215 int alloc_rxb_page; 1216 1217 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 1218 struct iwl_rx_mem_buffer *rxb); 1219 1220 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1221 1222 /* spectrum measurement report caching */ 1223 struct iwl_spectrum_notification measure_report; 1224 u8 measurement_status; 1225 1226 /* ucode beacon time */ 1227 u32 ucode_beacon_time; 1228 int missed_beacon_threshold; 1229 1230 /* track IBSS manager (last beacon) status */ 1231 u32 ibss_manager; 1232 1233 /* storing the jiffies when the plcp error rate is received */ 1234 unsigned long plcp_jiffies; 1235 1236 /* force reset */ 1237 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; 1238 1239 /* we allocate array of iwl_channel_info for NIC's valid channels. 1240 * Access via channel # using indirect index array */ 1241 struct iwl_channel_info *channel_info; /* channel info array */ 1242 u8 channel_count; /* # of channels */ 1243 1244 /* thermal calibration */ 1245 s32 temperature; /* degrees Kelvin */ 1246 s32 last_temperature; 1247 1248 /* init calibration results */ 1249 struct iwl_calib_result calib_results[IWL_CALIB_MAX]; 1250 1251 /* Scan related variables */ 1252 unsigned long scan_start; 1253 unsigned long scan_start_tsf; 1254 void *scan_cmd; 1255 enum ieee80211_band scan_band; 1256 struct cfg80211_scan_request *scan_request; 1257 struct ieee80211_vif *scan_vif; 1258 bool is_internal_short_scan; 1259 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 1260 u8 mgmt_tx_ant; 1261 1262 /* spinlock */ 1263 spinlock_t lock; /* protect general shared data */ 1264 spinlock_t hcmd_lock; /* protect hcmd */ 1265 spinlock_t reg_lock; /* protect hw register access */ 1266 struct mutex mutex; 1267 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */ 1268 1269 /* basic pci-network driver stuff */ 1270 struct pci_dev *pci_dev; 1271 1272 /* pci hardware address support */ 1273 void __iomem *hw_base; 1274 u32 hw_rev; 1275 u32 hw_wa_rev; 1276 u8 rev_id; 1277 1278 /* microcode/device supports multiple contexts */ 1279 u8 valid_contexts; 1280 1281 /* command queue number */ 1282 u8 cmd_queue; 1283 1284 /* max number of station keys */ 1285 u8 sta_key_max_num; 1286 1287 /* EEPROM MAC addresses */ 1288 struct mac_address addresses[2]; 1289 1290 /* uCode images, save to reload in case of failure */ 1291 int fw_index; /* firmware we're trying to load */ 1292 u32 ucode_ver; /* version of ucode, copy of 1293 iwl_ucode.ver */ 1294 struct fw_desc ucode_code; /* runtime inst */ 1295 struct fw_desc ucode_data; /* runtime data original */ 1296 struct fw_desc ucode_data_backup; /* runtime data save/restore */ 1297 struct fw_desc ucode_init; /* initialization inst */ 1298 struct fw_desc ucode_init_data; /* initialization data */ 1299 struct fw_desc ucode_boot; /* bootstrap inst */ 1300 enum ucode_type ucode_type; 1301 u8 ucode_write_complete; /* the image write is complete */ 1302 char firmware_name[25]; 1303 1304 struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX]; 1305 1306 struct iwl_switch_rxon switch_rxon; 1307 1308 /* 1st responses from initialize and runtime uCode images. 1309 * _agn's initialize alive response contains some calibration data. */ 1310 struct iwl_init_alive_resp card_alive_init; 1311 struct iwl_alive_resp card_alive; 1312 1313 unsigned long last_blink_time; 1314 u8 last_blink_rate; 1315 u8 allow_blinking; 1316 u64 led_tpt; 1317 1318 u16 active_rate; 1319 1320 u8 start_calib; 1321 struct iwl_sensitivity_data sensitivity_data; 1322 struct iwl_chain_noise_data chain_noise_data; 1323 bool enhance_sensitivity_table; 1324 __le16 sensitivity_tbl[HD_TABLE_SIZE]; 1325 __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES]; 1326 1327 struct iwl_ht_config current_ht_config; 1328 1329 /* Rate scaling data */ 1330 u8 retry_rate; 1331 1332 wait_queue_head_t wait_command_queue; 1333 1334 int activity_timer_active; 1335 1336 /* Rx and Tx DMA processing queues */ 1337 struct iwl_rx_queue rxq; 1338 struct iwl_tx_queue *txq; 1339 unsigned long txq_ctx_active_msk; 1340 struct iwl_dma_ptr kw; /* keep warm address */ 1341 struct iwl_dma_ptr scd_bc_tbls; 1342 1343 u32 scd_base_addr; /* scheduler sram base address */ 1344 1345 unsigned long status; 1346 1347 /* counts mgmt, ctl, and data packets */ 1348 struct traffic_stats tx_stats; 1349 struct traffic_stats rx_stats; 1350 1351 /* counts interrupts */ 1352 struct isr_statistics isr_stats; 1353 1354 struct iwl_power_mgr power_data; 1355 struct iwl_tt_mgmt thermal_throttle; 1356 1357 /* context information */ 1358 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ 1359 1360 /* station table variables */ 1361 1362 /* Note: if lock and sta_lock are needed, lock must be acquired first */ 1363 spinlock_t sta_lock; 1364 int num_stations; 1365 struct iwl_station_entry stations[IWL_STATION_COUNT]; 1366 unsigned long ucode_key_table; 1367 1368 /* queue refcounts */ 1369#define IWL_MAX_HW_QUEUES 32 1370 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; 1371 /* for each AC */ 1372 atomic_t queue_stop_count[4]; 1373 1374 /* Indication if ieee80211_ops->open has been called */ 1375 u8 is_open; 1376 1377 u8 mac80211_registered; 1378 1379 /* eeprom -- this is in the card's little endian byte order */ 1380 u8 *eeprom; 1381 int nvm_device_type; 1382 struct iwl_eeprom_calib_info *calib_info; 1383 1384 enum nl80211_iftype iw_mode; 1385 1386 struct sk_buff *ibss_beacon; 1387 1388 /* Last Rx'd beacon timestamp */ 1389 u64 timestamp; 1390 1391 union { 1392#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE) 1393 struct { 1394 void *shared_virt; 1395 dma_addr_t shared_phys; 1396 1397 struct delayed_work thermal_periodic; 1398 struct delayed_work rfkill_poll; 1399 1400 struct iwl3945_notif_statistics statistics; 1401#ifdef CONFIG_IWLWIFI_DEBUGFS 1402 struct iwl3945_notif_statistics accum_statistics; 1403 struct iwl3945_notif_statistics delta_statistics; 1404 struct iwl3945_notif_statistics max_delta; 1405#endif 1406 1407 u32 sta_supp_rates; 1408 int last_rx_rssi; /* From Rx packet statistics */ 1409 1410 /* Rx'd packet timing information */ 1411 u32 last_beacon_time; 1412 u64 last_tsf; 1413 1414 /* 1415 * each calibration channel group in the 1416 * EEPROM has a derived clip setting for 1417 * each rate. 1418 */ 1419 const struct iwl3945_clip_group clip_groups[5]; 1420 1421 } _3945; 1422#endif 1423#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE) 1424 struct { 1425 /* INT ICT Table */ 1426 __le32 *ict_tbl; 1427 void *ict_tbl_vir; 1428 dma_addr_t ict_tbl_dma; 1429 dma_addr_t aligned_ict_tbl_dma; 1430 int ict_index; 1431 u32 inta; 1432 bool use_ict; 1433 /* 1434 * reporting the number of tids has AGG on. 0 means 1435 * no AGGREGATION 1436 */ 1437 u8 agg_tids_count; 1438 1439 struct iwl_rx_phy_res last_phy_res; 1440 bool last_phy_res_valid; 1441 1442 struct completion firmware_loading_complete; 1443 1444 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; 1445 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; 1446 1447 /* 1448 * chain noise reset and gain commands are the 1449 * two extra calibration commands follows the standard 1450 * phy calibration commands 1451 */ 1452 u8 phy_calib_chain_noise_reset_cmd; 1453 u8 phy_calib_chain_noise_gain_cmd; 1454 1455 struct iwl_notif_statistics statistics; 1456 struct iwl_bt_notif_statistics statistics_bt; 1457 /* counts reply_tx error */ 1458 struct reply_tx_error_statistics reply_tx_stats; 1459 struct reply_agg_tx_error_statistics reply_agg_tx_stats; 1460#ifdef CONFIG_IWLWIFI_DEBUGFS 1461 struct iwl_notif_statistics accum_statistics; 1462 struct iwl_notif_statistics delta_statistics; 1463 struct iwl_notif_statistics max_delta; 1464 struct iwl_bt_notif_statistics accum_statistics_bt; 1465 struct iwl_bt_notif_statistics delta_statistics_bt; 1466 struct iwl_bt_notif_statistics max_delta_bt; 1467#endif 1468 } _agn; 1469#endif 1470 }; 1471 1472 /* bt coex */ 1473 u8 bt_status; 1474 u8 bt_traffic_load, notif_bt_traffic_load; 1475 bool bt_ch_announce; 1476 bool bt_sco_active; 1477 bool bt_full_concurrent; 1478 bool bt_ant_couple_ok; 1479 __le32 kill_ack_mask; 1480 __le32 kill_cts_mask; 1481 __le16 bt_valid; 1482 u16 bt_on_thresh; 1483 u16 bt_duration; 1484 u16 dynamic_frag_thresh; 1485 u16 dynamic_agg_thresh; 1486 u8 bt_ci_compliance; 1487 struct work_struct bt_traffic_change_work; 1488 1489 struct iwl_hw_params hw_params; 1490 1491 u32 inta_mask; 1492 1493 struct workqueue_struct *workqueue; 1494 1495 struct work_struct restart; 1496 struct work_struct scan_completed; 1497 struct work_struct rx_replenish; 1498 struct work_struct abort_scan; 1499 struct work_struct beacon_update; 1500 struct iwl_rxon_context *beacon_ctx; 1501 1502 struct work_struct tt_work; 1503 struct work_struct ct_enter; 1504 struct work_struct ct_exit; 1505 struct work_struct start_internal_scan; 1506 struct work_struct tx_flush; 1507 struct work_struct bt_full_concurrency; 1508 struct work_struct bt_runtime_config; 1509 1510 struct tasklet_struct irq_tasklet; 1511 1512 struct delayed_work init_alive_start; 1513 struct delayed_work alive_start; 1514 struct delayed_work scan_check; 1515 1516 /* TX Power */ 1517 s8 tx_power_user_lmt; 1518 s8 tx_power_device_lmt; 1519 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */ 1520 1521 1522#ifdef CONFIG_IWLWIFI_DEBUG 1523 /* debugging info */ 1524 u32 debug_level; /* per device debugging will override global 1525 iwl_debug_level if set */ 1526#endif /* CONFIG_IWLWIFI_DEBUG */ 1527#ifdef CONFIG_IWLWIFI_DEBUGFS 1528 /* debugfs */ 1529 u16 tx_traffic_idx; 1530 u16 rx_traffic_idx; 1531 u8 *tx_traffic; 1532 u8 *rx_traffic; 1533 struct dentry *debugfs_dir; 1534 u32 dbgfs_sram_offset, dbgfs_sram_len; 1535 bool disable_ht40; 1536#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1537 1538 struct work_struct txpower_work; 1539 u32 disable_sens_cal; 1540 u32 disable_chain_noise_cal; 1541 u32 disable_tx_power_cal; 1542 struct work_struct run_time_calib_work; 1543 struct timer_list statistics_periodic; 1544 struct timer_list ucode_trace; 1545 struct timer_list monitor_recover; 1546 bool hw_ready; 1547 1548 struct iwl_event_log event_log; 1549}; /*iwl_priv */ 1550 1551static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1552{ 1553 set_bit(txq_id, &priv->txq_ctx_active_msk); 1554} 1555 1556static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) 1557{ 1558 clear_bit(txq_id, &priv->txq_ctx_active_msk); 1559} 1560 1561#ifdef CONFIG_IWLWIFI_DEBUG 1562/* 1563 * iwl_get_debug_level: Return active debug level for device 1564 * 1565 * Using sysfs it is possible to set per device debug level. This debug 1566 * level will be used if set, otherwise the global debug level which can be 1567 * set via module parameter is used. 1568 */ 1569static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1570{ 1571 if (priv->debug_level) 1572 return priv->debug_level; 1573 else 1574 return iwl_debug_level; 1575} 1576#else 1577static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1578{ 1579 return iwl_debug_level; 1580} 1581#endif 1582 1583 1584static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, 1585 int txq_id, int idx) 1586{ 1587 if (priv->txq[txq_id].txb[idx].skb) 1588 return (struct ieee80211_hdr *)priv->txq[txq_id]. 1589 txb[idx].skb->data; 1590 return NULL; 1591} 1592 1593static inline struct iwl_rxon_context * 1594iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif) 1595{ 1596 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 1597 1598 return vif_priv->ctx; 1599} 1600 1601#define for_each_context(priv, ctx) \ 1602 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \ 1603 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \ 1604 if (priv->valid_contexts & BIT(ctx->ctxid)) 1605 1606static inline int iwl_is_associated(struct iwl_priv *priv, 1607 enum iwl_rxon_context_id ctxid) 1608{ 1609 return (priv->contexts[ctxid].active.filter_flags & 1610 RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1611} 1612 1613static inline int iwl_is_any_associated(struct iwl_priv *priv) 1614{ 1615 return iwl_is_associated(priv, IWL_RXON_CTX_BSS); 1616} 1617 1618static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx) 1619{ 1620 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1621} 1622 1623static inline int is_channel_valid(const struct iwl_channel_info *ch_info) 1624{ 1625 if (ch_info == NULL) 1626 return 0; 1627 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; 1628} 1629 1630static inline int is_channel_radar(const struct iwl_channel_info *ch_info) 1631{ 1632 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; 1633} 1634 1635static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info) 1636{ 1637 return ch_info->band == IEEE80211_BAND_5GHZ; 1638} 1639 1640static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info) 1641{ 1642 return ch_info->band == IEEE80211_BAND_2GHZ; 1643} 1644 1645static inline int is_channel_passive(const struct iwl_channel_info *ch) 1646{ 1647 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; 1648} 1649 1650static inline int is_channel_ibss(const struct iwl_channel_info *ch) 1651{ 1652 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1653} 1654 1655static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) 1656{ 1657 __free_pages(page, priv->hw_params.rx_page_order); 1658 priv->alloc_rxb_page--; 1659} 1660 1661static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) 1662{ 1663 free_pages(page, priv->hw_params.rx_page_order); 1664 priv->alloc_rxb_page--; 1665} 1666#endif /* __iwl_dev_h__ */ 1667