iwl-dev.h revision ece9c4ee5e590f96d7221c746126eaafac15a60c
1/****************************************************************************** 2 * 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called LICENSE. 20 * 21 * Contact Information: 22 * Intel Linux Wireless <ilw@linux.intel.com> 23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 24 * 25 *****************************************************************************/ 26/* 27 * Please use this file (iwl-dev.h) for driver implementation definitions. 28 * Please use iwl-commands.h for uCode API definitions. 29 * Please use iwl-4965-hw.h for hardware-related definitions. 30 */ 31 32#ifndef __iwl_dev_h__ 33#define __iwl_dev_h__ 34 35#include <linux/pci.h> /* for struct pci_device_id */ 36#include <linux/kernel.h> 37#include <net/ieee80211_radiotap.h> 38 39#include "iwl-eeprom.h" 40#include "iwl-csr.h" 41#include "iwl-prph.h" 42#include "iwl-fh.h" 43#include "iwl-debug.h" 44#include "iwl-4965-hw.h" 45#include "iwl-3945-hw.h" 46#include "iwl-agn-hw.h" 47#include "iwl-led.h" 48#include "iwl-power.h" 49#include "iwl-agn-rs.h" 50#include "iwl-agn-tt.h" 51 52struct iwl_tx_queue; 53 54/* CT-KILL constants */ 55#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ 56#define CT_KILL_THRESHOLD 114 /* in Celsius */ 57#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */ 58 59/* Default noise level to report when noise measurement is not available. 60 * This may be because we're: 61 * 1) Not associated (4965, no beacon statistics being sent to driver) 62 * 2) Scanning (noise measurement does not apply to associated channel) 63 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames) 64 * Use default noise value of -127 ... this is below the range of measurable 65 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user. 66 * Also, -127 works better than 0 when averaging frames with/without 67 * noise info (e.g. averaging might be done in app); measured dBm values are 68 * always negative ... using a negative value as the default keeps all 69 * averages within an s8's (used in some apps) range of negative values. */ 70#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127) 71 72/* 73 * RTS threshold here is total size [2347] minus 4 FCS bytes 74 * Per spec: 75 * a value of 0 means RTS on all data/management packets 76 * a value > max MSDU size means no RTS 77 * else RTS for data/management frames where MPDU is larger 78 * than RTS value. 79 */ 80#define DEFAULT_RTS_THRESHOLD 2347U 81#define MIN_RTS_THRESHOLD 0U 82#define MAX_RTS_THRESHOLD 2347U 83#define MAX_MSDU_SIZE 2304U 84#define MAX_MPDU_SIZE 2346U 85#define DEFAULT_BEACON_INTERVAL 100U 86#define DEFAULT_SHORT_RETRY_LIMIT 7U 87#define DEFAULT_LONG_RETRY_LIMIT 4U 88 89struct iwl_rx_mem_buffer { 90 dma_addr_t page_dma; 91 struct page *page; 92 struct list_head list; 93}; 94 95#define rxb_addr(r) page_address(r->page) 96 97/* defined below */ 98struct iwl_device_cmd; 99 100struct iwl_cmd_meta { 101 /* only for SYNC commands, iff the reply skb is wanted */ 102 struct iwl_host_cmd *source; 103 /* 104 * only for ASYNC commands 105 * (which is somewhat stupid -- look at iwl-sta.c for instance 106 * which duplicates a bunch of code because the callback isn't 107 * invoked for SYNC commands, if it were and its result passed 108 * through it would be simpler...) 109 */ 110 void (*callback)(struct iwl_priv *priv, 111 struct iwl_device_cmd *cmd, 112 struct iwl_rx_packet *pkt); 113 114 /* The CMD_SIZE_HUGE flag bit indicates that the command 115 * structure is stored at the end of the shared queue memory. */ 116 u32 flags; 117 118 DEFINE_DMA_UNMAP_ADDR(mapping); 119 DEFINE_DMA_UNMAP_LEN(len); 120}; 121 122/* 123 * Generic queue structure 124 * 125 * Contains common data for Rx and Tx queues 126 */ 127struct iwl_queue { 128 int n_bd; /* number of BDs in this queue */ 129 int write_ptr; /* 1-st empty entry (index) host_w*/ 130 int read_ptr; /* last used entry (index) host_r*/ 131 /* use for monitoring and recovering the stuck queue */ 132 int last_read_ptr; /* storing the last read_ptr */ 133 /* number of time read_ptr and last_read_ptr are the same */ 134 u8 repeat_same_read_ptr; 135 dma_addr_t dma_addr; /* physical addr for BD's */ 136 int n_window; /* safe queue window */ 137 u32 id; 138 int low_mark; /* low watermark, resume queue if free 139 * space more than this */ 140 int high_mark; /* high watermark, stop queue if free 141 * space less than this */ 142} __packed; 143 144/* One for each TFD */ 145struct iwl_tx_info { 146 struct sk_buff *skb; 147 struct iwl_rxon_context *ctx; 148}; 149 150/** 151 * struct iwl_tx_queue - Tx Queue for DMA 152 * @q: generic Rx/Tx queue descriptor 153 * @bd: base of circular buffer of TFDs 154 * @cmd: array of command/TX buffer pointers 155 * @meta: array of meta data for each command/tx buffer 156 * @dma_addr_cmd: physical address of cmd/tx buffer array 157 * @txb: array of per-TFD driver data 158 * @need_update: indicates need to update read/write index 159 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled 160 * 161 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame 162 * descriptors) and required locking structures. 163 */ 164#define TFD_TX_CMD_SLOTS 256 165#define TFD_CMD_SLOTS 32 166 167struct iwl_tx_queue { 168 struct iwl_queue q; 169 void *tfds; 170 struct iwl_device_cmd **cmd; 171 struct iwl_cmd_meta *meta; 172 struct iwl_tx_info *txb; 173 u8 need_update; 174 u8 sched_retry; 175 u8 active; 176 u8 swq_id; 177}; 178 179#define IWL_NUM_SCAN_RATES (2) 180 181struct iwl4965_channel_tgd_info { 182 u8 type; 183 s8 max_power; 184}; 185 186struct iwl4965_channel_tgh_info { 187 s64 last_radar_time; 188}; 189 190#define IWL4965_MAX_RATE (33) 191 192struct iwl3945_clip_group { 193 /* maximum power level to prevent clipping for each rate, derived by 194 * us from this band's saturation power in EEPROM */ 195 const s8 clip_powers[IWL_MAX_RATES]; 196}; 197 198/* current Tx power values to use, one for each rate for each channel. 199 * requested power is limited by: 200 * -- regulatory EEPROM limits for this channel 201 * -- hardware capabilities (clip-powers) 202 * -- spectrum management 203 * -- user preference (e.g. iwconfig) 204 * when requested power is set, base power index must also be set. */ 205struct iwl3945_channel_power_info { 206 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 207 s8 power_table_index; /* actual (compenst'd) index into gain table */ 208 s8 base_power_index; /* gain index for power at factory temp. */ 209 s8 requested_power; /* power (dBm) requested for this chnl/rate */ 210}; 211 212/* current scan Tx power values to use, one for each scan rate for each 213 * channel. */ 214struct iwl3945_scan_power_info { 215 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */ 216 s8 power_table_index; /* actual (compenst'd) index into gain table */ 217 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */ 218}; 219 220/* 221 * One for each channel, holds all channel setup data 222 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant 223 * with one another! 224 */ 225struct iwl_channel_info { 226 struct iwl4965_channel_tgd_info tgd; 227 struct iwl4965_channel_tgh_info tgh; 228 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */ 229 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for 230 * HT40 channel */ 231 232 u8 channel; /* channel number */ 233 u8 flags; /* flags copied from EEPROM */ 234 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 235 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ 236 s8 min_power; /* always 0 */ 237 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ 238 239 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */ 240 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */ 241 enum ieee80211_band band; 242 243 /* HT40 channel info */ 244 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 245 u8 ht40_flags; /* flags copied from EEPROM */ 246 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 247 248 /* Radio/DSP gain settings for each "normal" data Tx rate. 249 * These include, in addition to RF and DSP gain, a few fields for 250 * remembering/modifying gain settings (indexes). */ 251 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE]; 252 253 /* Radio/DSP gain settings for each scan rate, for directed scans. */ 254 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES]; 255}; 256 257#define IWL_TX_FIFO_BK 0 /* shared */ 258#define IWL_TX_FIFO_BE 1 259#define IWL_TX_FIFO_VI 2 /* shared */ 260#define IWL_TX_FIFO_VO 3 261#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK 262#define IWL_TX_FIFO_BE_IPAN 4 263#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI 264#define IWL_TX_FIFO_VO_IPAN 5 265#define IWL_TX_FIFO_UNUSED -1 266 267/* Minimum number of queues. MAX_NUM is defined in hw specific files. 268 * Set the minimum to accommodate the 4 standard TX queues, 1 command 269 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */ 270#define IWL_MIN_NUM_QUEUES 10 271 272/* 273 * Command queue depends on iPAN support. 274 */ 275#define IWL_DEFAULT_CMD_QUEUE_NUM 4 276#define IWL_IPAN_CMD_QUEUE_NUM 9 277 278/* 279 * This queue number is required for proper operation 280 * because the ucode will stop/start the scheduler as 281 * required. 282 */ 283#define IWL_IPAN_MCAST_QUEUE 8 284 285/* Power management (not Tx power) structures */ 286 287enum iwl_pwr_src { 288 IWL_PWR_SRC_VMAIN, 289 IWL_PWR_SRC_VAUX, 290}; 291 292#define IEEE80211_DATA_LEN 2304 293#define IEEE80211_4ADDR_LEN 30 294#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) 295#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 296 297struct iwl_frame { 298 union { 299 struct ieee80211_hdr frame; 300 struct iwl_tx_beacon_cmd beacon; 301 u8 raw[IEEE80211_FRAME_LEN]; 302 u8 cmd[360]; 303 } u; 304 struct list_head list; 305}; 306 307#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) 308#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 309#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 310 311enum { 312 CMD_SYNC = 0, 313 CMD_SIZE_NORMAL = 0, 314 CMD_NO_SKB = 0, 315 CMD_SIZE_HUGE = (1 << 0), 316 CMD_ASYNC = (1 << 1), 317 CMD_WANT_SKB = (1 << 2), 318}; 319 320#define DEF_CMD_PAYLOAD_SIZE 320 321 322/** 323 * struct iwl_device_cmd 324 * 325 * For allocation of the command and tx queues, this establishes the overall 326 * size of the largest command we send to uCode, except for a scan command 327 * (which is relatively huge; space is allocated separately). 328 */ 329struct iwl_device_cmd { 330 struct iwl_cmd_header hdr; /* uCode API */ 331 union { 332 u32 flags; 333 u8 val8; 334 u16 val16; 335 u32 val32; 336 struct iwl_tx_cmd tx; 337 struct iwl6000_channel_switch_cmd chswitch; 338 u8 payload[DEF_CMD_PAYLOAD_SIZE]; 339 } __packed cmd; 340} __packed; 341 342#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) 343 344 345struct iwl_host_cmd { 346 const void *data; 347 unsigned long reply_page; 348 void (*callback)(struct iwl_priv *priv, 349 struct iwl_device_cmd *cmd, 350 struct iwl_rx_packet *pkt); 351 u32 flags; 352 u16 len; 353 u8 id; 354}; 355 356#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 357#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 358#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 359 360/** 361 * struct iwl_rx_queue - Rx queue 362 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) 363 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) 364 * @read: Shared index to newest available Rx buffer 365 * @write: Shared index to oldest written Rx packet 366 * @free_count: Number of pre-allocated buffers in rx_free 367 * @rx_free: list of free SKBs for use 368 * @rx_used: List of Rx buffers with no SKB 369 * @need_update: flag to indicate we need to update read/write index 370 * @rb_stts: driver's pointer to receive buffer status 371 * @rb_stts_dma: bus address of receive buffer status 372 * 373 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers 374 */ 375struct iwl_rx_queue { 376 __le32 *bd; 377 dma_addr_t bd_dma; 378 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; 379 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; 380 u32 read; 381 u32 write; 382 u32 free_count; 383 u32 write_actual; 384 struct list_head rx_free; 385 struct list_head rx_used; 386 int need_update; 387 struct iwl_rb_status *rb_stts; 388 dma_addr_t rb_stts_dma; 389 spinlock_t lock; 390}; 391 392#define IWL_SUPPORTED_RATES_IE_LEN 8 393 394#define MAX_TID_COUNT 9 395 396#define IWL_INVALID_RATE 0xFF 397#define IWL_INVALID_VALUE -1 398 399/** 400 * struct iwl_ht_agg -- aggregation status while waiting for block-ack 401 * @txq_id: Tx queue used for Tx attempt 402 * @frame_count: # frames attempted by Tx command 403 * @wait_for_ba: Expect block-ack before next Tx reply 404 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window 405 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window 406 * @bitmap1: High order, one bit for each frame pending ACK in Tx window 407 * @rate_n_flags: Rate at which Tx was attempted 408 * 409 * If REPLY_TX indicates that aggregation was attempted, driver must wait 410 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info 411 * until block ack arrives. 412 */ 413struct iwl_ht_agg { 414 u16 txq_id; 415 u16 frame_count; 416 u16 wait_for_ba; 417 u16 start_idx; 418 u64 bitmap; 419 u32 rate_n_flags; 420#define IWL_AGG_OFF 0 421#define IWL_AGG_ON 1 422#define IWL_EMPTYING_HW_QUEUE_ADDBA 2 423#define IWL_EMPTYING_HW_QUEUE_DELBA 3 424 u8 state; 425}; 426 427 428struct iwl_tid_data { 429 u16 seq_number; /* agn only */ 430 u16 tfds_in_queue; 431 struct iwl_ht_agg agg; 432}; 433 434struct iwl_hw_key { 435 u32 cipher; 436 int keylen; 437 u8 keyidx; 438 u8 key[32]; 439}; 440 441union iwl_ht_rate_supp { 442 u16 rates; 443 struct { 444 u8 siso_rate; 445 u8 mimo_rate; 446 }; 447}; 448 449#define CFG_HT_RX_AMPDU_FACTOR_8K (0x0) 450#define CFG_HT_RX_AMPDU_FACTOR_16K (0x1) 451#define CFG_HT_RX_AMPDU_FACTOR_32K (0x2) 452#define CFG_HT_RX_AMPDU_FACTOR_64K (0x3) 453#define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K 454#define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K 455#define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K 456 457/* 458 * Maximal MPDU density for TX aggregation 459 * 4 - 2us density 460 * 5 - 4us density 461 * 6 - 8us density 462 * 7 - 16us density 463 */ 464#define CFG_HT_MPDU_DENSITY_2USEC (0x4) 465#define CFG_HT_MPDU_DENSITY_4USEC (0x5) 466#define CFG_HT_MPDU_DENSITY_8USEC (0x6) 467#define CFG_HT_MPDU_DENSITY_16USEC (0x7) 468#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC 469#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC 470#define CFG_HT_MPDU_DENSITY_MIN (0x1) 471 472struct iwl_ht_config { 473 bool single_chain_sufficient; 474 enum ieee80211_smps_mode smps; /* current smps mode */ 475}; 476 477/* QoS structures */ 478struct iwl_qos_info { 479 int qos_active; 480 struct iwl_qosparam_cmd def_qos_parm; 481}; 482 483/* 484 * Structure should be accessed with sta_lock held. When station addition 485 * is in progress (IWL_STA_UCODE_INPROGRESS) it is possible to access only 486 * the commands (iwl_addsta_cmd and iwl_link_quality_cmd) without sta_lock 487 * held. 488 */ 489struct iwl_station_entry { 490 struct iwl_addsta_cmd sta; 491 struct iwl_tid_data tid[MAX_TID_COUNT]; 492 u8 used, ctxid; 493 struct iwl_hw_key keyinfo; 494 struct iwl_link_quality_cmd *lq; 495}; 496 497struct iwl_station_priv_common { 498 struct iwl_rxon_context *ctx; 499 u8 sta_id; 500}; 501 502/* 503 * iwl_station_priv: Driver's private station information 504 * 505 * When mac80211 creates a station it reserves some space (hw->sta_data_size) 506 * in the structure for use by driver. This structure is places in that 507 * space. 508 * 509 * The common struct MUST be first because it is shared between 510 * 3945 and agn! 511 */ 512struct iwl_station_priv { 513 struct iwl_station_priv_common common; 514 struct iwl_lq_sta lq_sta; 515 atomic_t pending_frames; 516 bool client; 517 bool asleep; 518}; 519 520/** 521 * struct iwl_vif_priv - driver's private per-interface information 522 * 523 * When mac80211 allocates a virtual interface, it can allocate 524 * space for us to put data into. 525 */ 526struct iwl_vif_priv { 527 struct iwl_rxon_context *ctx; 528 u8 ibss_bssid_sta_id; 529}; 530 531/* one for each uCode image (inst/data, boot/init/runtime) */ 532struct fw_desc { 533 void *v_addr; /* access by driver */ 534 dma_addr_t p_addr; /* access by card's busmaster DMA */ 535 u32 len; /* bytes */ 536}; 537 538/* v1/v2 uCode file layout */ 539struct iwl_ucode_header { 540 __le32 ver; /* major/minor/API/serial */ 541 union { 542 struct { 543 __le32 inst_size; /* bytes of runtime code */ 544 __le32 data_size; /* bytes of runtime data */ 545 __le32 init_size; /* bytes of init code */ 546 __le32 init_data_size; /* bytes of init data */ 547 __le32 boot_size; /* bytes of bootstrap code */ 548 u8 data[0]; /* in same order as sizes */ 549 } v1; 550 struct { 551 __le32 build; /* build number */ 552 __le32 inst_size; /* bytes of runtime code */ 553 __le32 data_size; /* bytes of runtime data */ 554 __le32 init_size; /* bytes of init code */ 555 __le32 init_data_size; /* bytes of init data */ 556 __le32 boot_size; /* bytes of bootstrap code */ 557 u8 data[0]; /* in same order as sizes */ 558 } v2; 559 } u; 560}; 561 562/* 563 * new TLV uCode file layout 564 * 565 * The new TLV file format contains TLVs, that each specify 566 * some piece of data. To facilitate "groups", for example 567 * different instruction image with different capabilities, 568 * bundled with the same init image, an alternative mechanism 569 * is provided: 570 * When the alternative field is 0, that means that the item 571 * is always valid. When it is non-zero, then it is only 572 * valid in conjunction with items of the same alternative, 573 * in which case the driver (user) selects one alternative 574 * to use. 575 */ 576 577enum iwl_ucode_tlv_type { 578 IWL_UCODE_TLV_INVALID = 0, /* unused */ 579 IWL_UCODE_TLV_INST = 1, 580 IWL_UCODE_TLV_DATA = 2, 581 IWL_UCODE_TLV_INIT = 3, 582 IWL_UCODE_TLV_INIT_DATA = 4, 583 IWL_UCODE_TLV_BOOT = 5, 584 IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */ 585 IWL_UCODE_TLV_PAN = 7, 586 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8, 587 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9, 588 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10, 589 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11, 590 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12, 591 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13, 592 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14, 593 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15, 594}; 595 596struct iwl_ucode_tlv { 597 __le16 type; /* see above */ 598 __le16 alternative; /* see comment */ 599 __le32 length; /* not including type/length fields */ 600 u8 data[0]; 601} __packed; 602 603#define IWL_TLV_UCODE_MAGIC 0x0a4c5749 604 605struct iwl_tlv_ucode_header { 606 /* 607 * The TLV style ucode header is distinguished from 608 * the v1/v2 style header by first four bytes being 609 * zero, as such is an invalid combination of 610 * major/minor/API/serial versions. 611 */ 612 __le32 zero; 613 __le32 magic; 614 u8 human_readable[64]; 615 __le32 ver; /* major/minor/API/serial */ 616 __le32 build; 617 __le64 alternatives; /* bitmask of valid alternatives */ 618 /* 619 * The data contained herein has a TLV layout, 620 * see above for the TLV header and types. 621 * Note that each TLV is padded to a length 622 * that is a multiple of 4 for alignment. 623 */ 624 u8 data[0]; 625}; 626 627struct iwl4965_ibss_seq { 628 u8 mac[ETH_ALEN]; 629 u16 seq_num; 630 u16 frag_num; 631 unsigned long packet_time; 632 struct list_head list; 633}; 634 635struct iwl_sensitivity_ranges { 636 u16 min_nrg_cck; 637 u16 max_nrg_cck; 638 639 u16 nrg_th_cck; 640 u16 nrg_th_ofdm; 641 642 u16 auto_corr_min_ofdm; 643 u16 auto_corr_min_ofdm_mrc; 644 u16 auto_corr_min_ofdm_x1; 645 u16 auto_corr_min_ofdm_mrc_x1; 646 647 u16 auto_corr_max_ofdm; 648 u16 auto_corr_max_ofdm_mrc; 649 u16 auto_corr_max_ofdm_x1; 650 u16 auto_corr_max_ofdm_mrc_x1; 651 652 u16 auto_corr_max_cck; 653 u16 auto_corr_max_cck_mrc; 654 u16 auto_corr_min_cck; 655 u16 auto_corr_min_cck_mrc; 656 657 u16 barker_corr_th_min; 658 u16 barker_corr_th_min_mrc; 659 u16 nrg_th_cca; 660}; 661 662 663#define KELVIN_TO_CELSIUS(x) ((x)-273) 664#define CELSIUS_TO_KELVIN(x) ((x)+273) 665 666 667/** 668 * struct iwl_hw_params 669 * @max_txq_num: Max # Tx queues supported 670 * @dma_chnl_num: Number of Tx DMA/FIFO channels 671 * @scd_bc_tbls_size: size of scheduler byte count tables 672 * @tfd_size: TFD size 673 * @tx/rx_chains_num: Number of TX/RX chains 674 * @valid_tx/rx_ant: usable antennas 675 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) 676 * @max_rxq_log: Log-base-2 of max_rxq_size 677 * @rx_page_order: Rx buffer page order 678 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 679 * @max_stations: 680 * @ht40_channel: is 40MHz width possible in band 2.4 681 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ) 682 * @sw_crypto: 0 for hw, 1 for sw 683 * @max_xxx_size: for ucode uses 684 * @ct_kill_threshold: temperature threshold 685 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time 686 * @calib_init_cfg: setup initial calibrations for the hw 687 * @struct iwl_sensitivity_ranges: range of sensitivity values 688 */ 689struct iwl_hw_params { 690 u8 max_txq_num; 691 u8 dma_chnl_num; 692 u16 scd_bc_tbls_size; 693 u32 tfd_size; 694 u8 tx_chains_num; 695 u8 rx_chains_num; 696 u8 valid_tx_ant; 697 u8 valid_rx_ant; 698 u16 max_rxq_size; 699 u16 max_rxq_log; 700 u32 rx_page_order; 701 u32 rx_wrt_ptr_reg; 702 u8 max_stations; 703 u8 ht40_channel; 704 u8 max_beacon_itrvl; /* in 1024 ms */ 705 u32 max_inst_size; 706 u32 max_data_size; 707 u32 max_bsm_size; 708 u32 ct_kill_threshold; /* value in hw-dependent units */ 709 u32 ct_kill_exit_threshold; /* value in hw-dependent units */ 710 /* for 1000, 6000 series and up */ 711 u16 beacon_time_tsf_bits; 712 u32 calib_init_cfg; 713 const struct iwl_sensitivity_ranges *sens; 714}; 715 716 717/****************************************************************************** 718 * 719 * Functions implemented in core module which are forward declared here 720 * for use by iwl-[4-5].c 721 * 722 * NOTE: The implementation of these functions are not hardware specific 723 * which is why they are in the core module files. 724 * 725 * Naming convention -- 726 * iwl_ <-- Is part of iwlwifi 727 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX) 728 * iwl4965_bg_ <-- Called from work queue context 729 * iwl4965_mac_ <-- mac80211 callback 730 * 731 ****************************************************************************/ 732extern void iwl_update_chain_flags(struct iwl_priv *priv); 733extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src); 734extern const u8 iwl_bcast_addr[ETH_ALEN]; 735extern int iwl_rxq_stop(struct iwl_priv *priv); 736extern void iwl_txq_ctx_stop(struct iwl_priv *priv); 737extern int iwl_queue_space(const struct iwl_queue *q); 738static inline int iwl_queue_used(const struct iwl_queue *q, int i) 739{ 740 return q->write_ptr >= q->read_ptr ? 741 (i >= q->read_ptr && i < q->write_ptr) : 742 !(i < q->read_ptr && i >= q->write_ptr); 743} 744 745 746static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge) 747{ 748 /* 749 * This is for init calibration result and scan command which 750 * required buffer > TFD_MAX_PAYLOAD_SIZE, 751 * the big buffer at end of command array 752 */ 753 if (is_huge) 754 return q->n_window; /* must be power of 2 */ 755 756 /* Otherwise, use normal size buffers */ 757 return index & (q->n_window - 1); 758} 759 760 761struct iwl_dma_ptr { 762 dma_addr_t dma; 763 void *addr; 764 size_t size; 765}; 766 767#define IWL_OPERATION_MODE_AUTO 0 768#define IWL_OPERATION_MODE_HT_ONLY 1 769#define IWL_OPERATION_MODE_MIXED 2 770#define IWL_OPERATION_MODE_20MHZ 3 771 772#define IWL_TX_CRC_SIZE 4 773#define IWL_TX_DELIMITER_SIZE 4 774 775#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 776 777/* Sensitivity and chain noise calibration */ 778#define INITIALIZATION_VALUE 0xFFFF 779#define IWL4965_CAL_NUM_BEACONS 20 780#define IWL_CAL_NUM_BEACONS 16 781#define MAXIMUM_ALLOWED_PATHLOSS 15 782 783#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 784 785#define MAX_FA_OFDM 50 786#define MIN_FA_OFDM 5 787#define MAX_FA_CCK 50 788#define MIN_FA_CCK 5 789 790#define AUTO_CORR_STEP_OFDM 1 791 792#define AUTO_CORR_STEP_CCK 3 793#define AUTO_CORR_MAX_TH_CCK 160 794 795#define NRG_DIFF 2 796#define NRG_STEP_CCK 2 797#define NRG_MARGIN 8 798#define MAX_NUMBER_CCK_NO_FA 100 799 800#define AUTO_CORR_CCK_MIN_VAL_DEF (125) 801 802#define CHAIN_A 0 803#define CHAIN_B 1 804#define CHAIN_C 2 805#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4 806#define ALL_BAND_FILTER 0xFF00 807#define IN_BAND_FILTER 0xFF 808#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF 809 810#define NRG_NUM_PREV_STAT_L 20 811#define NUM_RX_CHAINS 3 812 813enum iwl4965_false_alarm_state { 814 IWL_FA_TOO_MANY = 0, 815 IWL_FA_TOO_FEW = 1, 816 IWL_FA_GOOD_RANGE = 2, 817}; 818 819enum iwl4965_chain_noise_state { 820 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ 821 IWL_CHAIN_NOISE_ACCUMULATE, 822 IWL_CHAIN_NOISE_CALIBRATED, 823 IWL_CHAIN_NOISE_DONE, 824}; 825 826enum iwl4965_calib_enabled_state { 827 IWL_CALIB_DISABLED = 0, /* must be 0 */ 828 IWL_CALIB_ENABLED = 1, 829}; 830 831 832/* 833 * enum iwl_calib 834 * defines the order in which results of initial calibrations 835 * should be sent to the runtime uCode 836 */ 837enum iwl_calib { 838 IWL_CALIB_XTAL, 839 IWL_CALIB_DC, 840 IWL_CALIB_LO, 841 IWL_CALIB_TX_IQ, 842 IWL_CALIB_TX_IQ_PERD, 843 IWL_CALIB_BASE_BAND, 844 IWL_CALIB_MAX 845}; 846 847/* Opaque calibration results */ 848struct iwl_calib_result { 849 void *buf; 850 size_t buf_len; 851}; 852 853enum ucode_type { 854 UCODE_NONE = 0, 855 UCODE_INIT, 856 UCODE_RT 857}; 858 859/* Sensitivity calib data */ 860struct iwl_sensitivity_data { 861 u32 auto_corr_ofdm; 862 u32 auto_corr_ofdm_mrc; 863 u32 auto_corr_ofdm_x1; 864 u32 auto_corr_ofdm_mrc_x1; 865 u32 auto_corr_cck; 866 u32 auto_corr_cck_mrc; 867 868 u32 last_bad_plcp_cnt_ofdm; 869 u32 last_fa_cnt_ofdm; 870 u32 last_bad_plcp_cnt_cck; 871 u32 last_fa_cnt_cck; 872 873 u32 nrg_curr_state; 874 u32 nrg_prev_state; 875 u32 nrg_value[10]; 876 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; 877 u32 nrg_silence_ref; 878 u32 nrg_energy_idx; 879 u32 nrg_silence_idx; 880 u32 nrg_th_cck; 881 s32 nrg_auto_corr_silence_diff; 882 u32 num_in_cck_no_fa; 883 u32 nrg_th_ofdm; 884 885 u16 barker_corr_th_min; 886 u16 barker_corr_th_min_mrc; 887 u16 nrg_th_cca; 888}; 889 890/* Chain noise (differential Rx gain) calib data */ 891struct iwl_chain_noise_data { 892 u32 active_chains; 893 u32 chain_noise_a; 894 u32 chain_noise_b; 895 u32 chain_noise_c; 896 u32 chain_signal_a; 897 u32 chain_signal_b; 898 u32 chain_signal_c; 899 u16 beacon_count; 900 u8 disconn_array[NUM_RX_CHAINS]; 901 u8 delta_gain_code[NUM_RX_CHAINS]; 902 u8 radio_write; 903 u8 state; 904}; 905 906#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 907#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 908 909#define IWL_TRAFFIC_ENTRIES (256) 910#define IWL_TRAFFIC_ENTRY_SIZE (64) 911 912enum { 913 MEASUREMENT_READY = (1 << 0), 914 MEASUREMENT_ACTIVE = (1 << 1), 915}; 916 917enum iwl_nvm_type { 918 NVM_DEVICE_TYPE_EEPROM = 0, 919 NVM_DEVICE_TYPE_OTP, 920}; 921 922/* 923 * Two types of OTP memory access modes 924 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode, 925 * based on physical memory addressing 926 * IWL_OTP_ACCESS_RELATIVE - relative address mode, 927 * based on logical memory addressing 928 */ 929enum iwl_access_mode { 930 IWL_OTP_ACCESS_ABSOLUTE, 931 IWL_OTP_ACCESS_RELATIVE, 932}; 933 934/** 935 * enum iwl_pa_type - Power Amplifier type 936 * @IWL_PA_SYSTEM: based on uCode configuration 937 * @IWL_PA_INTERNAL: use Internal only 938 */ 939enum iwl_pa_type { 940 IWL_PA_SYSTEM = 0, 941 IWL_PA_INTERNAL = 1, 942}; 943 944/* interrupt statistics */ 945struct isr_statistics { 946 u32 hw; 947 u32 sw; 948 u32 sw_err; 949 u32 sch; 950 u32 alive; 951 u32 rfkill; 952 u32 ctkill; 953 u32 wakeup; 954 u32 rx; 955 u32 rx_handlers[REPLY_MAX]; 956 u32 tx; 957 u32 unhandled; 958}; 959 960#ifdef CONFIG_IWLWIFI_DEBUGFS 961/* management statistics */ 962enum iwl_mgmt_stats { 963 MANAGEMENT_ASSOC_REQ = 0, 964 MANAGEMENT_ASSOC_RESP, 965 MANAGEMENT_REASSOC_REQ, 966 MANAGEMENT_REASSOC_RESP, 967 MANAGEMENT_PROBE_REQ, 968 MANAGEMENT_PROBE_RESP, 969 MANAGEMENT_BEACON, 970 MANAGEMENT_ATIM, 971 MANAGEMENT_DISASSOC, 972 MANAGEMENT_AUTH, 973 MANAGEMENT_DEAUTH, 974 MANAGEMENT_ACTION, 975 MANAGEMENT_MAX, 976}; 977/* control statistics */ 978enum iwl_ctrl_stats { 979 CONTROL_BACK_REQ = 0, 980 CONTROL_BACK, 981 CONTROL_PSPOLL, 982 CONTROL_RTS, 983 CONTROL_CTS, 984 CONTROL_ACK, 985 CONTROL_CFEND, 986 CONTROL_CFENDACK, 987 CONTROL_MAX, 988}; 989 990struct traffic_stats { 991 u32 mgmt[MANAGEMENT_MAX]; 992 u32 ctrl[CONTROL_MAX]; 993 u32 data_cnt; 994 u64 data_bytes; 995}; 996#else 997struct traffic_stats { 998 u64 data_bytes; 999}; 1000#endif 1001 1002/* 1003 * iwl_switch_rxon: "channel switch" structure 1004 * 1005 * @ switch_in_progress: channel switch in progress 1006 * @ channel: new channel 1007 */ 1008struct iwl_switch_rxon { 1009 bool switch_in_progress; 1010 __le16 channel; 1011}; 1012 1013/* 1014 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds 1015 * to perform continuous uCode event logging operation if enabled 1016 */ 1017#define UCODE_TRACE_PERIOD (100) 1018 1019/* 1020 * iwl_event_log: current uCode event log position 1021 * 1022 * @ucode_trace: enable/disable ucode continuous trace timer 1023 * @num_wraps: how many times the event buffer wraps 1024 * @next_entry: the entry just before the next one that uCode would fill 1025 * @non_wraps_count: counter for no wrap detected when dump ucode events 1026 * @wraps_once_count: counter for wrap once detected when dump ucode events 1027 * @wraps_more_count: counter for wrap more than once detected 1028 * when dump ucode events 1029 */ 1030struct iwl_event_log { 1031 bool ucode_trace; 1032 u32 num_wraps; 1033 u32 next_entry; 1034 int non_wraps_count; 1035 int wraps_once_count; 1036 int wraps_more_count; 1037}; 1038 1039/* 1040 * host interrupt timeout value 1041 * used with setting interrupt coalescing timer 1042 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit 1043 * 1044 * default interrupt coalescing timer is 64 x 32 = 2048 usecs 1045 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs 1046 */ 1047#define IWL_HOST_INT_TIMEOUT_MAX (0xFF) 1048#define IWL_HOST_INT_TIMEOUT_DEF (0x40) 1049#define IWL_HOST_INT_TIMEOUT_MIN (0x0) 1050#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF) 1051#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10) 1052#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0) 1053 1054/* 1055 * This is the threshold value of plcp error rate per 100mSecs. It is 1056 * used to set and check for the validity of plcp_delta. 1057 */ 1058#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1) 1059#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50) 1060#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100) 1061#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200) 1062#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255) 1063#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0) 1064 1065#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3) 1066#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) 1067 1068/* timer constants use to monitor and recover stuck tx queues in mSecs */ 1069#define IWL_DEF_MONITORING_PERIOD (1000) 1070#define IWL_LONG_MONITORING_PERIOD (5000) 1071#define IWL_ONE_HUNDRED_MSECS (100) 1072#define IWL_MAX_MONITORING_PERIOD (60000) 1073 1074/* BT Antenna Coupling Threshold (dB) */ 1075#define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35) 1076 1077enum iwl_reset { 1078 IWL_RF_RESET = 0, 1079 IWL_FW_RESET, 1080 IWL_MAX_FORCE_RESET, 1081}; 1082 1083struct iwl_force_reset { 1084 int reset_request_count; 1085 int reset_success_count; 1086 int reset_reject_count; 1087 unsigned long reset_duration; 1088 unsigned long last_force_reset_jiffies; 1089}; 1090 1091/* extend beacon time format bit shifting */ 1092/* 1093 * for _3945 devices 1094 * bits 31:24 - extended 1095 * bits 23:0 - interval 1096 */ 1097#define IWL3945_EXT_BEACON_TIME_POS 24 1098/* 1099 * for _agn devices 1100 * bits 31:22 - extended 1101 * bits 21:0 - interval 1102 */ 1103#define IWLAGN_EXT_BEACON_TIME_POS 22 1104 1105enum iwl_rxon_context_id { 1106 IWL_RXON_CTX_BSS, 1107 IWL_RXON_CTX_PAN, 1108 1109 NUM_IWL_RXON_CTX 1110}; 1111 1112struct iwl_rxon_context { 1113 struct ieee80211_vif *vif; 1114 enum iwl_rxon_context_id ctxid; 1115 /* 1116 * We declare this const so it can only be 1117 * changed via explicit cast within the 1118 * routines that actually update the physical 1119 * hardware. 1120 */ 1121 const struct iwl_rxon_cmd active; 1122 struct iwl_rxon_cmd staging; 1123 1124 struct iwl_rxon_time_cmd timing; 1125 1126 struct iwl_qos_info qos_data; 1127 1128 u8 bcast_sta_id, ap_sta_id; 1129 1130 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd; 1131 u8 qos_cmd; 1132 u8 wep_key_cmd; 1133 1134 struct iwl_wep_key wep_keys[WEP_KEYS_MAX]; 1135 u8 key_mapping_keys; 1136 1137 __le32 station_flags; 1138 1139 struct { 1140 bool non_gf_sta_present; 1141 u8 protection; 1142 bool enabled, is_40mhz; 1143 u8 extension_chan_offset; 1144 } ht; 1145}; 1146 1147struct iwl_priv { 1148 1149 /* ieee device used by generic ieee processing code */ 1150 struct ieee80211_hw *hw; 1151 struct ieee80211_channel *ieee_channels; 1152 struct ieee80211_rate *ieee_rates; 1153 struct iwl_cfg *cfg; 1154 1155 /* temporary frame storage list */ 1156 struct list_head free_frames; 1157 int frames_count; 1158 1159 enum ieee80211_band band; 1160 int alloc_rxb_page; 1161 1162 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 1163 struct iwl_rx_mem_buffer *rxb); 1164 1165 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1166 1167 /* spectrum measurement report caching */ 1168 struct iwl_spectrum_notification measure_report; 1169 u8 measurement_status; 1170 1171 /* ucode beacon time */ 1172 u32 ucode_beacon_time; 1173 int missed_beacon_threshold; 1174 1175 /* track IBSS manager (last beacon) status */ 1176 u32 ibss_manager; 1177 1178 /* storing the jiffies when the plcp error rate is received */ 1179 unsigned long plcp_jiffies; 1180 1181 /* force reset */ 1182 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET]; 1183 1184 /* we allocate array of iwl_channel_info for NIC's valid channels. 1185 * Access via channel # using indirect index array */ 1186 struct iwl_channel_info *channel_info; /* channel info array */ 1187 u8 channel_count; /* # of channels */ 1188 1189 /* thermal calibration */ 1190 s32 temperature; /* degrees Kelvin */ 1191 s32 last_temperature; 1192 1193 /* init calibration results */ 1194 struct iwl_calib_result calib_results[IWL_CALIB_MAX]; 1195 1196 /* Scan related variables */ 1197 unsigned long scan_start; 1198 unsigned long scan_start_tsf; 1199 void *scan_cmd; 1200 enum ieee80211_band scan_band; 1201 struct cfg80211_scan_request *scan_request; 1202 struct ieee80211_vif *scan_vif; 1203 bool is_internal_short_scan; 1204 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 1205 u8 mgmt_tx_ant; 1206 1207 /* spinlock */ 1208 spinlock_t lock; /* protect general shared data */ 1209 spinlock_t hcmd_lock; /* protect hcmd */ 1210 spinlock_t reg_lock; /* protect hw register access */ 1211 struct mutex mutex; 1212 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */ 1213 1214 /* basic pci-network driver stuff */ 1215 struct pci_dev *pci_dev; 1216 1217 /* pci hardware address support */ 1218 void __iomem *hw_base; 1219 u32 hw_rev; 1220 u32 hw_wa_rev; 1221 u8 rev_id; 1222 1223 /* microcode/device supports multiple contexts */ 1224 u8 valid_contexts; 1225 1226 /* command queue number */ 1227 u8 cmd_queue; 1228 1229 /* max number of station keys */ 1230 u8 sta_key_max_num; 1231 1232 /* EEPROM MAC addresses */ 1233 struct mac_address addresses[2]; 1234 1235 /* uCode images, save to reload in case of failure */ 1236 int fw_index; /* firmware we're trying to load */ 1237 u32 ucode_ver; /* version of ucode, copy of 1238 iwl_ucode.ver */ 1239 struct fw_desc ucode_code; /* runtime inst */ 1240 struct fw_desc ucode_data; /* runtime data original */ 1241 struct fw_desc ucode_data_backup; /* runtime data save/restore */ 1242 struct fw_desc ucode_init; /* initialization inst */ 1243 struct fw_desc ucode_init_data; /* initialization data */ 1244 struct fw_desc ucode_boot; /* bootstrap inst */ 1245 enum ucode_type ucode_type; 1246 u8 ucode_write_complete; /* the image write is complete */ 1247 char firmware_name[25]; 1248 1249 struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX]; 1250 1251 struct iwl_switch_rxon switch_rxon; 1252 1253 /* 1st responses from initialize and runtime uCode images. 1254 * _agn's initialize alive response contains some calibration data. */ 1255 struct iwl_init_alive_resp card_alive_init; 1256 struct iwl_alive_resp card_alive; 1257 1258 unsigned long last_blink_time; 1259 u8 last_blink_rate; 1260 u8 allow_blinking; 1261 u64 led_tpt; 1262 1263 u16 active_rate; 1264 1265 u8 start_calib; 1266 struct iwl_sensitivity_data sensitivity_data; 1267 struct iwl_chain_noise_data chain_noise_data; 1268 bool enhance_sensitivity_table; 1269 __le16 sensitivity_tbl[HD_TABLE_SIZE]; 1270 __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES]; 1271 1272 struct iwl_ht_config current_ht_config; 1273 1274 /* Rate scaling data */ 1275 u8 retry_rate; 1276 1277 wait_queue_head_t wait_command_queue; 1278 1279 int activity_timer_active; 1280 1281 /* Rx and Tx DMA processing queues */ 1282 struct iwl_rx_queue rxq; 1283 struct iwl_tx_queue *txq; 1284 unsigned long txq_ctx_active_msk; 1285 struct iwl_dma_ptr kw; /* keep warm address */ 1286 struct iwl_dma_ptr scd_bc_tbls; 1287 1288 u32 scd_base_addr; /* scheduler sram base address */ 1289 1290 unsigned long status; 1291 1292 /* counts mgmt, ctl, and data packets */ 1293 struct traffic_stats tx_stats; 1294 struct traffic_stats rx_stats; 1295 1296 /* counts interrupts */ 1297 struct isr_statistics isr_stats; 1298 1299 struct iwl_power_mgr power_data; 1300 struct iwl_tt_mgmt thermal_throttle; 1301 1302 /* context information */ 1303 u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ 1304 1305 /* station table variables */ 1306 1307 /* Note: if lock and sta_lock are needed, lock must be acquired first */ 1308 spinlock_t sta_lock; 1309 int num_stations; 1310 struct iwl_station_entry stations[IWL_STATION_COUNT]; 1311 unsigned long ucode_key_table; 1312 1313 /* queue refcounts */ 1314#define IWL_MAX_HW_QUEUES 32 1315 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; 1316 /* for each AC */ 1317 atomic_t queue_stop_count[4]; 1318 1319 /* Indication if ieee80211_ops->open has been called */ 1320 u8 is_open; 1321 1322 u8 mac80211_registered; 1323 1324 /* eeprom -- this is in the card's little endian byte order */ 1325 u8 *eeprom; 1326 int nvm_device_type; 1327 struct iwl_eeprom_calib_info *calib_info; 1328 1329 enum nl80211_iftype iw_mode; 1330 1331 struct sk_buff *ibss_beacon; 1332 1333 /* Last Rx'd beacon timestamp */ 1334 u64 timestamp; 1335 1336 union { 1337#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE) 1338 struct { 1339 void *shared_virt; 1340 dma_addr_t shared_phys; 1341 1342 struct delayed_work thermal_periodic; 1343 struct delayed_work rfkill_poll; 1344 1345 struct iwl3945_notif_statistics statistics; 1346#ifdef CONFIG_IWLWIFI_DEBUGFS 1347 struct iwl3945_notif_statistics accum_statistics; 1348 struct iwl3945_notif_statistics delta_statistics; 1349 struct iwl3945_notif_statistics max_delta; 1350#endif 1351 1352 u32 sta_supp_rates; 1353 int last_rx_rssi; /* From Rx packet statistics */ 1354 1355 /* Rx'd packet timing information */ 1356 u32 last_beacon_time; 1357 u64 last_tsf; 1358 1359 /* 1360 * each calibration channel group in the 1361 * EEPROM has a derived clip setting for 1362 * each rate. 1363 */ 1364 const struct iwl3945_clip_group clip_groups[5]; 1365 1366 } _3945; 1367#endif 1368#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE) 1369 struct { 1370 /* INT ICT Table */ 1371 __le32 *ict_tbl; 1372 void *ict_tbl_vir; 1373 dma_addr_t ict_tbl_dma; 1374 dma_addr_t aligned_ict_tbl_dma; 1375 int ict_index; 1376 u32 inta; 1377 bool use_ict; 1378 /* 1379 * reporting the number of tids has AGG on. 0 means 1380 * no AGGREGATION 1381 */ 1382 u8 agg_tids_count; 1383 1384 struct iwl_rx_phy_res last_phy_res; 1385 bool last_phy_res_valid; 1386 1387 struct completion firmware_loading_complete; 1388 1389 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr; 1390 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr; 1391 1392 /* 1393 * chain noise reset and gain commands are the 1394 * two extra calibration commands follows the standard 1395 * phy calibration commands 1396 */ 1397 u8 phy_calib_chain_noise_reset_cmd; 1398 u8 phy_calib_chain_noise_gain_cmd; 1399 1400 struct iwl_notif_statistics statistics; 1401 struct iwl_bt_notif_statistics statistics_bt; 1402#ifdef CONFIG_IWLWIFI_DEBUGFS 1403 struct iwl_notif_statistics accum_statistics; 1404 struct iwl_notif_statistics delta_statistics; 1405 struct iwl_notif_statistics max_delta; 1406 struct iwl_bt_notif_statistics accum_statistics_bt; 1407 struct iwl_bt_notif_statistics delta_statistics_bt; 1408 struct iwl_bt_notif_statistics max_delta_bt; 1409#endif 1410 } _agn; 1411#endif 1412 }; 1413 1414 /* bt coex */ 1415 u8 bt_status; 1416 u8 bt_traffic_load, notif_bt_traffic_load; 1417 bool bt_ch_announce; 1418 bool bt_sco_active; 1419 bool bt_full_concurrent; 1420 bool bt_ant_couple_ok; 1421 __le32 kill_ack_mask; 1422 __le32 kill_cts_mask; 1423 __le16 bt_valid; 1424 u16 bt_on_thresh; 1425 u16 bt_duration; 1426 u16 dynamic_frag_thresh; 1427 u16 dynamic_agg_thresh; 1428 u8 bt_ci_compliance; 1429 struct work_struct bt_traffic_change_work; 1430 1431 struct iwl_hw_params hw_params; 1432 1433 u32 inta_mask; 1434 1435 struct workqueue_struct *workqueue; 1436 1437 struct work_struct restart; 1438 struct work_struct scan_completed; 1439 struct work_struct rx_replenish; 1440 struct work_struct abort_scan; 1441 struct work_struct beacon_update; 1442 struct iwl_rxon_context *beacon_ctx; 1443 1444 struct work_struct tt_work; 1445 struct work_struct ct_enter; 1446 struct work_struct ct_exit; 1447 struct work_struct start_internal_scan; 1448 struct work_struct tx_flush; 1449 struct work_struct bt_full_concurrency; 1450 struct work_struct bt_runtime_config; 1451 1452 struct tasklet_struct irq_tasklet; 1453 1454 struct delayed_work init_alive_start; 1455 struct delayed_work alive_start; 1456 struct delayed_work scan_check; 1457 1458 /* TX Power */ 1459 s8 tx_power_user_lmt; 1460 s8 tx_power_device_lmt; 1461 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */ 1462 1463 1464#ifdef CONFIG_IWLWIFI_DEBUG 1465 /* debugging info */ 1466 u32 debug_level; /* per device debugging will override global 1467 iwl_debug_level if set */ 1468#endif /* CONFIG_IWLWIFI_DEBUG */ 1469#ifdef CONFIG_IWLWIFI_DEBUGFS 1470 /* debugfs */ 1471 u16 tx_traffic_idx; 1472 u16 rx_traffic_idx; 1473 u8 *tx_traffic; 1474 u8 *rx_traffic; 1475 struct dentry *debugfs_dir; 1476 u32 dbgfs_sram_offset, dbgfs_sram_len; 1477 bool disable_ht40; 1478#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1479 1480 struct work_struct txpower_work; 1481 u32 disable_sens_cal; 1482 u32 disable_chain_noise_cal; 1483 u32 disable_tx_power_cal; 1484 struct work_struct run_time_calib_work; 1485 struct timer_list statistics_periodic; 1486 struct timer_list ucode_trace; 1487 struct timer_list monitor_recover; 1488 bool hw_ready; 1489 1490 struct iwl_event_log event_log; 1491}; /*iwl_priv */ 1492 1493static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1494{ 1495 set_bit(txq_id, &priv->txq_ctx_active_msk); 1496} 1497 1498static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) 1499{ 1500 clear_bit(txq_id, &priv->txq_ctx_active_msk); 1501} 1502 1503#ifdef CONFIG_IWLWIFI_DEBUG 1504const char *iwl_get_tx_fail_reason(u32 status); 1505/* 1506 * iwl_get_debug_level: Return active debug level for device 1507 * 1508 * Using sysfs it is possible to set per device debug level. This debug 1509 * level will be used if set, otherwise the global debug level which can be 1510 * set via module parameter is used. 1511 */ 1512static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1513{ 1514 if (priv->debug_level) 1515 return priv->debug_level; 1516 else 1517 return iwl_debug_level; 1518} 1519#else 1520static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; } 1521 1522static inline u32 iwl_get_debug_level(struct iwl_priv *priv) 1523{ 1524 return iwl_debug_level; 1525} 1526#endif 1527 1528 1529static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv, 1530 int txq_id, int idx) 1531{ 1532 if (priv->txq[txq_id].txb[idx].skb) 1533 return (struct ieee80211_hdr *)priv->txq[txq_id]. 1534 txb[idx].skb->data; 1535 return NULL; 1536} 1537 1538static inline struct iwl_rxon_context * 1539iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif) 1540{ 1541 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 1542 1543 return vif_priv->ctx; 1544} 1545 1546#define for_each_context(priv, ctx) \ 1547 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \ 1548 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \ 1549 if (priv->valid_contexts & BIT(ctx->ctxid)) 1550 1551static inline int iwl_is_associated(struct iwl_priv *priv, 1552 enum iwl_rxon_context_id ctxid) 1553{ 1554 return (priv->contexts[ctxid].active.filter_flags & 1555 RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1556} 1557 1558static inline int iwl_is_any_associated(struct iwl_priv *priv) 1559{ 1560 return iwl_is_associated(priv, IWL_RXON_CTX_BSS); 1561} 1562 1563static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx) 1564{ 1565 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; 1566} 1567 1568static inline int is_channel_valid(const struct iwl_channel_info *ch_info) 1569{ 1570 if (ch_info == NULL) 1571 return 0; 1572 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; 1573} 1574 1575static inline int is_channel_radar(const struct iwl_channel_info *ch_info) 1576{ 1577 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; 1578} 1579 1580static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info) 1581{ 1582 return ch_info->band == IEEE80211_BAND_5GHZ; 1583} 1584 1585static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info) 1586{ 1587 return ch_info->band == IEEE80211_BAND_2GHZ; 1588} 1589 1590static inline int is_channel_passive(const struct iwl_channel_info *ch) 1591{ 1592 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0; 1593} 1594 1595static inline int is_channel_ibss(const struct iwl_channel_info *ch) 1596{ 1597 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1598} 1599 1600static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page) 1601{ 1602 __free_pages(page, priv->hw_params.rx_page_order); 1603 priv->alloc_rxb_page--; 1604} 1605 1606static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page) 1607{ 1608 free_pages(page, priv->hw_params.rx_page_order); 1609 priv->alloc_rxb_page--; 1610} 1611#endif /* __iwl_dev_h__ */ 1612